28 Mar, 2018

6 commits


27 Mar, 2018

1 commit


26 Mar, 2018

1 commit

  • Change USDHC0 and USDHC1 per clock source from APLL_PFD1,
    and set the APll_PFD1 clock rate to 352.8MHz.

    Also gate off APll_PFD1/2/3 before boot OS, otherwise set
    the clock rate of APll_PFD1/2/3 during OS boot up will triger
    some warning message.

    Reviewed-by: Ye Li
    Signed-off-by: Haibo Chen

    Haibo Chen
     

23 Mar, 2018

3 commits

  • Currently it's not possible to build i.MX6SL EVK with CONFIG_SECURE_BOOT
    enabled:

    In file included from drivers/crypto/fsl/jobdesc.c:12:0:
    drivers/crypto/fsl/jobdesc.c: In function ‘inline_cnstr_jobdesc_blob_dek’:
    include/fsl_sec.h:268:25: error: ‘CAAM_ARB_BASE_ADDR’ undeclared (first
    use in this function)
    #define SEC_MEM_PAGE1 (CAAM_ARB_BASE_ADDR + 0x1000)
    ^
    drivers/crypto/fsl/jobdesc.c:140:21: note: in expansion of macro
    ‘SEC_MEM_PAGE1’
    memcpy((uint32_t *)SEC_MEM_PAGE1, (uint32_t *)plain_txt, in_sz);
    ^
    include/fsl_sec.h:268:25: note: each undeclared identifier is reported only
    once for each function it appears in
    #define SEC_MEM_PAGE1 (CAAM_ARB_BASE_ADDR + 0x1000)
    ^
    drivers/crypto/fsl/jobdesc.c:140:21: note: in expansion of macro
    ‘SEC_MEM_PAGE1’
    memcpy((uint32_t *)SEC_MEM_PAGE1, (uint32_t *)plain_txt, in_sz);
    ^
    scripts/Makefile.build:280: recipe for target 'drivers/crypto/fsl/jobdesc.o'
    failed

    Currently the MX6SL option is selected via CONFIG_SYS_EXTRA_OPTIONS, so
    CONFIG_FSL_CAAM is being wrongly selected by the imx-common Kconfig.
    Select CONFIG_MX6SL via Kconfig to address this issue.

    Signed-off-by: Breno Lima
    Reviewed-by: Ye Li

    Breno Lima
     
  • Since commit 6e1f4d2652e79 ("arm: imx-common: add SECURE_BOOT option
    to Kconfig") it's preferable to select CONFIG_SECURE_BOOT via Kconfig.

    Add ARCH_MX7ULP as a CONFIG_SECURE_BOOT dependency, do not select
    CONFIG_FSL_CAAM since CAAM is not implemented for i.MX7ULP yet.

    Signed-off-by: Breno Lima
    Reviewed-by: Ye Li

    Breno Lima
     
  • Currently is not possible to call HAB API on i.MX7ULP:

    => hab_status

    Secure boot disabled

    System is hanging here.

    The function is_mx8m() is returning true for i.MX7ULP, thus calling
    HAB API with a wrong HAB RVT address.

    Align SoC ID and CPU ID with U-Boot upstream to address this issue:
    http://git.denx.de/?p=u-boot.git;a=commit;h=4fdffb98568651f6581bccb53f5277cb0d2dcdc5

    Signed-off-by: Peng Fan
    Signed-off-by: Breno Lima
    Reviewed-by: Ye Li

    Peng Fan
     

20 Mar, 2018

1 commit


19 Mar, 2018

4 commits

  • The u-boot does not support to use two different gadget drivers at same time.
    So for all iMX8QM/QXP MEK and ARM2 defconfigs, enable the CDNS3 usb gadget
    to support device mode on typec port and disable CI UDC driver for OTG port.

    Signed-off-by: Ye Li
    Reviewed-by: Peng Fan

    Ye Li
     
  • All iMX8QM/iMX8QXP MEK ARM2 boards have typec port for CDNS3 USB. This patch
    addes board level codes to init and clean up CDNS3 USB gadget driver.

    Signed-off-by: Ye Li
    Reviewed-by: Peng Fan

    Ye Li
     
  • Implemented the clock enable and disable interfaces for CDNS3 USB
    driver.

    Signed-off-by: Ye Li
    Acked-by: Peter Chen

    Ye Li
     
  • Porting the cadence USB3 (CDNS3) driver from kernel to u-boot. We only support
    the gadget (device mode), while the host mode is not supported. Users remains
    to use xhci-imx8 driver for host mode.

    Some changes in the CDNS3 driver porting:

    1. Add match_ep call back to usb_gadget_ops. The CDNS3 gadget driver replies
    on this operation to bind the usb_ep/usb_ss_ep with the endpoint descriptor
    when function layer uses usb_ep_autoconfig to add endpoint descriptors to gadget.
    So that CDNS3 driver can know the EP information and configure the EP once the
    set configuration request is received.

    2. U-boot does not have CMA, so it won't allocate uncached memory. Need to flush
    TRB and its DMA buffer before prime to usb controller and after complete transfer.

    3. In core.c, we add functions to hook with u-boot. It needs uplayer like
    to pass the register base address of each part of the USB controller.

    4. Force the CDNS3 gadget max speed to HS. The SuperSpeed is not supported by u-boot,
    so disable it in gadget driver. A configuration USB_CDNS3_GADGET_FORCE_HIGHSPEED is
    selected.

    5. Added gadget_is_cdns3 checking to provide bcdUSB value in device descriptor.

    6. Moved some new fields in usb_ep structure to usb_ss_ep, since u-boot does not have them.

    7. Remove host part codes as it is not supported by this driver.

    Signed-off-by: Ye Li
    Acked-by: Peter Chen

    Ye Li
     

14 Mar, 2018

3 commits


13 Mar, 2018

1 commit

  • On i.MX7ULP B0, the DDR clock target is increased from 320Mhz to 380Mhz.
    We update DDR clock relevant settings to approach the target. But since the
    limitation on LCDIF pix clock for HDMI output
    (refer commit dba948539edd4611610d9f1fc3711d1d922262ae), we set DDR clock to
    352.8Mhz (25.2Mhz * 14) by using the clock path:

    APLL PFD0 -> DDR CLK -> NIC0 -> NIC1 -> LCDIF clock

    To reduce the impact to entire system, the NIC0_DIV and NIC1_DIV are kept,
    so the divider 14 is calculated as:
    14 = (NIC0_DIV + 1) * (NIC1_DIV + 1) * (LCDIF_PCC_DIV + 1)

    NIC0_DIV: 1
    NIC1_DIV: 0
    LCDIF_PCC_DIV: 6

    APLL and APLL PFD0 settings:

    PFD0 FRAC: 27
    APLL MULT: 22
    APLL NUM: 1
    APLL DENOM: 20

    This patch applies the new settings for both DCD and plugin.
    There is no DDR script change on this new frequency.
    Overnight memtester is passed.

    Signed-off-by: Ye Li
    Reviewed-by: Peng Fan

    Ye Li
     

07 Mar, 2018

1 commit

  • SCFW commit (0d43db9 SCF-22: Move SCU controls to SYSTEM.
    Allows AP to use SCU temp sensor) changes system resource name
    from SC_R_SC_PID0 to SC_R_SYSTEM, need to change it accordingly
    to avoid system incorrect system type got from SCFW and cause
    linux kernel booting fail as below:

    Starting kernel ...

    [ 0.000000] Booting Linux on physical CPU 0x0
    [ 0.000000] Linux version 4.9.51-04508-g9caddc6 (anson@anson-OptiPlex-790) (gcc version 4.9.1 20140529 (prerelease) (c8
    [ 0.000000] Boot CPU: AArch64 Processor [410fd034]
    [ 0.000000] earlycon: lpuart32 at MMIO 0x000000005a060000 (options '115200,115200')
    [ 0.000000] bootconsole [lpuart32] enabled
    [ 0.000000] Bad mode in Error handler detected on CPU0, code 0xbf000002 -- SError
    [ 0.000000] Internal error: Oops - bad mode: 0 [#1] PREEMPT SMP
    [ 0.000000] Modules linked in:
    [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 4.9.51-04508-g9caddc6 #40
    [ 0.000000] Hardware name: Freescale i.MX8QM MEK (DT)
    [ 0.000000] task: ffff000009270780 task.stack: ffff000009260000
    [ 0.000000] PC is at setup_arch+0xf4/0x578
    [ 0.000000] LR is at setup_arch+0xf0/0x578
    [ 0.000000] pc : [] lr : [] pstate: 000000c5
    [ 0.000000] sp : ffff000009263f20
    [ 0.000000] x29: ffff000009263f20 x28: 0000000081350018
    [ 0.000000] x27: 00000000ffe93f58 x26: 0000000000000000
    [ 0.000000] x25: 00000000ffefe110 x24: 0000000000000000
    [ 0.000000] x23: 0000000000000000 x22: ffff000009267000
    [ 0.000000] x21: ffff7dfffe800000 x20: ffff000009284000
    [ 0.000000] x19: ffff000008080000 x18: 0000000000000077
    [ 0.000000] x17: 0000000000002c00 x16: 0000000000001000
    [ 0.000000] x15: ffffffffffffffff x14: 0000000000000000
    [ 0.000000] x13: 0000000000000007 x12: 0000000000000018
    [ 0.000000] x11: 0000000000000007 x10: 0101010101010101
    [ 0.000000] x9 : ffffffffffffffff x8 : 0000000000000008
    [ 0.000000] x7 : 0000000000000007 x6 : 0000008080808080
    [ 0.000000] x5 : 000000000000005f x4 : 0000000000000072
    [ 0.000000] x3 : 0000000000000000 x2 : 0000000000000072
    [ 0.000000] x1 : 0000000000000000 x0 : 0000000000000001

    Signed-off-by: Anson Huang
    Reviewed-by: Ye Li

    Anson Huang
     

03 Mar, 2018

1 commit


02 Mar, 2018

5 commits


28 Feb, 2018

1 commit


27 Feb, 2018

1 commit


24 Feb, 2018

6 commits

  • On i.MX8MQ EVK board, the u-boot only supports the USB host mode on
    USB3 port. This patch adds the host support for typec port.
    So the typec port now can support both host and device mode.

    Signed-off-by: Ye Li
    Acked-by: Jun Li

    Ye Li
     
  • i.MX8MQ has two USB3 controllers. Previously we only added the #2
    controller support in driver. This patch adds the address for #1
    controller.

    Signed-off-by: Ye Li
    Acked-by: Jun Li

    Ye Li
     
  • Add a interface to set UFP mode, so when running as device mode, the
    board level codes can use it to configure the TCPC port to UFP mode.

    Since we have supported PD charge for dead battery, so add check before
    applying UFP or DFP mode.

    Signed-off-by: Ye Li
    Acked-by: Jun Li

    Ye Li
     
  • Since the NAND driver is enabled for i.MX8MQ DDR4 ARM2 board, enable
    the UBIFS and UBI support to access rootfs.

    Signed-off-by: Ye Li
    Reviewed-by: Peng Fan

    Ye Li
     
  • This patch fixes the below warning by typecasting it properly
    fs/ubifs/ubifs.c: In function 'ubifs_load':
    fs/ubifs/ubifs.c:942:29: warning: cast to pointer from integer
    of different size [-Wint-to-pointer-cast]
    err = ubifs_read(filename, (void *)addr, 0, size, &actread);

    Signed-off-by: Siva Durga Prasad Paladugu
    Signed-off-by: Michal Simek
    Reviewed-by: Heiko Schocher
    (cherry picked from commit 34cc30af27165696a36274394f6ff019ed762ce6)

    Siva Durga Prasad Paladugu
     
  • Several inline functions in this file reference undefined functions in
    U-Boot. For example:

    atomic-long.h:73:9: warning: implicit declaration of function
    'atomic64_sub_and_test'
    atomic-long.h:80:9: warning: implicit declaration of function
    'atomic64_dec_and_test'
    atomic-long.h:87:9: warning: implicit declaration of function
    'atomic64_inc_and_test'

    Handle this the same as the 32 bit build by wrapping these functions in
    a __UBOOT__ check.

    Signed-off-by: Bradley Bolen
    (cherry picked from commit 9c3264ce40130966897fb9c1b91c120f588531d0)

    Bradley Bolen
     

23 Feb, 2018

5 commits