20 Jan, 2018
3 commits
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Keystone and DRA7 based TI platforms uses same
EMIF memory controller. cmd_ddr3 command is customized
for keystone platforms, make it generic so that it can
be re used for DRA7 platforms.Signed-off-by: Lokesh Vutla
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Move cmd_ddr3 to cmd/ti in order to make
it build for non-keystone TI platforms.Signed-off-by: Lokesh Vutla
[trini: Rename to ddr3.c not cmd_ddr3.c]
Signed-off-by: Tom Rini -
Added support for K2G EVM with FlipChip SoC of which
ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also
backward compatible with old revision EVM and EVM
with WireBond SoC. Their ARM/DDR3 run at 600MHz/800 MT/s.The new SoC supports 2 different speeds at 1GHz and 600MHz.
Modyfied the CPU Name to show which SoC is used in the EVM.
Modified the DDR3 configuration to reflect New SoC supports
2 different CPU and DDR3 speeds, 1GHz/1066MT and 600MHz/800MT.Added new inline function board_it_k2g_g1() for the new FlipChip 1GHz,
and set the u-boot env variable board_name accordingly.Modified findfdt script in u-boot environment variable to include new k2g board type.
Signed-off-by: Rex Chang
Signed-off-by: Lokesh Vutla
19 Jan, 2018
1 commit
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Align the base address defined in header files with the base address used
in the DTS. This will facilitate the introduction of the DMA support.Of all HSMMC users, only omap3 doesn't have the 0x100 reserved region at
the top. This region will be used to determine if the controller supports
DMA transfersSigned-off-by: Jean-Jacques Hiblot
Reviewed-by: Tom Rini
16 Aug, 2017
1 commit
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We are now using an env_ prefix for environment functions. Rename these
two functions for consistency. Also add function comments in common.h.Quite a few places use getenv() in a condition context, provoking a
warning from checkpatch. These are fixed up in this patch also.Suggested-by: Wolfgang Denk
Signed-off-by: Simon Glass
26 Jul, 2017
2 commits
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The inline assembly functions in mon.c assume that the caller will
check for the return value in r0 according to regular ARM calling
conventions.However, this assumption breaks down if the compiler inlines the
functions. The caller is then under no obligation to use r0 for the
result.To fix this disconnect, we must explicitly move the return value
from the smc/bl call to the variable that the function returns.Signed-off-by: Madan Srinivas
Reviewed-by: Tom Rini -
On early K2 devices (eg. K2HK) the secure ROM code does not support
loading secure code to firewall protected memory, before decrypting,
authenticating and executing it.To load the boot monitor on these devices, it is necessary to first
authenticate and run a copy loop from non-secure memory that copies
the boot monitor behind firewall protected memory, before decrypting
and executing it.On K2G, the secure ROM does not allow secure code executing from
unprotected memory. Further, ROM first copies the signed and encrypted
image into firewall protected memory, then decrypts, authenticates
and executes it.As a result of this, we cannot use the copy loop for K2G. The
mon_install has to be modified to pass the address the signed and
encrypted secure boot monitor image to the authentication API.For backward compatibility with other K2 devices and K2G GP,
the mon_install API still supports a single argument. In this case
the second argument is set to 0 by u-boot and is ignored by ROMSigned-off-by: Thanh Tran
Signed-off-by: Madan Srinivas
Reviewed-by: Tom Rini
11 Jul, 2017
5 commits
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The size of the secure image does not include the size of the
header, subtract this out before we move the image or we grab
extra data after the image.Signed-off-by: Andrew F. Davis
Reviewed-by: Lokesh Vutla -
Different K2G evms may need to program the various
KS2_DDRPHY_DATX8_X_OFFSET registers in different ways. Therefore, use
the mask and val registers for each KS2_DDRPHY_DATAX_X_OFFSET to
properly program the register.Signed-off-by: Franklin S Cooper Jr
Reviewed-by: Tom Rini -
K2G GP doesn't require the MR2 register to be programed since the
default is good enough. However, newer K2G boards do need to change
this register value. Therefore, instead of not writing this register if
ran on a K2G board just program the value to be written to match the
default/reset value.Signed-off-by: Franklin S Cooper Jr
Reviewed-by: Tom Rini -
Future boards will need to configure DDR3 registers in a slightly
different manner. Support this by defining additional variables and
defines that will be utilized later.Signed-off-by: Franklin S Cooper Jr
Reviewed-by: Tom Rini -
u-boot.bin is a copy of:
u-boot-fit-dtb.bin if CONFIG_FIT_EMBED is enabled,
u-boot-dtb.bin if CONFIG_OF_SEPARATE is enabled,
u-boot-nodtb.bin if DT is not enabled.
So, use u-boot.bin to to generate keystone images instead of
u-boot-dtb.binSigned-off-by: Franklin S Cooper Jr
Reviewed-by: Tom Rini
22 May, 2017
1 commit
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This converts the following to Kconfig:
CONFIG_SPL_BOARD_INITSigned-off-by: Ley Foon Tan
[trini: Update the Kconfig logic]
Signed-off-by: Tom Rini
09 May, 2017
3 commits
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Enable by default DM_I2C for all Texas Instruments Keystone 2 based
evms.Signed-off-by: Franklin S Cooper Jr
Reviewed-by: Tom Rini
Reviewed-by: Heiko Schocher -
One some keystone2 platforms like K2G ICE, there is an option
to switch between 24MHz or 25MHz as sysclk. But the existing
driver assumes it is always 24MHz. Add support for getting
all reference clocks dynamically by reading boot pins.Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini -
K2G supports various sysclk frequencies which can be
determined using sysboot pins. PLLs should be configured
based on this sysclock frequency. Add PLL configurations
for all supported sysclk frequencies.Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini
09 Apr, 2017
2 commits
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Adds an additional image type needed for supporting secure keystone
devices. The build generates u-boot_HS_MLO which can be used to boot
from all media on secure keystone devices.Signed-off-by: Madan Srinivas
Signed-off-by: Andrew F. Davis
Reviewed-by: Tom Rini
Reviewed-by: Lokesh Vutla -
This commit implements the board_fit_image_post_process() function for
the keystone architecture. This function calls into the secure boot
monitor for secure authentication/decryption of the image. All needed
work is handled by the boot monitor and, depending on the keystone
platform, the security functions may be offloaded to other secure
processing elements in the SoC.The boot monitor acts as the gateway to these secure functions and the
boot monitor for secure devices is available as part of the SECDEV
package for KS2. For more details refer doc/README.ti-secureSigned-off-by: Vitaly Andrianov
Signed-off-by: Madan Srinivas
Signed-off-by: Andrew F. Davis
Reviewed-by: Tom Rini
Reviewed-by: Lokesh Vutla
07 Apr, 2017
1 commit
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With d53ecad92f06 some unused interrupt related code was removed.
However all of these options are currently unused. Rather than migrate
some of these options to Kconfig we just remove the code in question.The only related code changes here are that in some cases we use
CONFIG_STACKSIZE in non-IRQ related context. In these cases we rename
and move the value local to the code in question.Fixes: d53ecad92f06 ("Merge branch 'master' of git://git.denx.de/u-boot-sunxi")
Signed-off-by: Tom Rini
21 Mar, 2017
1 commit
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PRU ethernet MAC address range is present in the
board EEPROM. Parse it and setup eth?addr
environment variables.Signed-off-by: Roger Quadros
Reviewed-by: Lokesh Vutla
Reviewed-by: Tom Rini
04 Dec, 2016
1 commit
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For ECC enabled DDR, we use EDMA to reset all memory values to 0. For
K2E/L/H/K the priv ID of 8 was indicative of ARM, but that is not the
case for K2G, where it is 1.Unfortunately, ddr3 code had hard coded the privID and had missed
identification previously. Fix the same, else unforeseen behavior can
be expected in our reset of DDR contents to 0 for ECC enablement.Signed-off-by: Nishanth Menon
Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini
29 Nov, 2016
1 commit
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The config option TARGET_K2x_EVM is set by the k2x defconfigs to pick
a board target, but the header configs also set K2x_EVM. This config
is redundant, remove it and use TARGET_K2x_EVM everywhere in its place.Signed-off-by: Andrew F. Davis
Reviewed-by: Lokesh Vutla
14 Nov, 2016
1 commit
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Update the PLL initialization sequence to avoid glitches while
programming. User guide for the same is available at[1].[1] http://www.ti.com/lit/ug/sprugv2h/sprugv2h.pdf
Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini
08 Oct, 2016
1 commit
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The KeyStone platform has its own clk_get_rate() but its prototype
is different from that of the common-clk (clk-uclass) framework.Prefix the KeyStone specific implementation with ks_ in order to
avoid name-space conflict.Signed-off-by: Masahiro Yamada
Reviewed-by: Simon Glass
Acked-by: Lokesh Vutla
Reviewed-by: Tom Rini
07 Oct, 2016
1 commit
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These two functions are neither defined nor referenced.
Signed-off-by: Masahiro Yamada
Acked-by: Lokesh Vutla
Reviewed-by: Tom Rini
02 Oct, 2016
2 commits
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Given that boot monitor image is being generated to a specific target location
depending on the SoC and U-boot relies on addr_mon env variable to be aligned
with boot monitor target location. When ever the target address gets updated in
boot monitor, it is difficult to sync between u-boot and boot monitor and also
there is no way to update user that boot monitor image is updated.To avoid this problem, boot monitor image is being generated with mkimage
header. Adding support in mon_install command for parsing this header.Signed-off-by: Suman Anna
Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini -
Enable ECC byte lane for k2g-evm
Signed-off-by: Lokesh Vutla
Reviewed-by: Tom Rini
24 Sep, 2016
1 commit
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Now, include/linux/errno.h is a wrapper of .
Replace all include directives for with
.is supposed to be included from when
arch-headers fall back into generic implementation. Generally, they
should not be directly included from .c files.Signed-off-by: Masahiro Yamada
[trini: Add drivers/usb/host/xhci-rockchip.c]
Signed-off-by: Tom Rini
26 Jul, 2016
1 commit
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commit 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid
left under a macro KS2_MSMC_SEGMENT_QM_PDSP which is no longer valid.
This, in effect disabled DMA coherency for QM PDSP.Given that msmc_k2hkle_common_setup is valid for all K2H/K/L/E SoCs,
the #ifdef should been removed in the first place. Do the same.Fixes: 1f807a9f32aa ("ARM: keystone2: Refactor MSMC macros to avoid #ifdeffery")
Signed-off-by: Murali Karicheri
Acked-by: Nishanth Menon
Reviewed-by: Tom Rini
03 Jun, 2016
1 commit
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BOOTCFG_RSTMUX8 register controls the reset mux associated with the ARM.
Timer5(dedicated to ARM) when used as WatchDog timer, the events it
generates are routed to the above mux.Following are the 3 events that can controlled bt the reset mux:
- Device Reset
- An interrupt to the ARM_GIC
- An interrupt to the ARM_GIC followed by a device reset.Right now to give a default watchdog behaviour "Device reset" is
being selected.Signed-off-by: Lokesh Vutla
Acked-by: Nishanth Menon
02 Apr, 2016
2 commits
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Add missing Privilege ID settings for KS2 SoCs.
Based on:
K2H/K: Table 6-7. Privilege ID Settings from SPRS866E (Nov 2013)
http://www.ti.com/lit/ds/symlink/66ak2h14.pdf (page 99)
K2L: Table 7-7. Privilege ID Settings from SPRS930 (April 2015)
http://www.ti.com/lit/ds/symlink/66ak2l06.pdf (page 71)
K2E: Table 7-7. Privilege ID Settings from SPRS865D (Mar 2015)
http://www.ti.com/lit/ds/symlink/66ak2e05.pdf (page 75)
K2G: Table 3-16. PrivIDs from SPRUHY8 (Jan 2016)
http://www.ti.com/lit/ug/spruhy8/spruhy8.pdf (page 238)Overall mapping:
-------+-----------+-----------+-----------+---------
PrivID | KS2H/K | K2L | K2E | K2G
-------+-----------+-----------+-----------+---------
0 | C66x 0 | C66x 0 | C66x 0 | C66x 0
1 | C66x 1 | C66x 1 | Reserved | ARM
2 | C66x 2 | C66x 2 | Reserved | ICSS0
3 | C66x 3 | C66x 3 | Reserved | ICSS1
4 | C66x 4 | Reserved | Reserved | NETCP
5 | C66x 5 | Reserved | Reserved | CPIE
6 | C66x 6 | Reserved | Reserved | USB
7 | C66x 7 | Reserved | Reserved | Reserved
8 | ARM | ARM | ARM | MLB
9 | NetCP | NetCP | NetCP | PMMC
10 | QM_PDSP | QM_PDSP | QM_PDSP | DSS
11 | PCIe_0 | PCIe_0 | PCIe_0 | MMC
12 | DEBUG/DAP | DEBUG/DAP | DEBUG/DAP | DEBUG/DAP
13 | Reserved | Reserved | PCIe_1 | Reserved
14 | HyperLink | PCIe_1 | HyperLink | Reserved
15 | Reserved | Reserved | TSIP | Reserved
-------+-----------+-----------+-----------+---------NOTE: Few of these might have default configurations, however,
since most are software configurable, it is better to explicitly
configure the system to have a known default state.Without programming these, we end up seeing lack of coherency on certain
peripherals resulting in inexplicable failures (such as USB peripheral's
DMA data not appearing on ARM etc and weird workarounds being done by
drivers including cache flushes which tend to have system wide
performance impact).By marking these segments as shared, we also ensure SoC wide coherency
is enabled.Reported-by: Bin Liu
Signed-off-by: Nishanth Menon
Reviewed-by: Lokesh Vutla
Reviewed-by: Tom Rini -
MSMC segment Privilege ID is not consistent accross the keystone2 SoCs.
As the first step to ensure complete SoC wide coherency setup, lets
refactor the macros to remove the #if-deffery around the code which
obfuscates which IDs are actually enabled for which SoC.As a result of this change the PCIe configuration is moved after the
msmc configuration is complete, but that should ideally have no
functional impact.Signed-off-by: Nishanth Menon
Reviewed-by: Lokesh Vutla
Reviewed-by: Tom Rini
27 Mar, 2016
3 commits
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Fix up BOOT_SET_BITFIELD to be a static inline function to be readable
with the same functionality.Reported-by: Tom Rini
Signed-off-by: Nishanth Menon
Reviewed-by: Tom Rini -
BOOT_READ_BITFIELD can easily be a static inline function and be a
little more readable with the same functionality.Reported-by: Tom Rini
Signed-off-by: Nishanth Menon
Reviewed-by: Tom Rini -
BOOTBITMASK is almost impossible to decode, so convert it into a simpler
static line functions of equivalent solution.Reported-by: Tom Rini
Signed-off-by: Nishanth Menon
Reviewed-by: Tom Rini
17 Mar, 2016
3 commits
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When we switch to including all linker lists in SPL it is important
to not include commands as that may lead to link errors due to other
things we have already discarded. In this case simply move cmd_ddr3.o
over to the list with the rest.Cc: Vitaly Andrianov
Cc: Nishanth Menon
Cc: Lokesh Vutla
Signed-off-by: Tom Rini -
Now that we have a standard way to power off the hardware, switch to
using that rather than our own command.Cc: Vitaly Andrianov
Cc: Nishanth Menon
Cc: Lokesh Vutla
Signed-off-by: Tom Rini -
When we switch to including all linker lists in SPL it is important
to not include commands as that may lead to link errors due to other
things we have already discarded. In this case, we split the code for
supporting the monitor out from the code for loading it.Cc: Vitaly Andrianov
Cc: Nishanth Menon
Cc: Lokesh Vutla
Signed-off-by: Tom Rini
15 Mar, 2016
2 commits
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Because KS2 u-boot works in 32 bit address space the existing ram_size
global data field cannot be used. The maximum, which the get_ram_size()
can detect is 2GB only. The ft_board_setup() needs the actual ddr3 size
to fix up dtb.This commit introduces the ddr3_get_size() which uses SPD data to
calculate the ddr3 size. This function replaces the "ddr3_size"
environment variable, which was used to get the SODIMM size.For platforms, which don't have SODIMM with SPD and ddr3 is populated to
a board a simple ddr3_get_size function that returns ddr3 size has to be
implemented. See hardware-k2l.hSigned-off-by: Vitaly Andrianov
Signed-off-by: Nishanth Menon
Reviewed-by: Tom Rini -
This commit replaces hard-coded EMIF and PHY DDR3 configurations for
predefined SODIMMs to a calculated configuration. The SODIMM parameters
are read from SODIMM's SPD and used to calculated the configuration.The current commit supports calculation for DDR3 with 1600MHz and 1333MHz
only.Signed-off-by: Vitaly Andrianov
Signed-off-by: Lokesh Vutla
Signed-off-by: Nishanth Menon
Reviewed-by: Tom Rini