09 Apr, 2020
1 commit
25 Nov, 2019
1 commit
11 Nov, 2019
1 commit
01 Nov, 2019
1 commit
11 Apr, 2019
1 commit
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Enable i2c2 and i2c3 for AIY.
Change-Id: I984e2e76e7c8929cc62088b6838c81f5dc838568
10 Apr, 2019
3 commits
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The HABv4 implementation in ROM checks if HAB major version
in IVT header is 4.x.The current implementation in hab.c code is only validating
HAB v4.0 and HAB v4.1 and may be incompatible with newer
HABv4 versions.Modify verify_ivt_header() function to align with HABv4
implementation in ROM code.Signed-off-by: Breno Lima
Reviewed-by: Ye Li
(cherry picked from commit 33f51b401dffa393274a28f9d49a87af3eb02fe0) -
When building 32-bit targets with CONFIG_SECURE_BOOT and DEBUG enabled
the following warnings are displayed:arch/arm/mach-imx/hab.c:840:41: warning: format '%lx' expects argument \
of type 'long unsigned int', but argument 3 has type 'uint32_t \
{aka unsigned int}' [-Wformat=]
printf("HAB check target 0x%08x-0x%08lx fail\n",
~~~~^
%08x
ddr_start, ddr_start + bytes);arch/arm/mach-imx/hab.c:845:45: warning: format '%x' expects argument \
of type 'unsigned int', but argument 3 has type 'ulong \
{aka long unsigned int}' [-Wformat=]
printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
~^
%lxFix warnings by providing the correct data type.
Reviewed-by: Ye Li
Signed-off-by: Breno Lima
(cherry picked from commit 050beb8ee3fc4c690c9ce7c4f47adfc6f48dccdf) -
When booting in low power or dual boot modes the M4 binary is
authenticated by the M4 ROM code.Add an option in hab_status command so users can retrieve M4 HAB
failure and warning events.=> hab_status m4
Secure boot disabled
HAB Configuration: 0xf0, HAB State: 0x66
No HAB Events Found!Add command documentation in mx6_mx7_secure_boot.txt guide.
As HAB M4 API cannot be called from A7 core the code is parsing
the M4 HAB persistent memory region. The HAB persistent memory
stores HAB events, public keys and others HAB related information.The HAB persistent memory region addresses and sizes can be found
in AN12263 "HABv4 RVT Guidelines and Recommendations".Reviewed-by: Utkarsh Gupta
Reviewed-by: Ye Li
Signed-off-by: Breno Lima
(cherry picked from commit 0efff16579fabcf57acb9c8857afac8fb58de355)
02 Apr, 2019
1 commit
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As the M4 use different DDR memory size in normal android/car2 and car
image, use different defconfig for car2 to decrease DDR memory
reservation. So memory reserved for each M4 core is 8MB in car2 and
normal android image. it's 32MB for car image.Change-Id: Idf608f539cd614a154c78e3a1af28eff1da5c1f2
Signed-off-by: Zhang Bo
18 Mar, 2019
2 commits
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The normal ready time of M4 side is less than 1s, so we can use
2s as the timeout of connection. The current value is 10s, which seems
a little long if M4 SRTM service does not run.Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit 4792d8967d3c631d055c133303bb6385b822a3ca) -
There are two LPCG HW issues reported in TKT322331. Add workaround
for them in u-boot.
1. Back to back LPCG write access must have 4x DSC cycle interval.
2. When DSC clock is gated, LPCG write access may be missed due to
the edge detect is not see by DSC. Two writes shall be performed
to re-enable the clock if DSC clock is gatedSigned-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 96186ca0048e6ae261176e5f3ebf02be09bacb08)
15 Mar, 2019
1 commit
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When switching ARM root clock source from ARM PLL to 24M OSC,
found the ARM timer may stop on few chips during stress reboot test.
The system counter is still increasing, but ARM timer is stopped.Add a workaround that switch ARM clock source from ARM PLL to
Sys PLL2 500M clock instead of 24M OSC. Stress reboot test is
passed on all failed chips.Signed-off-by: Ye Li
(cherry picked from commit 74770228976c013a3e289b21f6e27334ea97bee4)
12 Mar, 2019
3 commits
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Meet the build error below with ARM2 SPL defconfig
arch/arm/mach-imx/imx8/image.c: In function ‘spl_nor_get_uboot_base’:
arch/arm/mach-imx/imx8/image.c:224:13: error: ‘CONFIG_SYS_UBOOT_BASE’
undeclared (first use in this function)
if (end
Reviewed-by: Peng Fan
(cherry picked from commit a96fd317601db7f21402e5f74fe24653e2af8ae7) -
Fix coverity issue: CID 5433686: Uninitialized scalar variable (UNINIT)
uninit_use_in_call: Using uninitialized value value when calling
call_imx_sip_ret2.Test: coverity scan pass.
Change-Id: Id89f8f6f69fb944179b34dca4146fd7636505681
Signed-off-by: Luo Ji -
Fix coverity issue CID 3298992: Double free (USE_AFTER_FREE)
double_free: Calling free frees pointer rsrc_data which has
already been freed.Check the rsrc_data buffer before free to avoid free NULL
pointer.Change-Id: I781e87667a5d3bbe25ec12fbae8e3958d9b29244
Signed-off-by: Luo Ji
11 Mar, 2019
2 commits
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We are currently using SC_R_LAST as a marker for imx8 power domain tree
nodes without a resource attached. This value is compiled into dtb as
part of the linux build and used by uboot.The SC_R_LAST constant changes frequently as SCFW resources are added
(by design) and every time we need to update linux and uboot headers
together or boot can fail.Fix this by replacing SC_R_LAST usage with a new constant SC_R_NONE
defined to be 0xFFF0.Signed-off-by: Leonard Crestez
Reviewed-by: Peng Fan
(cherry picked from commit 93f302a6642adedfdd6336b22d08f32284539e35) -
Also fixes MLK-21051: Replace manually added pads with defines from SCFW
export package.Signed-off-by: Leonard Crestez
Acked-by: Fugang Duan
(cherry picked from commit cc76365cb15dc9d4ba3983ec93094c6017e12d83)
05 Mar, 2019
2 commits
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Currently when SPL load 3rd container, it will do the authentication
unconditionally. But when running SPL on Xen, the seco authentication
is not supported, and cause failure in loading.Change the parser codes to depend on CONFIG_AHAB_BOOT to do the
authentication.Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit e38169a27fbe052561c5b369500e80477760ec3e) -
Trusty OS will check and require the memory passed from non-secure world
is inner shareable. Change the memory attribute as PTE_BLOCK_INNER_SHARE
in u-boot to meet the requirement.Test: build and boot on imx8qm/imx8qxp.
Change-Id: I1aac9b430ecc0fa94f9a1f6dd519b34ce6fef7bd
Signed-off-by: Ji Luo
04 Mar, 2019
1 commit
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Check the return values for SCFW APIs and print error logs
if the return value is not "SC_ERR_NONE".Test: boot on imx8qm.
Change-Id: Ic7008bd2656375875e77dd3c922dafb1be145357
Signed-off-by: Ji Luo
27 Feb, 2019
1 commit
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Update SCFW API to v1.3 at below commit. A new API sc_pm_set_boot_parm
is added.commit c5ef21f894de0ac8329f0fe540331a272fcd1461
Author: Chuck Cannon
Date: Tue Feb 26 15:36:53 2019 -0600SCF-352: Add more to SECO test.
Signed-off-by: Chuck Cannon
Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit e79209e4174054bb328bae441bf8ab3c1312ee4e)
26 Feb, 2019
2 commits
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If resource is not owned, we ignore sid settings.
When support CM41 + android auto on xen, some resources
are owned by CM41, when CM41 releases those resources,
CM41 will program SID for those resources.Signed-off-by: Peng Fan
Reviewed-by: Flynn xu
(cherry picked from commit cd0ec61b235929d75965c43e82127b73e73e1697) -
Update the ddr training code to work with the atf 2.0.
Test: Build and boot on imx8mq aiy 3G board.
Change-Id: I8546c34cfa4aeeed819f7797f8362676e420b41f
Signed-off-by: Ji Luo
25 Feb, 2019
2 commits
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When M4 is booted by ROM, we have to enable RPMSG in kernel, so need
to select the -rpmsg.dtb. If M4 is not enabled, use default kernel dtb.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 8a57be45e18295ce1b19799723775cf5b205281d) -
When using fdt_next_node, the depth variable needs being initialized
first, otherwise we many get undefined depth.Signed-off-by: Ye Li
(cherry picked from commit 1ae3d2d3859c5f2610c74cd192da2657e2600aff)
23 Feb, 2019
1 commit
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The iMX8MQLite new part will not disable DCSS in fuse. So change
the codes to check the DCSS fuse before disable relevant FDT nodes
and u-boot HDMI splash screen.Signed-off-by: Ye Li
(cherry picked from commit 9e6ab0397b8d94de8b904250884726e58633066b)
21 Feb, 2019
2 commits
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When compiling with android toolchain, there is an instruction
"str q0, [x8],#16", but x8 is not 16bytes aligned,
this instruction will trigger sync abort.So, following Linux kernel, only use general regs for arm64.
If not, compiler may use simd registers Q[x]. We need to avoid
using simd registers in U-Boot, because load/store Q[x] has
restriction that 128bits aligned when str/ldr.Signed-off-by: Peng Fan
(cherry picked from commit 186ccd8de53f986c5913432638dfaca9bdc97e89)
(cherry picked from commit 8f3f0d339783e066f7815408949677b62e465b62) -
To U-Boot on DomU, the lpuart0 is replaced with a xen paravirtual
consol driver, but reused the previous lpuart node. However
there is an power-domains entry in lpuart0 which will call
power_domain_on and failed to probe xen paravirtual driver,
because of recent change:
commit 8524ca764d8f("MLK-20945-2 dm: device: Check the power up result in probe ")So remove the power-domains entry in lpuart0 to let DomU U-Boot could
output again.Signed-off-by: Peng Fan
Reviewed-by: Flynn xu
(cherry picked from commit 38155100481a07e961f375052241d9d03e20a899)
20 Feb, 2019
1 commit
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According to iMX8MM DRAM PLL spec, the Fvco range is from 1600Mhz to 3200Mhz,
and (Fin / P) range is from 6Mhz to 25Mhz. However, our current PLL settings
violates the spec.
This patch changes the dividers to meet the spec requirement.Signed-off-by: Ye Li
Reviewed-by: Bai Ping
(cherry picked from commit 3b303840f625121c08898f4c43cf29cf2a2d0170)
19 Feb, 2019
2 commits
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For fspi build, we will enable both SPL NOR support and SPL SPI
support. SPL will dynamically check the resource owner then
select corresponding boot device.Signed-off-by: Ye Li
(cherry picked from commit 675cc6031033fbe5e7d8cfe01ebe1dedfd6c1b96) -
Since FSPI is assigned to M4 partition, A core only can read it from its
memory-map address. So we have to enable SPL NOR which won't access
flexspi driver.Update SPL container parser for the RAW NOR support.
Signed-off-by: Ye Li
(cherry picked from commit 7ea7a16fd892558098fb8cbea134ac275d1220d3)
18 Feb, 2019
1 commit
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Check the OS container image address is belonged to valiad DRAM memory
before accessing it to avoid u-boot crash on invalid address.Also refine the error print.
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit f40dc07b3df9ad71ea501c77a19924361b133de7)
15 Feb, 2019
1 commit
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Update to latest SCFW API with below commit. Add version API and
remove some resource ids.commit 004247e14afc74a21d65569415c4b2e35bfaabc3
Author: Ranjani Vaidyanathan
Date: Thu Feb 14 14:55:12 2019 -0800SCF-341 Fix bug in setting large slice clock divider
Incorrect mask was applied when clearing out the bits in the
DSC large slice divider.Signed-off-by: Ranjani Vaidyanathan
Signed-off-by: Ye Li
(cherry picked from commit 745f2e597613e96f1ac630e842faafdc060ee029)
14 Feb, 2019
1 commit
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The current U-Boot implementation is not decoding the verify image message
response.=> ahab_status
Lifecycle: 0x0020, NXP closedSECO Event[0] = 0x0088F100
Starting in SECO FW v0.2.0 engineering release an invalid image integrity
is logged as an event in open mode.Update U-Boot ahab_status command to decode this event.
Signed-off-by: Breno Lima
Reviewed-by: Ye Li
(cherry picked from commit 96a192eb1d09fbed0e7e544fa7cc4f9d83d4acac)
13 Feb, 2019
1 commit
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Add a new command "ahab_close" to close the chip from NXP closed lifecycle
state to OEM closed state. If the sample is not NXP closed, the command
will fail.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 771b824728caa59eebf2c3547b2e4296a08ee705)
12 Feb, 2019
5 commits
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Add compatible strings and properties to i2c1 node for using virtual
i2c and i2c mux driversSigned-off-by: Ye Li
(cherry picked from commit 9dbdbec24b2d0cd67d16cf93034b3ab60bb312bc) -
We use MU8 and MU9 to communicate with M4_0 and M4_1 in u-boot. Add
relevant nodes for the MU driver.Signed-off-by: Ye Li
(cherry picked from commit b06674a91991fe3bfe5a2f6000195cb8546c72a6) -
When a i2c device is binding with drivers, we check whether current
partition ownes the resource. If not owned, the binding to local lpi2c
driver will fail, otherwise binding to virtual i2c driver will fail.Signed-off-by: Ye Li
(cherry picked from commit 81dd157fd0ba476c994e95a63515cb65164f1e87) -
Override the board_imx_vservice_find_mu for finding MU device for
virtual devices. The matching logic is if the M4_0 partition ownes
the resource of the device, we select MU8 for this Vservice channel.
Otherwise, if the M4_1 partition ownes the resource, we select MU9.We reuse the kernel RPMSG Vring buffer for VService buffer, because it is
shared between OS partition and M4 partition. The pagetable is needed for
this region, since it is not in memregs of OS partition.board_imx_vservice_get_buffer is also overriden is this patch to divide
VService buffer for MU8 and MU9.Signed-off-by: Ye Li
(cherry picked from commit 4358b4cdfc4752822066d480dd1c10086c211be7) -
We use a glue layer to link the low level MU driver and virtual drivers.
This glue layer is named to virtual service (iMX VService). Virtual service
provides unified interfaces for setup connection with M4, get message buffer
and send/receive message, etc.Multiple virtual drivers (i2c, gpio, etc)
|
iMX Vservice
|
imx_mu_m4 driverFor each virtual device, by default, the Vservice uses the device node property
"fsl,vservice-mu" to specify the MU node handler. A override function is also provided,
so te ARCH level can define its rule. We will use the override function for dynamically
select MU on 8QM/QXP.Signed-off-by: Ye Li
(cherry picked from commit 4d872794cae55ffb654a55646bbf231e8d864e13)