24 Jan, 2018

1 commit


09 Jan, 2018

1 commit

  • Create driver to support the soft reset (i.e. peripheral)
    of all Rockchip SoCs.

    Example of usage:
    i2c driver:
    ret = reset_get_by_name(dev, "i2c", &reset_ctl);
    if (ret) {
    error("reset_get_by_name() failed: %d\n", ret);
    }

    reset_assert(&reset_ctl);
    udelay(50);
    reset_deassert(&reset_ctl);

    i2c dts node:
    resets = , ;
    reset-names = "p_i2c", "i2c";

    Signed-off-by: Elaine Zhang
    Signed-off-by: Kever Yang
    Acked-by: Philipp Tomsich
    Reviewed-by: Philipp Tomsich
    [Fixed commit tag:]
    Signed-off-by: Philipp Tomsich

    Elaine Zhang
     

06 Nov, 2017

2 commits


15 Oct, 2017

1 commit


04 Oct, 2017

1 commit

  • U-Boot widely uses error() as a bit noisier variant of printf().

    This macro causes name conflict with the following line in
    include/linux/compiler-gcc.h:

    # define __compiletime_error(message) __attribute__((error(message)))

    This prevents us from using __compiletime_error(), and makes it
    difficult to fully sync BUILD_BUG macros with Linux. (Notice
    Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)

    Let's convert error() into now treewide-available pr_err().

    Done with the help of Coccinelle, excluing tools/ directory.

    The semantic patch I used is as follows:

    //
    @@@@
    -error
    +pr_err
    (...)
    //

    Signed-off-by: Masahiro Yamada
    Reviewed-by: Simon Glass
    [trini: Re-run Coccinelle]
    Signed-off-by: Tom Rini

    Masahiro Yamada
     

22 Sep, 2017

1 commit

  • This driver is adapted from linux drivers/reset/reset-stm32.c
    It's compatible with STM32 F4/F7/H7 SoCs.

    This driver doesn't implement .of_match as it's binded
    by MFD RCC driver.

    To add support for each SoC family, a SoC's specific
    include/dt-binfings/mfd/stm32xx-rcc.h file must be added.

    This patch only includes stm32h7-rcc.h dedicated for STM32H7 SoCs.
    Other SoCs support will be added in the future.

    Signed-off-by: Patrice Chotard
    Reviewed-by: Simon Glass

    Patrice Chotard
     

30 Aug, 2017

2 commits


20 Aug, 2017

2 commits


29 Jul, 2017

2 commits


25 Jun, 2017

1 commit


06 Jun, 2017

1 commit

  • This deassert counter allow to manage "shared" reset lines
    encountered in some specific case. On STiH410 SoC, DWC3,
    EHCI and OHCI are all using a respective PHY, but all of
    these PHYs shared a "global" reset.

    Currently, during command "usb stop", all host controller are
    stopped (XHCI, EHCI and OHCI). XHCI is first shutdowned, which
    means that PHY global reset is asserted. Then EHCI is shutdowned,
    but its PHY reset has already been asserted which make handshake()
    call failed in ehci_shutdown().

    This counter allows to really assert a reset lines only when the
    "last" user is asserting it.

    Signed-off-by: Patrice Chotard
    Reviewed-by: Simon Glass

    Patrice Chotard
     

01 Jun, 2017

3 commits

  • Update the reset domain uclass to support livetree. Fix the xlate() method
    which has no callers.

    Signed-off-by: Simon Glass

    Simon Glass
     
  • These support the flat device tree. We want to use the dev_read_..()
    prefix for functions that support both flat tree and live tree. So rename
    the existing functions to avoid confusion.

    In the end we will have:

    1. dev_read_addr...() - works on devices, supports flat/live tree
    2. devfdt_get_addr...() - current functions, flat tree only
    3. of_get_address() etc. - new functions, live tree only

    All drivers will be written to use 1. That function will in turn call
    either 2 or 3 depending on whether the flat or live tree is in use.

    Note this involves changing some dead code - the imx_lpi2c.c file.

    Signed-off-by: Simon Glass

    Simon Glass
     
  • This header includes things that are needed to make driver build. Adjust
    existing users to include that always, even if other dm/ includes are
    present

    Signed-off-by: Simon Glass

    Simon Glass
     

10 May, 2017

1 commit


08 May, 2017

1 commit

  • Add Reset Driver for ast2500 SoC. This driver uses Watchdog Timer to
    perform resets and thus depends on it. The actual Watchdog device used
    needs to be configured in Device Tree using "aspeed,wdt" property, which
    must be WDT phandle, for example:

    rst: reset-controller {
    compatible = "aspeed,ast2500-reset";
    aspeed,wdt = ;
    }

    Signed-off-by: Maxim Sloyko
    Reviewed-by: Simon Glass

    maxims@google.com
     

27 Mar, 2017

1 commit

  • This patch adds a reset controller implementation for STMicroelectronics
    STi family SoCs; it allows a group of related reset like controls found
    in multiple system configuration registers to be represented by a single
    controller device.

    Driver code has been mainly extracted from kernel
    drivers/reset/sti/reset-stih407.c

    Signed-off-by: Patrice Chotard

    Patrice Chotard
     

08 Feb, 2017

1 commit

  • At present devices use a simple integer offset to record the device tree
    node associated with the device. In preparation for supporting a live
    device tree, which uses a node pointer instead, refactor existing code to
    access this field through an inline function.

    Signed-off-by: Simon Glass

    Simon Glass
     

14 Oct, 2016

1 commit

  • These have now landed upstream. The naming is different and in one case the
    function signature has changed. Update the code to match.

    This applies the following upstream commits by
    Thierry Reding :

    604e61e fdt: Add functions to retrieve strings
    8702bd1 fdt: Add a function to get the index of a string
    2218387 fdt: Add a function to count strings

    Signed-off-by: Simon Glass

    Simon Glass
     

10 Oct, 2016

1 commit


28 Sep, 2016

1 commit

  • Implement a reset uclass driver for the Tegra CAR. This allows clients to
    use standard reset APIs on Tegra. This device is intended to be
    instantiated by the core Tegra CAR driver, rather than being instantiated
    directly from DT. The implementation uses the existing custom Tegra-
    specific reset APIs to avoid coupling the series with significant
    refactoring of the existing Tegra clock/reset code.

    Signed-off-by: Stephen Warren
    Signed-off-by: Tom Warren

    Stephen Warren
     

16 Aug, 2016

1 commit

  • In Tegra186, on-SoC reset signals are manipulated using IPC requests to
    the BPMP (Boot and Power Management Processor). This change implements a
    driver that does that. It is unconditionally selected by CONFIG_TEGRA186
    since virtually any Tegra186 build of U-Boot will need the feature.

    Signed-off-by: Stephen Warren
    Reviewed-by: Simon Glass
    Signed-off-by: Tom Warren

    Stephen Warren
     

20 Jun, 2016

2 commits

  • This adds a sandbox reset implementation (provider), a test client
    device, instantiates them both from Sandbox's DT, and adds a DM test
    that excercises everything.

    Signed-off-by: Stephen Warren
    Acked-by: Simon Glass

    Stephen Warren
     
  • A reset controller is a hardware module that controls reset signals that
    affect other hardware modules or chips.

    This patch defines a standard API that connects reset clients (i.e. the
    drivers for devices affected by reset signals) to drivers for reset
    controllers/providers. Initially, DT is the only supported method for
    connecting the two.

    The DT binding specification (reset.txt) was taken from Linux kernel
    v4.5's Documentation/devicetree/bindings/reset/reset.txt.

    Signed-off-by: Stephen Warren
    Acked-by: Simon Glass

    Stephen Warren