14 Dec, 2017

1 commit

  • This drops the limit that fpga is only loaded from FIT images for Xilinx.
    This is done by moving the 'partial' check from 'common/image.c' to
    'drivers/fpga/xilinx.c' (the only driver supporting partial images yet)
    and supplies a weak default implementation in 'drivers/fpga/fpga.c'.

    Signed-off-by: Simon Goldschmidt
    Tested-by: Michal Simek (On zcu102)
    Signed-off-by: Michal Simek

    Goldschmidt Simon
     

27 Jan, 2016

1 commit


21 Jan, 2015

2 commits


20 May, 2014

3 commits


24 Jul, 2013

1 commit


06 May, 2013

4 commits


02 Apr, 2013

1 commit

  • 'bool' is defined in random places. This patch consolidates them into a
    single header file include/linux/types.h, using stdbool.h introduced in C99.

    All other #define, typedef and enum are removed. They are all consistent with
    true = 1, false = 0.

    Replace FALSE, False with false. Replace TRUE, True with true.
    Skip *.py, *.php, lib/* files.

    Signed-off-by: York Sun

    York Sun
     

01 Aug, 2011

1 commit

  • Fix compiler warning:

    cmd_fpga.c:318: warning: passing argument 3 of 'fit_image_get_data'
    from incompatible pointer type

    Adding the needed 'const' here entails a whole bunch of additonal
    changes all over the FPGA code.

    Signed-off-by: Wolfgang Denk
    Cc: Andre Schwarz
    Cc: Murray Jensen
    Acked-by: Andre Schwarz

    Wolfgang Denk
     

14 Oct, 2010

1 commit

  • The patch adds support to load a Lattice's bitstream
    image (called VME file) into a Lattice FPGA. The code
    containing the state machine delivered as part of
    Lattice's ispVMtools is integrated.

    The FPGA is programmed using the JTAG interface. The
    board maintainer must provide accessors to drive the
    JTAG signals TCK, TMS, TDI and to get the value of the
    input signal TDO.

    Signed-off-by: Stefano Babic

    Stefano Babic
     

03 Oct, 2009

1 commit

  • PPC boards are the only users of the current FPGA code which is littered
    with manual relocation fixups. Now that proper relocation is supported
    for PPC boards, remove FPGA manual relocation.

    Signed-off-by: Peter Tyser

    Peter Tyser
     

19 Oct, 2008

1 commit


21 May, 2008

1 commit

  • This commit gets rid of a huge amount of silly white-space issues.
    Especially, all sequences of SPACEs followed by TAB characters get
    removed (unless they appear in print statements).

    Also remove all embedded "vim:" and "vi:" statements which hide
    indentation problems.

    Signed-off-by: Wolfgang Denk

    Wolfgang Denk
     

13 Oct, 2005

1 commit


22 Aug, 2002

1 commit