13 Dec, 2017
19 commits
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The old CodingStyle document has been converted to ReST and moved
elsewhere. Link to the web version of this document instead.Signed-off-by: Baruch Siach
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These ifdefs are protecting #include statements for files that have
never existed. AFAICT this hardware.h has been copied from the kernel
and the ifdefs have never served a role in U-Boot, so delete them.Signed-off-by: Tuomas Tynkkynen
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Some QEMUs have a problem with time setup that's why
sleep test is failing. Introduce env__sleep_accurate
boardenv variable to have an option to skip sleep test.Signed-off-by: Michal Simek
Reviewed-by: Tom Rini
Reviewed-by: Stephen Warren -
- avoid disturbing 0MiB partition size (in fact < 1MiB)
- test overlap limit between part1 and part2
- test gpt write with data with modifier 'M' for MiBSigned-off-by: Patrick Delaunay
Reviewed-by: Stephen Warren -
For external data, FIT has a optional property "data-position" which
can set the external data to a fixed offset to FIT beginning.
Add the support for this property in SPL FIT.Signed-off-by: Ye Li
Signed-off-by: Peng Fan
Reviewed-by: Simon Glass
Reviewed-by: Tomas Melin
Cc: Pantelis Antoniou
Cc: "Andrew F. Davis"
Cc: Igor Grinberg
Cc: "tomas.melin@vaisala.com"
Cc: Kever Yang
Cc: Andre Przywara
Cc: York Sun
Cc: Lokesh Vutla
Cc: "Cooper Jr., Franklin"
Cc: George McCollister
Cc: Tuomas Tynkkynen
Cc: Jean-Jacques Hiblot
Cc: Rick Altherr
Cc: Tom Rini
Reviewed-by: Lokesh Vutla
Reviewed-by: York Sun -
Falcon mode was already working with SD card. This enables the
unlocking of NAND to allow the NAND read & write. This also
expands the README file based on the am335x describing how to
setup Falcon mode.Signed-off-by: Adam Ford
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The Micron Flash is locked by default. This will automaticlly
unlock so manually unlocking is unnecessary in U-Boot.Signed-off-by: Adam Ford
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The SPL-OS partition is 0x20000, so let's make
CONFIG_CMD_SPL_WRITE_SIZE same size. This should allow for better
falcon mode operation.Signed-off-by: Adam Ford
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A typo in the probe function causes not all peripherals to be scanned
(in the case of the Dragonboard820c - work in progress - it wont find pmic0). -
Signed-off-by: Tuomas Tynkkynen
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This symbol enables some library code used by various SATA drivers,
so make this a non-user-visible symbol select'ed by the respective
drivers, and let moveconfig handle the rest.Signed-off-by: Tuomas Tynkkynen
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And use 'imply' liberally.
Signed-off-by: Tuomas Tynkkynen
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Signed-off-by: Tuomas Tynkkynen
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Use 'imply' here liberally to avoid the combinatorial explosion of
defconfig changes in the PowerPC boards.Signed-off-by: Tuomas Tynkkynen
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Signed-off-by: Tuomas Tynkkynen
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Signed-off-by: Tuomas Tynkkynen
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Use 'imply' here liberally to avoid the combinatorial explosion of
defconfig changes in the PowerPC boards.Signed-off-by: Tuomas Tynkkynen
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The last user of this driver went away in August 2015 in commit:
b6073fd2115 ("arm: Remove mx51_efikamx, mx51_efikasb boards")Signed-off-by: Tuomas Tynkkynen
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The last user of this driver went away in June 2017, in commit:
98f705c9ce ("powerpc: remove 4xx support")Signed-off-by: Tuomas Tynkkynen
12 Dec, 2017
4 commits
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This driver really is DM GPIO one and so we need to have a correct
dependency, because DM alone doesn't provide required for CMD_GPIO
call and we're seeing build failures like this:
---------------------->8---------------------
cmd/built-in.o: In function 'do_gpio':
.../cmd/gpio.c:188: undefined reference to 'gpio_request'
...
---------------------->8---------------------Signed-off-by: Alexey Brodkin
Cc: Eugeniy Paltsev
Cc: Simon Glass
Reviewed-by: Simon Glass
11 Dec, 2017
11 commits
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It is tedious to define both mask and bit-shift.
provides a convenient way to get access to register fields with a
single shifted mask.Signed-off-by: Masahiro Yamada
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Use DIV_ROUND_CLOSEST(). To make the JK value even more precise,
I used a bigger coefficient, then divide it by 512.Signed-off-by: Masahiro Yamada
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Commit 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC")
missed to write the computed value to the SSCPLLCTRL2 register.Fixes: 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC")
Signed-off-by: Dai Okamura
Signed-off-by: Masahiro Yamada -
denali.c has no driver entry in itself. It makes sense only when
compiled together with denali_dt.cLet NAND_DENALI_DT select NAND_DENALI, and hide NAND_DENALI from
the Kconfig menu.Signed-off-by: Masahiro Yamada
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Fix the link error for the combination of
CONFIG_ARCH_UNIPHIER_LD11=n
CONFIG_ARCH_UNIPHIER_LD20=n
CONFIG_ARCH_UNIPHIER_PXS3=ySigned-off-by: Masahiro Yamada
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Synopsys HSDK clock controller generates and supplies clocks to various
controllers and peripherals within the SoC.Each clock has assigned identifier and client device tree nodes can use
this identifier to specify the clock which they consume. All available
clocks are defined as preprocessor macros in the
dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device
tree sources.Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin -
dcache_exists, icache_exists, slc_exists and ioc_exists global
variables in "arch/arc/lib/cache.c" remain uninitialized if
SoC doesn't have corresponding HW.This happens because we use the next constructions for their
definition and initialization:
-------------------------->>---------------------
int ioc_exists __section(".data");if (/* condition */)
ioc_exists = 1;
-------------------------->>---------------------That's quite a non-trivial issue as one may think of it.
The point is we intentionally put those variables in ".data" section
so they might survive relocation (remember we initilaize them very early
before relocation and continue to use after reloaction). While being
non-initialized and not explicitly put in .data section they would end-up
in ".bss" section which by definition is filled with zeroes.
But since we place those variables in .data section we need to care
about their proper initialization ourselves.Also while at it we change their type to "bool" as more appropriate.
Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin -
Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin -
ARCNUM [15:8] field in ARC_AUX_IDENTITY register allows us to
uniquely identify each core in a multi-core system.I.e. with help of this macro each core may get its index in SMP system.
Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin -
DW SDIO controller has external CIU clock divider controlled via
register in the SDIO IP. Due to its unexpected default value
(we expected it to divide by 1 but in reality it divides by 8)
SDIO IP uses wrong CIU clock (it should be 100000000Hz but actual
is 12500000Hz) and works unstable (see STAR 9001204800).So increase SDIO CIU frequency from actual 12500000Hz to 50000000Hz
by switching from the default divisor value (div-by-8) to the
minimum possible value of the divisor (div-by-2) in HSDK platform
code.Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin -
With CONFIG_CMD_GPIO compilation reports error:
-------------------------->8---------------------
common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory
#include
^
-------------------------->8---------------------Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin
09 Dec, 2017
1 commit
08 Dec, 2017
5 commits
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Linux preserves leading zeros in /proc/cpuinfo, so we
should as well.Otherwise we have the situation that
/sys/firmware/devicetree/base/serial-number
and /proc/cpuinfo disagree in Linux.Signed-off-by: Jakob Unterwurzacher
Reviewed-by: Philipp Tomsich
Acked-by: Philipp Tomsich -
Commit 21f4486faa5d ("armv8: update gd after relocate") sets x18
without checking the return value of spl_relocate_stack_gd().Reviewed-by: Stephen Warren
Signed-off-by: York Sun
CC: Kever Yang
CC: Philipp Tomsich -
Add documentation for the log system.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
