10 Mar, 2014
1 commit
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Add support for using the Atmel MCI driver on at91sam9263ek.
This change is modeled after the existing at91sam9260ek support.Please note that this hooks up slot1 (MCI1) for SD. Not both.
Tested with at91bootstrap and u-boot on dataflash in slot 0
and fat-formatted 8GB SDHC in slot 1 on first revision
at91sam9263ek (which must use dataflash in slot0 to boot).CONFIG_ATMEL_MCI_PORTB not tested.
Signed-off-by: Andreas Henriksson
[remove empty line]
Signed-off-by: Andreas Bießmann
06 Mar, 2014
4 commits
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In order to completely halt the AVP processor, we should simply write
FLOW_MODE_STOP without any extra options that allow wakeup. Amend the
code to do this.I believe that enabling FIQ_1 and IRQ_1 allow the CPU to be awoken by
interrupts. We don't want this; if later SW wishes to use the AVP, it
should be reset and booted from scratch.Related, the bits that were previously IRQ_1 and FIQ_1 have a slightly
different definition starting with Tegra114, so the values we're
writing don't entirely make sense there anyway.Signed-off-by: Stephen Warren
Signed-off-by: Tom Warren -
Tegra124 moved the CSITE block's base address. Fix U-Boot to use
the correct address.Signed-off-by: Stephen Warren
Signed-off-by: Tom Warren -
Register pmc_pwrgate_timer_mult has a different layout on Tegra114 and
Tegra124. Reflect this in pmc.h.Also, simply write the whole of the register in start_cpu() rather than
doing a read-modify-write; the register is simple enough that the code
can easily construct the entire desired value.Signed-off-by: Stephen Warren
Signed-off-by: Tom Warren -
needs to use CONFIG_TEGRA* to conditionalize
some definitions, since some modules moved between generations. Move
the definition of CONFIG_TEGRAnn to a header that's included earlier,
so that it's set by the time tegra.h needs to use it.Signed-off-by: Stephen Warren
Signed-off-by: Tom Warren
04 Mar, 2014
4 commits
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The bit DDR3_RST_DEF_VAL inside CTRL_DDR_IO represents the default value
of the ddr reset value for DDR3 before the EMIF takes over. We must have
this bit set high so that on exit from DeepSleep0 within the kernel the
reset line has the proper value.Signed-off-by: Dave Gerlach
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The register secure_emif_sdram_config in control module is copied to
the EMIF sdram_config register when it is coming out of DeepSleep0 in
order to ensure that the EMIF comes up for the correct type of DDR.
Without this, resume can hang from within the kernel.Signed-off-by: Dave Gerlach
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Per a suggestion from the hardware team, program the emif_pwr_mgmt_ctrl
and emif_pwr_mgmt_ctrl_shdw registers within the EMIF to hold the
desired delay in cycles that the EMIF waits without an access to enter
self-refresh, in this case 8192 cycles. With this, code desiring to
enter self refresh only has to toggle one bit to enable it.Signed-off-by: Dave Gerlach
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Enable CPGMAC clock control for AM43xx to use ethernet in U-Boot
Signed-off-by: Mugunthan V N
27 Feb, 2014
4 commits
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Conflicts:
arch/arm/cpu/armv7/config.mk
board/ti/am43xx/mux.c
include/configs/am43xx_evm.hSigned-off-by: Tom Rini
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When we tell the compiler to optimize for ARMv7 (and ARMv6 for that
matter) it assumes a default of SCTRL.A being cleared and unaligned
accesses being allowed and fast at the hardware level. We set this bit
and must pass along -mno-unaligned-access so that the compiler will
still breakdown accesses and not trigger a data abort.To better help understand the requirements of the project with respect
to unaligned memory access, the
Documentation/unaligned-memory-access.txt file has been added as
doc/README.unaligned-memory-access.txt and is taken from the v3.14-rc1
tag of the kernel.Cc: Albert ARIBAUD
Cc: Mans Rullgard
Signed-off-by: Tom Rini -
Remove the last uses of symbol offsets in ARM U-Boot.
Remove some needless uses of _TEXT_BASE.
Remove all _TEXT_BASE definitions.Signed-off-by: Albert ARIBAUD
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This prevents references to _end from generating absolute
relocation records.This change is binary invariant for ARM targets.
Signed-off-by: Albert ARIBAUD
26 Feb, 2014
8 commits
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With this, fixup a trivial build error of get_effective_memsize needing
to be updated in the new board/freescale/p1010rdb/spl.cSigned-off-by: Tom Rini
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arch/arm/cpu/armv7/omap-common/config.mk is never included
because "omap-common" is not SoC name.If we want to add OMAP-specific compiler flags,
they must be added to omap3/config.mk, omap4/config.mk, omap5/config.mk.Signed-off-by: Masahiro Yamada
Cc: Tom Rini -
This commit avoids generating ./SPL twice.
- Fist time descending to spl/
- Second time as a prerequisite of u-boot-with-spl.imx,
u-boot-with-nand-spl.imx.Signed-off-by: Masahiro Yamada
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Signed-off-by: Masahiro Yamada
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Signed-off-by: Masahiro Yamada
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Move sandbox-specific link rule to arch/sandbox/config.mk.
Signed-off-by: Masahiro Yamada
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Signed-off-by: Masahiro Yamada
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Rename OBJCFLAGS to OBJCOPYFLAGS beforehand to use
"cmd_objcopy" in scripts/Makefile.lib in an upcoming commit.Signed-off-by: Masahiro Yamada
25 Feb, 2014
1 commit
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- fix serdes definition for t2081.
- fix clock speed for t2081.
- update ids, as CONFIG_FSL_SATA_V2 is needed only for t2080,
T2081 has no SATA.Signed-off-by: Shengzhou Liu
Reviewed-by: York Sun
24 Feb, 2014
2 commits
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Signed-off-by: Masahiro Yamada
Cc: Tom Warren
Cc: Stephen Warren
Cc: Rajeshwari Birje
Cc: Inderpal Singh
23 Feb, 2014
2 commits
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Add bcm281xx architecture support code including a clock framework and
chip reset. Define register block base addresses for the bcm281xx
architecture and create an empty gpio header file required when
CONFIG_CMD_GPIO is set.Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger -
The Kona architecture is present on a number of Broadcom mobile SoCs
including the bcm281xx family of chips.Signed-off-by: Darwin Rambo
Reviewed-by: Steve Rae
Reviewed-by: Tim Kryger
22 Feb, 2014
7 commits
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The function pll_sigma_delta_val uses "float" data which is not correct.
The exact "why" of this mangling is lost to history, but this changes us
to equivalent non-FP math to get the same results.Reported-by: Wolfgang Denk
Acked-by: Matt Porter -
commit 194dd74ad919e57026f385aaab7f89acf7ea79ef
(DRA7: add ABB setup for MPU voltage domain)Made an offset typo error by using 0x4A003B24 as the efuse offset
for OPP_NOM. As per TI documentation, 0x4A003B24 is for OPP_OD, and
0x4A003B20 is for OPP_NOM. Fix the same.Reported-by: Praveen Rao
Signed-off-by: Nishanth Menon -
DDR timings were broken since 47abc3df701d8bc26f311350aa523fc1d0f8ad4e
for PandaBoard EA1.Signed-off-by: Janne Grunau
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Schematic indicates GPIO5_7 is to be used for VTT regulator control
rather than GPIO0_21 so modify enable_vtt_regulator to reflect this.
Without this some boards will experience DDR3 corruption and fail to
boot.Signed-off-by: Dave Gerlach
[trini: Rework patch against mainline]
Signed-off-by: Tom Rini -
Adds support for Bernecker & Rainer Industrieelektronik GmbH KWB
Motherboard, using TI's AM3352 SoC.Most of code is derived from TI's AM335x_EVM
Signed-off-by: Hannes Petermaier
Cc: trini@ti.com -
This patch add support for the Silica Pengwyn board [1]
The board is based on a TI AM3354 CPU [2]
All jumpers removed it will boot from the SDcard, the console is on
UART1 accessible via the FDTI -> USB. The on board NAND flash is
supported and can act as boot medium, depending on jumper settings.
USB Host, USB Device and Ethernet are also provided but untested.[1]
http://www.silica.com/product/silica-pengwyn-board.html
[2]
http://www.ti.com/product/am3354Signed-off-by: Lothar Felten
[trini: Move CONFIG_BOARD_LATE_INIT into am335x_evm.h, drop unused
spi0_pin_mux from Pengwyn support]
Signed-off-by: Tom Rini -
This function has been around for powerpc. It is used for systems with
memory more than CONFIG_MAX_MEM_MAPPED. In case of non-contiguous memory,
this feature can limit U-boot to one block without going over the limit.Signed-off-by: York Sun
Acked-by: Albert ARIBAUD
21 Feb, 2014
5 commits
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In case of little-endian ARC700 instructions (which may include target
address) are encoded as middle-endian. That's why it's required to swap
bytes after read and ten right before write back.But in case of big-endian ARC700 instructions are encoded as a plain
big-endian. Thus no need for byte swapping.Signed-off-by: Alexey Brodkin
Cc: Francois Bedard
Cc: Tom Rini
cc: Noam Camus -
With d6a320d we moved some clock externs out of blackfin_local.h and
into clock.h but now need to include in more drivers to
avoid warnings.Cc: Sonic Zhang
Signed-off-by: Tom Rini -
Commit 5ab502cb gathered all device tree sources
to arch/$(ARCH)/dts/.
So tegra124-venice2.dts also must go to arch/arm/dts directory
to build venice2 board.(Commit 5ab502cb had been posted before venice2 board support
was merged. So an unvisible conflict happened.)Acked-by: Stephen Warren
Signed-off-by: Masahiro Yamada
Cc: Simon Glass
Cc: Tom Rini
20 Feb, 2014
2 commits
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Conflicts:
Makefile
drivers/net/npe/MakefileThese two conflicts arise from commit 0b2d3f20
("ARM: NET: Remove the IXP NPE ethernet driver") and are
resolved by deleting the drivers/net/npe/Makefile file
and removing the CONFIG_IXP4XX_NPE line from Makefile. -
This file was only required for compilation of designware_i2c driver.
Since explicit inclusion of "hardware.h" is now removed from the driver
we may safely remove this empty header as well.Signed-off-by: Alexey Brodkin
Cc: Tom Rini
Cc: Heiko Schocher
Cc: Stefan Roese
Cc: Vipin Kumar
Cc: Armando Visconti