09 Nov, 2018
1 commit
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Some configs are missed in imx8mm_evk_fspi_defconfig file, so the FAT
commands are not supported in flexspi u-boot and cause kernel booting
failed from SD card.
Also add the missed splash screen configs for MIPI DSI.Signed-off-by: Ye Li
07 Nov, 2018
4 commits
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This intends to replace the FIT image support since that cannot be
authenticated. Instead, we append another container at the end of
flash.bin, this new one containing a new container with two
images representing the ATF and uboot proper.Signed-off-by: Abel Vesa
Reviewed-by: Ye Li -
Since from B0 TO, there is a Mirror of JTAG ID register added in
SIM. We can read the part revision from this register.
Update codes to use this register.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
The power domain driver is not ready when running board_early_init_f,
but we call it imx8qxp_gpmi_nand_initialize. so this cause u-boot reset
in early stage.Signed-off-by: Ye Li
Tested-by: Han Xu -
When booting from NAND/SPINOR/WEIMNOR boot devices, the fastboot will
print "unsupported boot device". This warning is used by android fastboot
when setting its "bootcmd". Since android does not support these devices.
so it gives the warning correctly.
But for BSP normal boot, this warning will bring confuse to users. So
change to check the "bootcmd" before giving such warning.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
06 Nov, 2018
1 commit
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When using gcc 4.9 to build SPL, the image size is beyond current
limitation 128KB. This gcc version is used in android tool chain. So
enlarge the SPL max size to 148KB. This value is also aligned with
other imx8mq/mm boards settings.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
03 Nov, 2018
27 commits
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added emmc_dev and sd_dev
Signed-off-by: Frank Li
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Refact the i.MX8MQ dram init flow to reuse the common dram
driver used by i.MX8MM.Signed-off-by: Bai Ping
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Sometimes, SPL need to pass the trained FSP drate to ATF
if DDR PHY bypass mode is not enabled. So add a fsp_table
to pass these info to ATF. additionally, add more clock
frequency point config to support for code reuse for i.MX8MQ.Signed-off-by: Bai Ping
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Change the dram_pll_init function API to make it same
as i.MX8MM, so the dram init flow can use call the same
API for these two different SOC.Signed-off-by: Bai Ping
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Because u-boot USB gadget only can support one driver, so if we enable
ci_udc driver, the cdns3 gadget driver must be disabled. This cause build
error because we don't wrap the cdns gadget functions with its configuration.Fix the issue by adding CONFIG_USB_CDNS3_GADGET before cdns3 gadget function.
Signed-off-by: Ye Li
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On iMX8 platforms like 8QM/QXP, we must power up the USB PHY resource
before accessing the PHY. However, current init flow access the USB PHY
in ehci_mx6_common_init prior than ehci_usb_phy_mode where the PHY is power
up.Fix the issue by adding ehci_get_usb_phy function to parse the PHY address
from DTB and power up the PHY before ehci_mx6_common_init.Signed-off-by: Ye Li
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Because the iMX8MQ DDR4 ARM2 has 4GB DDR. To fit new MMU settings, we split
it to two banks. The first bank has 3GB DDR, reach to 4GB memory map.
The second bank has 1GB DDR, is beyond 4GB memory map.Notice: there is no OPTEE for ARM2 board. The trust zone setting in OPTEE
for iMX8MQ EVK is not match with DDR size on ARM2 board. So ARM2 Only can
work without OPTEE.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
When running with OPTEE, the MMU table in u-boot does not remove the OPTEE
memory from its settings. So ARM speculative prefetch in u-boot may access
that OPTEE memory. Due to trust zone is enabled by OPTEE and that memory
is set to secure access, then the speculative prefetch will fail and cause
various memory issue in u-boot.
The fail address register and int_status register in trustzone has logged
that speculative access from u-boot.Signed-off-by: Ye Li
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Type "ulong" will be 32 bits long on imx6/7 but we may have
userdate partition more than 4G on 32 bits platforms. Use
"uint64_t" instead of "ulong" here to fix this issue.Test: Get correct userdata partition size on both imx6dl
and imx8qxp.Change-Id: Ia6b242f3998a65b157737e83da0ad3126b689713
Signed-off-by: Ji Luo -
Signed-off-by: Clement Le Marquis
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Add useful documentation for encrypted boot:
- Add 2 CSF examples for encrypt and sign
- How to encrypt and sign a U-Boot binary on closed device
- Why and how increase the PRIBLOB bitfield from CAAM SCFGRSigned-off-by: Clement Le Marquis
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When building mxc_spi driver on ARM64 platforms like iMX8MM, get
such build warnings below. Fix it in this patch.In file included from include/common.h:48:0,
from drivers/spi/mxc_spi.c:9:
drivers/spi/mxc_spi.c: In function ‘spi_xchg_single’:
drivers/spi/mxc_spi.c:232:21: warning: cast from pointer to integer of
different size [-Wpointer-to-int-cast]
_func_, bitlen, (u32)dout, (u32)din);
^
include/log.h:135:26: note: in definition of macro ‘debug_cond’
printf(pr_fmt(fmt), ##args); \
^~~~
drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’
debug("%s: bitlen %d dout 0x%x din 0x%x\n",
^~~~~
drivers/spi/mxc_spi.c:232:32: warning: cast from pointer to integer of
different size [-Wpointer-to-int-cast]
_func_, bitlen, (u32)dout, (u32)din);
^
include/log.h:135:26: note: in definition of macro ‘debug_cond’
printf(pr_fmt(fmt), ##args); \
^~~~
drivers/spi/mxc_spi.c:231:2: note: in expansion of macro ‘debug’
debug("%s: bitlen %d dout 0x%x din 0x%x\n",
^~~~~Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
iMX8MM DDR3L validation board uses FPGA to link with SPI NOR flash
on ECSPI1 port. Update the codes and configurations to enable the
ECSPI1 to access SPI NOR in u-boot.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
iMX8MM DDR3L validation board uses GD25LQ16, but its id is not in
u-boot flash ids table. Add the new id and parameters into the table.Signed-off-by: Ye Li
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Generate the key blob and store it to the last block of boot1 partition
after setting the rpmb key. The key blob should be checked in spl and be
passed to Trusty OS if it's valid. If the key blob are damaged, RPMB
storage proxy service will return fail and should make the device hang.Test: Build and boot ok on imx8qm/qxp.
Change-Id: Ia274cd72109ab6ae15920e91b2a2008e1f1e667c
Signed-off-by: Ji Luo -
Add new hwcrypto tipc command and handler to generate blob with
CAAM.Test: Message exchange with trusty and blob encapsulate/decapsulate ok.
Change-Id: I925b47cb3e22eeddf4c89e84a9c994d2f30423fe
Signed-off-by: Ji Luo -
Use CAAM to accelerate SHA256 hash calculation in AVB,
this will reduce u-boot boot time, about 570ms can be
saved for imx8qxp.Test: Build and boot ok for imx8qxp.
Change-Id: Idbbd781e5ad8e7d6cd8865190d7547c165d02190
Signed-off-by: Ji Luo -
Add new service 'hwcrypto' to handle CAAM related work
with Trusty OS. Add tipc interface to accelerate hash
calculation with CAAM.Test: Service connect and message exchange with Trusty OS
are ok.Change-Id: Ia870c3ad2ff30af987f327a9777a8b32f53593db
Signed-off-by: Ji Luo -
Add defconfig for nand on lpddr4 arm2 board
Signed-off-by: Teo Hall
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Add include files necessary for supporting SPL on QXP
ARM2 boardSigned-off-by: Teo Hall
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Add implementation necessary for supporting SPL on QXP
ARM2 board with dynamic offset detection from container header.Signed-off-by: Teo Hall
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The first DRAM BANK size should be 2GB and the load addr
are 0x80080000.Signed-off-by: Peng Fan
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If the resource is not owned by current partition, not assign it
to DomU.Signed-off-by: Peng Fan
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Signed-off-by: Frank Li
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The iMX7ULP B0 chip has added more pins for muxing USB ID. The A3 board
follows it to exploit PTC13 for USB ID, so we don't need to use GPIO
any longer. The USB driver can recognize the USB mode from USB PHY.After this change, old boards with design using GPIO for USB mode won't
be supported.Signed-off-by: Ye Li
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Align the new pinfunc names with header file for all iMX7ULP EVK and ARM2
DTS files.
Also update the EVK DTS files to align with kernel for Rev A3
board. Removed the extcon node for USB ID, since A3 board uses USB ID pin
not GPIO.Signed-off-by: Ye Li
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i.MX7ULP B0 silicon has below updates in iomux
- GPIO function input buffer enable (IBE)/output buffer enable (OBE) is
now controlled by RGPIO module. IOMUXC IBE/OBE is used as an override.
- LPUART2_TX (I/O) to PTB12 (ALT4)
- LPUART2_RX (I) to PTB13 (ALT4)
- USB0_ID (I) to PTC13 (ALT11), PTC18 (ALT11) and PTC19 (ALT10)
- VIU_DE (I) to PTC18 (ALT12), PTC19 (ALT12) and PTE5 (ALT12)
- RTC_CLKOUT (O) to PTB5 (ALT11) and PTB14 (ALT11)
- SEC_VIO_B (I) to PTB4 (ALT11)
- Added new Input Selection Registers
PSMI1_USB0_ID Address: 0x40ac_0338 To select USB_ID input pad/source
PSMI1_VIU_DE Address: 0x40ac_033c To select VIU_DE input pad/sourceCopy the imx7ulp-pinfunc.h from latest kernel dts
(commit 18cdeadfe1967ea33d3bdfc7ccead6d6d06a98a6), and update
the mx7ulp-pins.h accordingly.Signed-off-by: Ye Li
29 Oct, 2018
2 commits
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Update API files generated from latest SCFW commit:
commit b5dbcf59157cf758da2b96c395e3f4cb2674437f
Author: Ranjani Vaidyanathan
Date: Sat Oct 27 02:04:47 2018 -0500SCF-248 Fix Linux boot fail on iMX8QX
Signed-off-by: Ye Li
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In flexspi driver, each sf command will disable the module in release bus
function. So reading from flexspi memory-map address using "md" command
can't work. When iMX8MM kicks M4 image to run flexspi NOR XIP,
this causes problem.Signed-off-by: Ye Li
27 Oct, 2018
1 commit
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enable CE_1 IOMUX setting for NAND on i.MX8MM EVK
Signed-off-by: Han Xu
26 Oct, 2018
2 commits
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Open configs to enable spl build for imx8q on both
Android and Android Auto.Change-Id: Ide757086ad0208973ac8510ba4a2f1c84aecdfad
Signed-off-by: Luo Ji -
Currently the clocks and power of USB controller and USB PHY are both
controlled by ehci-mx6 driver in device probe. However, the function
"ehci_usb_ofdata_to_platdata" calls "ehci_usb_phy_mode"
to access PHY registers when "dr_mode" is set to OTG, both "dr_mode" and
"extcon" properties are not set in DTB. This may cause hang at accessing
USB PHY registers if the power and clocks are not enabled.Change the usb type logic to more clear way:
1. plat->init_type: The requested USB mode type from uplayers
2. priv->init_type: The USB mode type specified by DTB or by the USB ID pin or
by external controller like tcpc or GPIO.
3. If two init_type are not same, return failure. Align with non-DM driver.
4. USB PHY access is moved after power and clock enabled.Signed-off-by: Ye Li
25 Oct, 2018
2 commits
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Update the RFSHCTL3 config for DDR4.
Signed-off-by: Bai Ping
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Add DDR3 init codes, board codes, defconfig and DTS into u-boot.
Basic modules are ready: SD, UART, I2C, USB host and NAND.There is a FPGA on this board. It controls WDOG_B, and ENET PHY RESET.
So reset and ethernet won't work at default.Signed-off-by: Ye Li
Acked-by: Peng Fan