14 Oct, 2016
1 commit
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The signature for this macro has changed. Bring in the upstream version and
adjust U-Boot's usages to suit.Signed-off-by: Simon Glass
Update to drivers/power/pmic/palmas.c:
Signed-off-by: KeerthyChange-Id: I6cc9021339bfe686f9df21d61a1095ca2b3776e8
12 Oct, 2016
2 commits
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vbe_setup_video_priv() might be useful to other drivers.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
With DM conversion, information like "Video: 1024x768x16" is not
shown anymore. Now add these verbose output back.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
11 Oct, 2016
1 commit
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Provide a function to run the Vesa BIOS for a given PCI device and obtain
the resulting configuration (e.g. display size) for use by the video
uclass. This makes it easier to write a video driver that uses vesa and
supports driver model.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
24 Sep, 2016
1 commit
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Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content. (both just wrap )Replace all include directives for with .
Signed-off-by: Masahiro Yamada
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini
21 Sep, 2016
2 commits
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In pci_uclass_pre_probe an attempt is made to detect whether the parent
of a device is a PCI device and that the device is thus a bridge. This
was being done by checking whether the parent of the device is of the
UCLASS_ROOT class. This causes problems if the PCI controller is a child
of some other non-PCI node, for example a simple-bus node.For example, if the device tree contains something like the following
then pci_uclass_pre_probe would incorrectly believe that the PCI
controller is a bridge, with a PCI parent:/ {
some_child {
compatible = "simple-bus";
#address-cells = ;
#size-cells = ;
ranges = <>;pci_controller: pci@10000000 {
compatible = "my-pci-controller";
device_type = "pci";
reg = ;
};
};
};Avoid this incorrect detection of bridges by instead checking whether
the parent devices class is UCLASS_PCI and treating a device as a bridge
when this is true, making use of device_is_on_pci_bus to perform this
test.Signed-off-by: Paul Burton
Reviewed-by: Simon Glass -
This patch adds a driver for the Xilinx AXI bridge for PCI express, an
IP block which can be used on some generations of Xilinx FPGAs. This is
mostly a case of implementing PCIe ECAM specification, but with some
quirks about what devices are valid to access.Signed-off-by: Paul Burton
Reviewed-by: Simon Glass
16 Aug, 2016
1 commit
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Tegra186 supports the new standard clock, reset, and power domain APIs.
Older Tegra SoCs still use custom APIs. Enhance the Tegra PCIe driver so
that it can operate with either set of APIs.On Tegra186, the BPMP handles all aspects of PCIe PHY (UPHY) programming.
Consequently, this logic is disabled too.Signed-off-by: Stephen Warren
Reviewed-by: Simon Glass
Signed-off-by: Tom Warren
28 Jul, 2016
4 commits
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Signed-off-by: Tim Harvey
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Quite a few places have a bind() method which just calls dm_scan_fdt_dev().
We may as well call dm_scan_fdt_dev() directly. Update the code to do this.Signed-off-by: Simon Glass
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This new function is more convenient for callers, and handles pre-relocation
situations automatically.Signed-off-by: Simon Glass
12 Jul, 2016
4 commits
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On some boards, the current 20ms timeout
is hit. Increase it to 40mS.Signed-off-by: Stefano Babic
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For consistency with board_should_run_oprom(), do the same to
should_load_oprom(). Board support codes can provide this one
to override the default weak one.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
At present should_load_oprom() calls board_should_run_oprom() to
determine whether oprom should be loaded. But sometimes we just
want to load oprom without running. Make them independent.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass -
This option is defined at nowhere. Remove it.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
06 Jul, 2016
2 commits
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On recent SoCs, tegra_pcie_phy_enable() isn't called; but instead
tegra_pcie_enable_controller() calls tegra_xusb_phy_enable(). However,
part of tegra_pcie_phy_enable() needs to happen in all cases. Move that
code to tegra_pcie_port_enable() instead.For reference, NVIDIA's downstream Linux kernel performs this operation
in tegra_pcie_enable_rp_features(), which is called immediately after
tegra_pcie_port_enable(). Since that function doesn't exist in the U-Boot
driver, we'll just add it to the tail of tegra_pcie_port_enable() instead.Signed-off-by: Stephen Warren
Signed-off-by: Tom Warren -
The value that should be programmed into the PADS_REFCLK register varies
per SoC. Fix the Tegra PCIe driver to program the correct values. Future
SoCs will require different values in cfg0/1, so the two values are stored
separately in the per-SoC data structures.For reference, the values are all documented in NV bug 1771116 comment 20.
The Tegra210 value doesn't match the current TRM, but I've filed a bug to
get the TRM fixed. Earlier TRMs don't document the value this register
should contain, but the ASIC team has validated all these values, except
for the Tegra20 value which is simply left unchanged in this patch.Signed-off-by: Stephen Warren
Signed-off-by: Tom Warren
04 Jun, 2016
1 commit
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When multiple PCI cards are present in an ls2080a board, the second
card does not get its msi-map set up properly due to a bug in
computing the bus number.The bus number returned by PCI_BDF() is not the actual PCI bus
number, but instead represents a global u-boot PCI bus number. A
given bus number is relative to hose->first_busno, so that has to be
subtracted from the PCI device id.Signed-off-by: Bogdan Purcareata
Acked-by: Stuart Yoder
Reviewed-by: York Sun
17 May, 2016
1 commit
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This option is not used by any board. Drop it.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
05 May, 2016
1 commit
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Tegra20's PCIe controller has a couple of quirks. There are workarounds in
the driver for these, but they don't work after the DM conversion:1) The PCI_CLASS value is wrong in HW.
This is worked around in pci_tegra_read_config() by patching up the value
read from that register. Pre-DM, the PCIe core always read this via a
16-bit access to the 16-bit offset 0xa. With DM, 32-bit accesses are used,
so we need to check for offset 0x8 instead. Mask the offset value back to
32-bit alignment to make this work in all cases.2) Accessing devices other than dev 1 causes a data abort.
Pre-DM, this was worked around in pci_skip_dev(), which the PCIe core code
called during enumeration while iterating over a bus. The DM PCIe core
doesn't use this function. Instead, enhance tegra_pcie_conf_address() to
validate the bdf being accessed, and refuse to access invalid devices.
Since pci_skip_dev() isn't used, delete it.I've also validated that both these WARs are only needed for Tegra20, by
testing on Tegra30/Cardhu and Tegra124/Jetson TKx. So, compile them in
conditionally.Fixes: e81ca88451cf ("dm: tegra: pci: Convert tegra boards to driver model for PCI")
Signed-off-by: Stephen Warren
Reviewed-by: Thierry Reding
Reviewed-by: Simon Glass
Signed-off-by: Tom Warren
26 Apr, 2016
1 commit
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The terminal condition in the area where a PCI device is scanned is wrong,
and 1f.7 isn't scanned.Signed-off-by: Yoshinori Sato
Reviewed-by: Bin Meng
22 Mar, 2016
2 commits
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msi-map properties are used to tell an OS how PCI requester IDs are
mapped to ARM SMMU stream IDs.for all PCI devices discovered in a system:
-allocate a LUT (look-up-table) entry in that PCI controller
-allocate a stream ID for the device
-program and enable a LUT entry (maps PCI requester id to stream ID)
-set the msi-map property on the controller reflecting the
LUT mappingbasic bus scanning loop/logic was taken from drivers/pci/pci.c
pci_hose_scan_bus().Signed-off-by: Stuart Yoder
Reviewed-by: York Sun -
Remove stream ID partitioning support that has been made
obsolete by upstream device tree bindings that specify how
representing how PCI requester IDs are mapped to MSI specifiers
and SMMU stream IDs.Signed-off-by: Stuart Yoder
Reviewed-by: York Sun
17 Mar, 2016
2 commits
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Two comments are missing a parameter and there is an extra blank line. Also
two of the region access macros are misnamed. Correct these problems.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
It is common to read a config register value, clear and set some bits, then
write back the updated value. Add functions to do this in one step, for
convenience.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
15 Mar, 2016
2 commits
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Each region is displayed in almost the same way. Break out this common code
into its own function.Signed-off-by: Simon Glass
Tested-by: Stephen Warren -
Use this new function in places where it simplifies the code.
Signed-off-by: Simon Glass
26 Feb, 2016
1 commit
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Fix the following compiler warnings when DEBUG is on.
warning: 'bar_res' may be used uninitialized in this function.
drivers/pci/pci_auto.c:101:21:
if (!enum_only && pciauto_region_allocate(bar_res, bar_size,
^Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
25 Feb, 2016
1 commit
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Building pci_rom.c with my toolchain complains about may be used uninitialized
rom varaible:---88---
Fix this as done in 55616b86c745fcac5a791268ab8e7cba36965c0f the ram variable.
Signed-off-by: Andreas Bießmann
Acked-by: Anatolij Gustschin
30 Jan, 2016
1 commit
29 Jan, 2016
3 commits
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With CONFIG_DM_PCI enabled, PCI buses are not enumerated at boot, as they
are without that config option enabled. No command exists to enumerate the
PCI buses. Hence, unless some board-specific code causes PCI enumeration,
PCI-based Ethernet devices are not detected, and network access is not
available.This patch implements "pci enum" in the CONFIG_DM_PCI case, thus giving a
mechanism whereby PCI can be enumerated.do_pci()'s handling of case 'e' is moved into a single location before the
dev variable is assigned, in order to skip calculation of dev. The enum
sub-command doesn't need the dev value, and skipping its calculation
avoids an irrelevant error being printed.Using a command to initialize PCI like this has a disadvantage relative to
enumerating PCI at boot. In particular, Ethernet devices are not probed
during PCI enumeration, but only when used. This defers setting variables
such as ethact, ethaddr, etc. until the first network-related command is
executed. Hopefully this will not cause further issues. Perhaps in the
long term, we need a "net start/enum" command too?Signed-off-by: Stephen Warren
Reviewed-by: Simon Glass
Reviewed-by: Bin Meng -
This function can fail, so be sure to report any errors that occur.
Signed-off-by: Simon Glass
Reviewed-by: Joe Hershberger
24 Jan, 2016
4 commits
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At present this BIOS emulator uses a bus/device/function number. Change
it to use a device if CONFIG_DM_PCI is enabled.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
This function is only available for compatibility with old code. Avoid
using it in the uclass.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng -
Add a driver-model version of the pci_write_bar32 function so that this is
supported in the new API.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
This function should not be used by driver-model code, so move it to the
compatibility portion.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
19 Jan, 2016
1 commit
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With gcc-5.x we get:
drivers/pci/pci_rom.c: In function 'dm_pci_run_vga_bios':
drivers/pci/pci_rom.c:352:3: warning: 'ram' may be used uninitialized in
this function [-Wmaybe-uninitialized]While unconvinced that this can happen in practice (if we malloc we set
alloced to true, it will be false otherwise), silence the compiler.Signed-off-by: Tom Rini
Reviewed-by: Bin Meng
Reviewed-by: Simon Glass
15 Jan, 2016
1 commit
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Adjust pci_rom_load() to return an indication of whether it allocated
memory or not. Adjust the caller to free it. This fixes a memory leak
when PCI_VGA_RAM_IMAGE_START is not used.Reported-by: Coverity (CID: 134194)
Signed-off-by: Simon Glass
Reviewed-by: Tom Rini