27 Aug, 2020
1 commit
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The eSDHC adapter card identification and multiplexing configuration
through FPGA had been implemented in both common mmc driver and
fsl_esdhc driver. However it is proper to move these code to board
files and do it during board initialization. The FPGA registers are
also board specific.This patch is to move eSDHC adapter card identification and
multiplexing configuration from mmc driver to specific board files.
And the option CONFIG_FSL_ESDHC_ADAPTER_IDENT is no longer needed.Signed-off-by: Yangbo Lu
[Rebased, Removed T1040QDS change as board does not exist]
Signed-off-by: Priyanka Jain
12 Jul, 2017
1 commit
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CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT is not the correct method
to set I/O to 1.8. To boards that does not support vqmmc-supply,
use vs18_enable in fsl_esdhc_cfg. If regulator is supported,
use fixed 1.8V regulator for vqmmc-supply.Signed-off-by: Peng Fan
Cc: Jaehoon Chung
Cc: York Sun
Cc: Stefano Babic
05 May, 2015
1 commit
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Add adapter card type identification support by reading
FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function,
define CONFIG_FSL_ESDHC_ADAPTER_IDENT.Signed-off-by: Yangbo Lu
Cc: York Sun
Cc: Pantelis Antoniou
[York Sun: resolve conflicts in README.fsl-esdhc]
Reviewed-by: York Sun
23 Feb, 2015
1 commit
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Some boards cannot do voltage negotiation but need to set the VSELECT
bit forcely to ensure it to work at 1.8V.This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use.
Signed-off-by: Otavio Salvador
09 Sep, 2014
1 commit
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For LS102xA, the processor is in little-endian mode, while esdhc IP is
in big-endian mode. CONFIG_SYS_FSL_ESDHC_LE and CONFIG_SYS_FSL_ESDHC_BE
are added. So accessing ESDHC registers can be determined by ESDHC IP's
endian mode.Signed-off-by: Alison Wang
