26 Feb, 2018
2 commits
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Add support for a new boards from devboards.de , the DBM-SoC1 .
This board has one ethernet port, one USB OTG port and USB UART.Signed-off-by: Marek Vasut
24 Feb, 2018
1 commit
23 Feb, 2018
1 commit
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This seems to have been missed, possibly due to the inability to
enable TI_SECURE_DEVICE on Keystone2 devices previously.Fixes: bfebc8c965e4 ("env: Rename getenv_hex(), getenv_yesno(), getenv_ulong()")
Signed-off-by: Andrew F. Davis
Reviewed-by: Lokesh Vutla
22 Feb, 2018
4 commits
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Currently SPL_LOAD_FIT is unable to boot from nand on
i.MX6QDL platform, so enable only for MMC boards.Signed-off-by: Jagan Teki
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Engicam Is.IoT has eMMC and NAND cpu modules where MMC
is common for both, so remove explicit mmc defconfig.Signed-off-by: Jagan Teki
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This reverts commit edf0093732225c2fd0791c3864e9a3eef1f92f19 for
cm_fx6 iMX.6 Solo module as it causes frequent (around 10 percent of
power cycles) board's hangs.These hangs happen in SPL when BSS is being initialized in SDRAM -
it appear that variables from BSS contain trash values which lead to board
hangs. Looks like that SDRAM doesn't yet finish initialization in these
cases.Signed-off-by: Maxim Yu. Osipov
Reviewed-by: Stefano Babic -
Do the following to make the symbol names less confusing.
sed -i "s/\([TU][^_]\+\)_FUNCTION_DFU/DFU_OVER_\1/g" \
`git grep _FUNCTION_DFU | cut -d ":" -f 1 | sort -u`Signed-off-by: Marek Vasut
Cc: Lukasz Majewski
20 Feb, 2018
2 commits
19 Feb, 2018
3 commits
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These ARM boards are in nice shape and still being used a lot
with e.g. QEMU, so I can maintain them.Signed-off-by: Linus Walleij
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Since DRA7xx/AM57xx SR1.1 and SR1.0 has errata to limit the frequency of
MMC1 to 96MHz and frequency of MMC2 to 48MHz for AM572x SR1.1, limit the
frequency and disable higher speed modes for those revision.
Also use the recommended IO delays (those tagged with "rev11")Signed-off-by: Kishon Vijay Abraham I
Signed-off-by: Jean-Jacques Hiblot -
To debug device tree issues involving 32- and 64-bit platforms, it is useful to
have a generic 64-bit platform available.Add a version of the sandbox that uses 64-bit integers for its physical
addresses as well as a modified device tree.Signed-off-by: Mario Six
Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig
Signed-off-by: Simon Glass
18 Feb, 2018
3 commits
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Signed-off-by: Stefano Babic
CC: Jagan Teki -
The 'reset' command did not work on Porter because the reset code
was accessing the wrong PMIC address over broken I2C bus driver.
Replace the code with DM-aware code and fix up the PMIC address.
This makes the 'reset' command work again.Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu -
Toggle the PHY reset GPIO to bring the ethernet PHY out of reset properly.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
NOTE: This should be moved to the SH ethernet driver, but it's quite
late in the cycle, so this is something to be done in 2018.05.
17 Feb, 2018
2 commits
16 Feb, 2018
1 commit
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Due to size limitations of the MERAM, switch U-Boot to SPL.
The SPL is loaded by the SPI_LOADER into MERAM and then loads
U-Boot proper into DRAM. This way U-Boot can freely grow in
size in DRAM, as there is plenty of it.Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
NOTE: To update U-Boot, first install u-boot.img to 0x140000 in SPI NOR,
then use the Minimon to flash u-boot-spl.srec using ls,2,e6304000.
To generate u-boot-spl.srec, use objcopy:
arm-linux-gnueabi-objcopy -O srec spl/u-boot-spl u-boot-spl.srec
15 Feb, 2018
2 commits
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Commit 958d55f26ce ("MAINTAINERS: Take over BCM2835 maintainership") put
me in as maintainer for the RPi soc, but forgot to update the board
MAINTAINERS file.Add me there too.
Signed-off-by: Alexander Graf
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board_usb_init()/_cleanup() should be in board files and don't have
a place in the xhci-omap driver. Weak versions for
board_usb_init()/_cleanup() already exist in common/usb.c
(for host mode) and drivers/usb/gadget/g_dnl.c (for gadget mode).Therefore, remove init and cleanup functions from xhci-omap and
implement them in the board files.Signed-off-by: Faiz Abbas
Reviewed-by: Marek Vasut
Reviewed-by: Bin Meng
08 Feb, 2018
1 commit
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Add pinmux for QSPI pins on K2G ICE board.
Signed-off-by: Vignesh R
06 Feb, 2018
1 commit
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There is no EMMC symbol in the "enable different boot versions for the
shc board" choice. SHC_EMMC was probably intended.No functional changes. Kconfig choices fall back on using the first
(visible) symbol in the choice as the default if the default symbol is
not visible.Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which prints the following warning:warning: the default selection EMMC (undefined) of (defined at board/bosch/shc/Kconfig:15) is not contained in the choice
I've added a corresponding warning to the C tools too, which is
currently in linux-next: https://patchwork.kernel.org/patch/9983667/Signed-off-by: Ulf Magnusson
05 Feb, 2018
2 commits
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Update email address.
Signed-off-by: Jorge Ramirez-Ortiz
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Free Electrons is no more and is now known as Bootlin, change my email
address accordingly.Signed-off-by: Maxime Ripard
04 Feb, 2018
13 commits
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Add board specific imx config file with recommended IPU Qos settings
and adapted DDR configuration.Signed-off-by: Soeren Moch
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The initial implementation of mx6memcal reset the CPU after
running the memory calibration procedure because the generic
board has no information about which boot devices are available.Now that we have SDP support in SPL, use it to allow a full
U-Boot to be uploaded (i.e. to use "mtest").Signed-off-by: Eric Nelson
Reviewed-by: Fabio Estevam -
Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c
Signed-off-by: Patrick Bruenn
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Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c
Signed-off-by: Patrick Bruenn
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Move dram_init(), dram_init_banksize() and get_effective_memsize() to
arch/arm/mach-imx/mx5/mx53_dram.c, where it can be reused by m53evk and
mx53loco.Signed-off-by: Patrick Bruenn
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Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().However multiple calls are better than undefined behavior...
This fixes:
https://lists.denx.de/pipermail/u-boot/2017-November/313214.html
https://lists.denx.de/pipermail/u-boot/2017-December/314480.htmlSigned-off-by: Patrick Bruenn
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Validate the time at startup:
- in case rtc error add to kernel command line RTC_ERROR
- clamp date to 1-Jan-2036Signed-off-by: Nandor Han
Signed-off-by: Martyn Welch
Signed-off-by: Sebastian Reichel -
Modify configuration to support FIT. Set variable `confidx' from VPD,
in order to load the correct device tree. Modify/simplify U-Boot
environment to support loading FIT image.Signed-off-by: Ian Ray
Signed-off-by: Martyn Welch
Signed-off-by: Sebastian Reichel -
Enable the hardware watchdog on bx50v3 to cause it to reset in the event
the board hangs.Configure GPIO_9 pin as WDOG1_B so that a watchdog timeout results in a
full system reset.The watchdog is used and reconfigured by systemd approximately 1.7 seconds
into boot. Adding a few seconds for U-Boot and a few more seconds as a
safety margin.Note that the PCIe controller is _not_ put back into a safe state prior
to board reset. This is a problem if board reset is implemented as CPU
reset.Signed-off-by: Ian Ray
Signed-off-by: Martyn Welch
Signed-off-by: Sebastian Reichel -
There are two I210s on the b850v3 and one on the b450v3 and b650v3.
One is connected to Marvell 88e6240 which is already programmed.Follow the flow documented in doc/README.enetaddr: set the
enet[0-9]*addr environment variable and let the driver program the
hardware.The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order.The environment variables are removed after programming the hardware
because the variables seem to influence MAC addresses also after U-Boot.
Specifically the MAC address of FEC (MC interface) would be incorrectly
set: 'ethaddr', which maps to the first I210 chip and is set to I210's
default address read from the driver by eth_write_hwaddr in eth_legacy.c
because the variable is undefined (not set even by bx50v3.c), would
result in the eth0 interface's MAC address to be set to I210's default
address.Signed-off-by: Hannu Lounento
Signed-off-by: Ian Ray
Signed-off-by: Martyn Welch
Signed-off-by: Sebastian Reichel -
Instead of programming the hardware directly in the board
implementation, follow the flow documented in doc/README.enetaddr: set
the enet[0-9]*addr environment variable and let the driver program the
hardware.This avoids duplicating the implementation as it already exists in the
driver (drivers/net/fec_mxc.c: fec_set_hwaddr).The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order, i.e. FEC always has the index 2.The FEC driver does *not* set the flag Set MAC Address on Transmit (bit
set_eth0_mac_address used to do but this is unnecessary as the Linux
networking stack fills in the MAC address.Signed-off-by: Hannu Lounento
Signed-off-by: Ian Ray
Signed-off-by: Martyn Welch
Signed-off-by: Sebastian Reichel -
The change in i2c configuration added to support access to the VPD has
inadvertantly caused access to i2c buses 1 & 2 to be lost. This has
resulted in the configuration for the PMIC to be attempted on the wrong
bus and thus isn't taking effect.Add the required configuration to return access to buses 1 & 2. In order
to ensure that any users of the bus numbering prior to addition in VPD
patches work, add buses before configuration related to mux on bus 0 and
tweak VPD bus usage to fit new numbering scheme.Signed-off-by: Martyn Welch
Signed-off-by: Sebastian Reichel -
i.CoreM6 1.5 is an another i.CoreM6 QDL cpu modules which can be connected
to EDIMM starter kit design with eMMC and MIPI-CSI interfaces suitable for
Android and video capture application.notable features:
CPU NXP i.MX6 S/DL/D/Q, Up to 4 x Cortex-A9@800MHz
Memory Up to 2 GB DDR3-1066
Video Interfaces Up to 1 Parallel Up to 2 LVDS HDMI 1.4
port 8 bit CSI INPUT MIPI-CSI INPUT
1 x 10/100 Ethernet interface, 2 x USB, 1 x PCIe, 1 x I2S etcThis patch adds support for Quad/Dual and DualLite/Solo SOM's on
MIPI starter kit with boot from SD and eMMC.Signed-off-by: Jagan Teki
01 Feb, 2018
1 commit
31 Jan, 2018
1 commit
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Xilinx changes for v2018.03
- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework based on Zynq concept
- Add low level initialization for zc770 and zcu102
- Add support for Zynq zc770 x16 nand configuration
- Add mini nand/emmc ZynqMP targets
- Some arasan nand changes