18 Jan, 2020

1 commit


03 Dec, 2019

1 commit


12 Aug, 2019

1 commit


26 Apr, 2019

1 commit

  • This patch tries to implement a generic watchdog_reset() function that
    can be used by all boards that want to service the watchdog device in
    U-Boot. This watchdog servicing is enabled via CONFIG_WATCHDOG.

    Without this approach, new boards or platforms needed to implement a
    board specific version of this functionality, mostly copy'ing the same
    code over and over again into their board or platforms code base.

    With this new generic function, the scattered other functions are now
    removed to be replaced by the generic one. The new version also enables
    the configuration of the watchdog timeout via the DT "timeout-sec"
    property (if enabled via CONFIG_OF_CONTROL).

    This patch also adds a new flag to the GD flags, to flag that the
    watchdog is ready to use and adds the pointer to the watchdog device
    to the GD. This enables us to remove the global "watchdog_dev"
    variable, which was prone to cause problems because of its potentially
    very early use in watchdog_reset(), even before the BSS is cleared.

    Signed-off-by: Stefan Roese
    Cc: Heiko Schocher
    Cc: Tom Rini
    Cc: Michal Simek
    Cc: "Marek Behún"
    Cc: Daniel Schwierzeck
    Cc: Maxim Sloyko
    Cc: Erik van Luijk
    Cc: Ryder Lee
    Cc: Weijie Gao
    Cc: Simon Glass
    Cc: "Álvaro Fernández Rojas"
    Cc: Philippe Reynes
    Cc: Christophe Leroy
    Reviewed-by: Michal Simek
    Tested-by: Michal Simek (on zcu100)

    Stefan Roese
     

12 Apr, 2019

1 commit


11 Feb, 2019

1 commit

  • MV_DDR_FREQ_SAR lets the DDR frequency be determined by hardware
    strapping. This also has the side effect of running the DDR clock in
    synchronous mode with the CPU core clock rather than from an independent
    PLL. We've seen this improve reliability in operation across a number of
    boards and temperature ranges.

    Signed-off-by: Chris Packham
    Reviewed-by: Stefan Roese
    Signed-off-by: Stefan Roese

    Chris Packham
     

21 Jan, 2019

1 commit

  • This is a range of stackable network switches. The SoC is Armada-385 and
    there are a number of variants with differing network port
    configurations. The DP variants are intended for a harsher operating
    environment so they use a different i2c mux and fit industrial-temp
    parts.

    Signed-off-by: Chris Packham
    Signed-off-by: Stefan Roese

    Chris Packham
     

07 Aug, 2018

1 commit

  • This is a series of line cards for Allied Telesis's SBx8100 chassis
    switch. The CPU block is common to the SBx81GP24 and SBx81GT24 cards
    cards collectively referred to as SBx81LIFXCAT in u-boot.

    Signed-off-by: Chris Packham
    Signed-off-by: Stefan Roese

    Chris Packham
     

05 Jun, 2018

2 commits

  • The SBx81LIFKW boards connect to the internal chassis management network
    via a Marvell 88e6097 L2 switch. The chassis connections are direct
    serdes on ports 8 and 9 with a RGMII interface on port 10 connected to
    the CPU MAC.

    For debugging purposes ports 0 and 1 are also taken out to headers on
    the board. Because the debug interfaces are sometimes connected to with
    straight ribbon cables we need to run them at 10Mbps.

    Signed-off-by: Chris Packham
    Reviewed-by: Stefan Roese
    Signed-off-by: Stefan Roese

    Chris Packham
     
  • This is a series of line cards for Allied Telesis's SBx8100 chassis
    switch. The CPU block is common to the SBx81GS24a, SBx81XS6, SBx81XS16
    and SBx81GT40 cards collectively referred to as SBx81LIFKW in u-boot.

    Reviewed-by: Stefan Roese
    Signed-off-by: Chris Packham
    Signed-off-by: Stefan Roese

    Chris Packham