13 Jan, 2014
1 commit
-
When U-Boot is configured for Versatile AB, it will still pass
the machine ID of Versatile PB to the kernel. After this simple
fix the system boots correctly.Cc: Stefano Babic
Cc: Marek Vasut
Signed-off-by: Linus Walleij
Acked-by: Marek Vasut
Acked-by: Stefano Babic
10 Jan, 2014
35 commits
-
Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be
added to include/configs/exynos5-dt.h now.Conflicts:
include/configs/exynos5250-dt.hSigned-off-by: Tom Rini
-
Updated doc/README.zynq to current status
Signed-off-by: Jagannadha Sutradharudu Teki
-
Enabled default dts files on respective pre-board config
files this is way MAKEALL will works. and it's upto user
to build specific dts by specifying at build time.$ make zynq_zc70x_config
$ make --> with default dts zynq-zc702.dts
or
$ make DEVICE_TREE=zynq-zc702 --> Same configuration with zynq-zc706.dtsSigned-off-by: Jagannadha Sutradharudu Teki
-
This patch adds initial dts support for supported
zynq boards.Signed-off-by: Jagannadha Sutradharudu Teki
-
CONFIG_FIT_SIGNATURE - signature node support in FIT image
CONFIG_RSA - RSA lib supportSigned-off-by: Jagannadha Sutradharudu Teki
-
GPIO dummy routines are required for fdt build, may be removed
these dependencies once the u-boot fdt is fully optimized.Signed-off-by: Jagannadha Sutradharudu Teki
-
This patch provides a basic fdt support for zynq u-boot.
zynq-7000.dtsi-> initial arch dts file
zynq-zed.dts -> initial zed board dts file
more devices should be added in subsequent patches.u-boot build: once configuring of a board done
for building dtb with zynq-zed.dts as an input
zynq-uboot> make DEVICE_TREE=zynq-zedEnabled CONFIG_OF_SEPARATE for building dtb separately.
There is a new binary called u-boot-dtb.bin which is a u-boot
with devicetree supported.Signed-off-by: Jagannadha Sutradharudu Teki
-
Defined CONFIG_ENV_OVERWRITE, which allow to
overwrite serial baudrate and ethaddr.Signed-off-by: Jagannadha Sutradharudu Teki
-
Last 128Kb sector of 1Mb flash is defined as u-boot
environment partition.Signed-off-by: Jagannadha Sutradharudu Teki
-
Changed Env. Sector size from 0x10000 to 128Kb
Signed-off-by: Jagannadha Sutradharudu Teki
-
Defined default env. for autoboot FIT image from
respective boot devices.Default settings:
fit_image=fit.itb
load_addr=0x2000000
fit_size=0x800000
flash_off=0x100000
nor_flash_off=0xE2100000Signed-off-by: Jagannadha Sutradharudu Teki
-
Added support to find the bootmodes by reading
slcr bootmode register. this can be helpful to
autoboot the configurations w.r.t a specified bootmode.Added this functionality on board_late_init as it's not
needed for normal initializtion part.Signed-off-by: Jagannadha Sutradharudu Teki
-
ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013ZC770 XM012:
- 1GB DDR3
- 64MiB Numonyx NOR flash
- USB-UARTSigned-off-by: Jagannadha Sutradharudu Teki
Cc: Stefan Roese -
ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013ZC770 XM013:
- 1GB DDR3
- 128 Mb Quad-SPI Flash(dual parallel)
- USB-UARTSigned-off-by: Jagannadha Sutradharudu Teki
-
ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013ZC770 XM010:
- 1Gb DDR3
- 1Mb SST SPI flash
- 128 Mb Quad-SPI Flash
- 8 Mb SST SI flash
- Full size SD/MMC card cage
- 10/100/1000 Ethernet
- USB-UARTSigned-off-by: Jagannadha Sutradharudu Teki
-
MicroZed is a low-cost development board based on
the Xilinx Zynq-7000 All Programmable SoC.APSOC:
- XC7Z010-1CLG400C
Memory:
- 1 GB of DDR3 SDRAM
- 128Mb of QSPI flash(S25FL128SAGBHI200)
- Micro SD card interface
Communication:
- 10/100/1000 Ethernet
- USB 2.0
- USB-UART
User I/O:
- 100 User I/O (50 per connector)
- Configurable as up to 48 LVDS pairs or 100 single-ended I/O
Misc:
- Xilinx PC4 JTAG configuration port
- PS JTAG pins accessible via Pmod
- 33.33 MHz oscillator
- User LED and push switchFor more info - http://zedboard.org/product/microzed
Signed-off-by: Jagannadha Sutradharudu Teki
-
Adds configurations for Catalyst 24WC08 EEPROM, which
is present on the zynq boards.Enable EEPROM support for zc70x boards.
Signed-off-by: Jagannadha Sutradharudu Teki
-
Defined TEXT_BASE for u-boot starts from 0x4000000
w.r.t zynq memory-map.Signed-off-by: Jagannadha Sutradharudu Teki
-
CONFIG_SYS_SDRAM_SIZE is specific to a board hence moved
to specific pre-config board files.Signed-off-by: Jagannadha Sutradharudu Teki
-
Zed is a complete development board based on the
Xilinx Zynq-7000 All Programmable SoC.APSOC:
- XC7Z020-CLG484-1
Memory:
- 512 MB DDR3
- 256 Mb Quad-SPI Flash(
- Full size SD/MMC card cage
Connectivity:
- 10/100/1000 Ethernet
- USB OTG (Device/Host/OTG)
- USB-UART
Expansion:
- FMC (Low Pin Count)
- Pmod. headers (2x6)
Video/Display:
- HDMI output (1080p60 + audio)
- VGA connector
- 128 x 32 OLED
- User LEDs (9)
User inputs:
- Slide switches (8)
- Push button switches (7)
Audio:
- 24-bit stereo audio CODEC
- Stereo line in/out
- Headphone
- Microphone input
Analog:
- Xilinx XADC header
- Supports 4 analog inputs
- 2 Differential / 4 Single-ended
Debug:
- On-board USB JTAG programming port
- ARM Debug Access Port (DAP)For more info - http://zedboard.org/product/zedboard
Signed-off-by: Jagannadha Sutradharudu Teki
-
The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded
processing includes ASIC and FPGA design.ZC702-:
APSOC:
- XC7Z020-CLG484-1
Memory:
- DDR3 Component Memory 1GB
- 16MB Quad SPI Flash
- IIC - 1 KB EEPROM
Connectivity:
- Gigabit Ethernet GMII, RGMII and SGMII.
- USB OTG - Host USB
- IIC Bus Headers/HUB
- 1 CAN with Wake on CAN
- USB-UART
Video/Display:
- HDMI Video OUT
- 8X LEDs
Control & I/O:
- 3 User Push Buttons
- 2 User Switches
- 8 User LEDsFor more info on zc702 board:
- http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htmZC706-:
APSOC:
- XC7Z045 FFG900 -2 AP SoC
Memory:
- DDR3 Component Memory 1GB (PS)
- DDR3 SODIM Memory 1GB (PL)
- 2X16MB Quad SPI Flash (dual parallel)
- IIC - 1 KB EEPROM
Connectivity:
- PCIe Gen2x4
- SFP+ and SMA Pairs
- GigE RGMII Ethernet (PS)
- USB OTG 1 (PS) - Host USB
- IIC Bus Headers/HUB (PS)
- 1 CAN with Wake on CAN (PS)
- USB-UART
Video/Display:
- HDMI 8 color RGB 4.4.4 1080P-60 OUT
- HDMI IN 8 color RGB 4.4.4
Control & I/O:
- 2 User Push Buttons/Dip Switch, 2 User LEDs
- IIC access to GPIO
- SDIO (SD Card slot)
- 3 User Push Buttons, 2 User Switches, 8 User LEDsFor more info on zc706 board:
- http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htmSigned-off-by: Jagannadha Sutradharudu Teki
-
Information on zynq u-boot about
- zynq boards
- mainline status
- TODOSigned-off-by: Jagannadha Sutradharudu Teki
-
zynq.h -> zynq-common.h, zynq-common is Common
configuration options for all Zynq boards.zynq.h is no longer exists hense removed from boards.cfg
Signed-off-by: Jagannadha Sutradharudu Teki
-
Zynq ethernet controller support two GEM's like
CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled
both so-that the respective board will define
these macros based on their usage.Signed-off-by: Jagannadha Sutradharudu Teki
-
Zynq uart controller support two serial ports like
CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1
enabled both so-that the respective board will define
these macros based on their usage.Signed-off-by: Jagannadha Sutradharudu Teki
-
- Enable cache command
- Turn-off L2 cache
- Turn-on D-cacheSigned-off-by: Jagannadha Sutradharudu Teki
-
Cleanups mostly on:
- Add comments
- Re-order configs
- Remove #define CONFIG_ZYNQ_SDHCISigned-off-by: Jagannadha Sutradharudu Teki
-
Cleanup on memory configuration options:
- Add comment
- Re-order configsSigned-off-by: Jagannadha Sutradharudu Teki
-
Cleanup on miscellaneous configurable options:
- Rename SYS_PROMPT as "zynq-uboot"
- Add comment
- Re-order configsSigned-off-by: Jagannadha Sutradharudu Teki
-
This enabled Boot FreeBSD/vxWorks from an ELF image support
Signed-off-by: Jagannadha Sutradharudu Teki
-
Enabled fit_format_{error,warning}()
Signed-off-by: Jagannadha Sutradharudu Teki
-
The vexpress_aemv8a is the first aarch64 board in U-Boot.
As it was introduced, it gets built when "MAKEALL -a arm"
is invoked, and fails as this command is run with a 32-bit,
not 64-bit, toolchain as the cross-compiler.Introduce 'aarch64' as a valid 'MAKEALL -a' argument, treated
as 'arm' for all other intents, and change the architecture
of the vexpress_aemv8a entry in boards.cfg from 'arm' to
'aarch64'. -
The toolchain sets __aarch64__ for both LE and BE. In the case of
posix_types.h we cannot reliably use config.h as that will lead to
problems. In the case of byteorder.h it's clearer to check the EB flag
being set in either case instead.Cc: David Feng
Signed-off-by: Tom RiniAmended by Albert ARIBAUD to
actually remove the config.h include from the posix_types.h
files, with permission from Tom Rini.
09 Jan, 2014
4 commits
-
Signed-off-by: David Feng
-
Signed-off-by: David Feng
Signed-off-by: Bhupesh Sharma -
Signed-off-by: David Feng
-
Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott WoodSigned-off-by: David Feng
