06 Aug, 2018
1 commit
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the dram init is board related. But there is still some common
part can be reused on different board. The basic flow is common
for all the board. only the DDRC and DDR PHY config register setting
is different on different board. So extract the LPDDR4 init common
flow to make it more generic. baord level only need to provide
the DDRC and PHY config register parameter to the common code to finish
the dram init.the same method can be use for DDR4. will be added later.
Signed-off-by: Bai Ping
(cherry picked from commit 220d0cc79a3f340e0da664242bb19ccda7a071d1)
05 Mar, 2018
1 commit
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Rename CONFIG_SPL_USBETH_SUPPORT to CONFIG_SPL_USB_ETHER.
This enables users to block text using CONFIG_IS_ENABLED() instead
of resorting to #if ladders with SPL and non-SPL cases.Signed-off-by: Faiz Abbas
21 Nov, 2017
1 commit
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The dra7xx series of SOCs contain a temperature sensor and an
associated analog-to-digital converter (ADC) which produces
an output which is proportional to the SOC temperature.
Add support for this temperature sensor.Signed-off-by: Faiz Abbas
Reviewed-by: Simon Glass
14 Aug, 2017
2 commits
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NVM Express (NVMe) is a register level interface that allows host
software to communicate with a non-volatile memory subsystem. This
interface is optimized for enterprise and client solid state drives,
typically attached to the PCI express interface.This adds a U-Boot driver support of devices that follow the NVMe
standard [1] and supports basic read/write operations.Tested with a 400GB Intel SSD 750 series NVMe card with controller
id 8086:0953.[1] http://www.nvmexpress.org/resources/specifications/
Signed-off-by: Zhikang Zhang
Signed-off-by: Wenbin Song
Signed-off-by: Bin Meng
Reviewed-by: Tom Rini
13 Aug, 2017
2 commits
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To fully support DM timer in SPL and TPL, we need a few things cleaned
up and normalised:
- inclusion of the uclass and drivers should be an all-or-nothing
decision for each stage and under control of $(SPL_TPL_)TIMER
instead of having the two-level configuration with TIMER and
$(SPL_TPL_)TIMER_SUPPORT
- when $(SPL_TPL_)TIMER is enabled, the ARMv8 generic timer code can
not be compiled inThis normalises configuration to $(SPL_TPL_)TIMER and moves the config
options to drivers/timer/Kconfig (and cleans up the collateral damage
to some defconfigs that had SPL_TIMER_SUPPORT enabled).Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass -
To simplify drivers/Makefile a bit when using TPL/SPL, we consistently
use the $(SPL_TPL_) macro to test for drivers that have separate
configuration symbols for the full U-boot, SPL and TPL stages.
Instead of explicitly repeating them in two separate if-guarded
sections of the Makefile, we can now simply list these options once.Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
Reviewed-by: Tom Rini
26 Jul, 2017
1 commit
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Enable FPGA driver build for Arria 10 SPL because FPGA driver is
needed by Arria 10 SPL to configure and getting DDR up before
loading U-boot into DDR and booting from there.Signed-off-by: Tien Fong Chee
Reviewed-by: Ley Foon Tan
Reviewed-by: Dinh Nguyen
12 Jul, 2017
2 commits
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At present we have the SCSI drivers in the drivers/block and common/
directories. It is better to split them out into their own place. Use
drivers/scsi which is what Linux does.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
At present we have the SATA and PATA drivers mixed up in the drivers/block
directory. It is better to split them out into their own place. Use
drivers/ata which is what Linux does.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
22 May, 2017
2 commits
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This subsystem is quite old. It has been replaced with a driver-model
version (UCLASS_THERMAL). Boards are free to convert to that if required,
but here is a removal patch that could be applied in the meantime.Signed-off-by: Simon Glass
Reviewed-by: Heiko Schocher
Reviewed-by: Tom Rini -
This subsystem has not been converted to driver model, there is only one
driver and only one board that uses it. Drop it and its CONFIG option.Also drop the rtc4543 RTC driver since it uses TWS.
Signed-off-by: Simon Glass
Reviewed-by: Tom Rini
15 May, 2017
1 commit
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This simplifies makefiles. Also, arrange the order of objects in
drivers/mmc/Makefile so that the framework objects are listed before
drivers.Signed-off-by: Masahiro Yamada
10 May, 2017
1 commit
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The PHY framework provides a set of APIs to control a PHY. This API is
derived from the linux version of the generic PHY framework.
Currently the API supports init(), deinit(), power_on, power_off() and
reset(). The framework provides a way to get a reference to a phy from the
device-tree.Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Simon Glass
18 Apr, 2017
1 commit
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If the system is running PSCI firmware, the System Reset function
(func ID: 0x80000009) is supposed to be handled by PSCI, that is,
the SoC/board specific reset implementation should be moved to PSCI.
U-Boot should call the PSCI service according to the arm-smccc
manner.The arm-smccc is supported on ARMv7 or later. Especially, ARMv8
generation SoCs are likely to run ARM Trusted Firmware BL31. In
this case, U-Boot is a non-secure world boot loader, so it should
not be able to reset the system directly.Signed-off-by: Masahiro Yamada
06 Apr, 2017
1 commit
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Since TPL often needs to be very very small it may not make sense to
enable driver model. Add an option for this.This changes brings the 'rock' board under the TPL limit with gcc 4.9.
Signed-off-by: Simon Glass
06 Feb, 2017
5 commits
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Add an option for building Platorm Controller Hub drivers in SPL.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Add a new Kconfig option to allow timer drivers to be used in SPL.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Add a new Kconfig option to allow RTC drivers to be used in SPL.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Add a new Kconfig option to allow PCI drivers to be used in SPL.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Add a new Kconfig option to allow CPU drivers to be used in SPL.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
29 Nov, 2016
2 commits
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Introduce USB Gadget config option. This allows to combine Makefile
entries for SPL_USBETH_SUPPORT and SPL_DFU_SUPPORT.Signed-off-by: Stefan Agner
Acked-by: Lukasz Majewski
Tested-by: Ravi Babu -
The DFU Kconfig menu entries should be part of the SPL
Kconfig file. Also avoid using the top level Makefile by
moving the config dependent build artifacts to the driver/
and driver/usb/gadget/ Makfiles.With that, DFU can be built again in SPL if
CONFIG_SPL_DFU_SUPPORT is enabled.Fixes: 6ad6102246d8 ("usb:gadget: Disallow DFU in SPL for now")
Signed-off-by: Stefan Agner
Reviewed-by: Simon Glass
Acked-by: Lukasz Majewski
27 Sep, 2016
1 commit
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This version is based on the Marvell U-Boot version with this patch
applied as latest patch:Git ID 7f408573: "fix: comphy: cp110: add comphy initialization for usb
device mode" from 2016-07-05.Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Kostya Porotchkin
Cc: Wilson Ding
Cc: Victor Gu
Cc: Hua Jing
Cc: Terry Zhou
Cc: Hanna Hawa
Cc: Haim Boot
17 Sep, 2016
1 commit
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At present TPL uses the same options as SPL support. In a few cases the board
config enables or disables the SPL options depending on whether
CONFIG_TPL_BUILD is defined.With the move to Kconfig, options are determined for the whole build and
(without a hack like an #undef in a header file) cannot be controlled in this
way.Create new TPL options for these and update users. This will allow Kconfig
conversion to proceed for these boards.Signed-off-by: Simon Glass
12 Aug, 2016
1 commit
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Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.Signed-off-by: Max Filippov
Acked-by: Simon Glass
22 Jul, 2016
2 commits
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Booting a payload out of NAND FLASH from the SPL is a crux today, as
it requires hard partioned FLASH. Not a brilliant idea with the
reliability of todays NAND FLASH chips.The upstream UBI + UBI fastmap implementation which is about to
brought to u-boot is too heavy weight for SPLs as it provides way more
functionality than needed for a SPL and does not even fit into the
restricted SPL areas which are loaded from the SoC boot ROM.So this provides a fast and lightweight implementation of UBI scanning
and UBI fastmap attach. The scan and logical to physical block mapping
code is developed from scratch, while the fastmap implementation is
lifted from the linux kernel source and stripped down to fit the SPL
needs.The text foot print on the board which I used for development is:
6854 0 0 6854 1abd
drivers/mtd/ubispl/built-in.oAttaching a NAND chip with 4096 physical eraseblocks (4 blocks are
reserved for the SPL) takes:In full scan mode: 1172ms
In fastmap mode: 95msThe code requires quite some storage. The largest and unknown part of
it is the number of fastmap blocks to read. Therefor the data
structure is not put into the BSS. The code requires a pointer to free
memory handed in which is initialized by the UBI attach code itself.See doc/README.ubispl for further information on how to use it.
This shares the ubi-media.h and crc32 implementation of drivers/mtd/ubi
There is no way to share the fastmap code, as UBISPL only utilizes the
slightly modified functions ubi_attach_fastmap() and ubi_scan_fastmap()
from the original kernel ubi fastmap implementation.Signed-off-by: Thomas Gleixner
Signed-off-by: Ladislav Michl
Acked-by: Heiko Schocher
Reviewed-by: Tom Rini -
Signed-off-by: Ladislav Michl
Reviewed-by: Tom Rini
Reviewed-by: Heiko Schocher
20 Jun, 2016
1 commit
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A reset controller is a hardware module that controls reset signals that
affect other hardware modules or chips.This patch defines a standard API that connects reset clients (i.e. the
drivers for devices affected by reset signals) to drivers for reset
controllers/providers. Initially, DT is the only supported method for
connecting the two.The DT binding specification (reset.txt) was taken from Linux kernel
v4.5's Documentation/devicetree/bindings/reset/reset.txt.Signed-off-by: Stephen Warren
Acked-by: Simon Glass
13 Jun, 2016
1 commit
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This allows a board to configure verified boot within the SPL using
a FIT or FIT with external data. It also allows the SPL to perform
signature verification without needing relocation.The board configuration will need to add the following feature defines:
CONFIG_SPL_CRYPTO_SUPPORT
CONFIG_SPL_HASH_SUPPORT
CONFIG_SPL_SHA256In this example, SHA256 is the only selected hashing algorithm.
And the following booleans:
CONFIG_SPL=y
CONFIG_SPL_DM=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_OF_LIBFDT=y
CONFIG_SPL_FIT_SIGNATURE=ySigned-off-by: Teddy Reed
Acked-by: Simon Glass
Acked-by: Andreas Dannenberg
Acked-by: Sumit Garg
27 May, 2016
1 commit
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A mailbox is a hardware mechanism for transferring small message and/or
notifications between the CPU on which U-Boot runs and some other device
such as an auxilliary CPU running firmware or a hardware module.This patch defines a standard API that connects mailbox clients to mailbox
providers (drivers). Initially, DT is the only supported method for
connecting the two.The DT binding specification (mailbox.txt) was taken from Linux kernel
v4.5's Documentation/devicetree/bindings/mailbox/mailbox.txt.Signed-off-by: Stephen Warren
Acked-by: Simon Glass
17 May, 2016
2 commits
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Bring this in for SPL so that we can use generic code for loading from
block devices.Signed-off-by: Simon Glass
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This function is implemented by the legacy block functions now. Drop it.
Signed-off-by: Simon Glass
02 Apr, 2016
1 commit
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Qualcom processors use proprietary bus to talk with PMIC devices -
SPMI (System Power Management Interface).
On wiring level it is similar to I2C, but on protocol level, it's
multi-master and has simple autodetection capabilities.
This commit adds simple uclass that provides bus read/write interface.Signed-off-by: Mateusz Kulikowski
Reviewed-by: Simon Glass
Tested-by: Simon Glass
02 Feb, 2016
1 commit
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This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module.
DDR2 controller operates in half-rate mode (upto 533MHZ frequency).Signed-off-by: Paul Thacker
Signed-off-by: Purna Chandra Mandal
Reviewed-by: Daniel Schwierzeck
Reviewed-by: Tom Rini
Reviewed-by: Simon Glass
24 Jan, 2016
1 commit
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A Platform Controller Hub is an Intel concept - it is like the peripherals
on an SoC and is often in a separate chip from the CPU. The chip is typically
found on the first PCI bus and integrates multiple devices.We have a very simple uclass to support PCHs. Add a few operations, such as
setting up the devices on the PCH and finding the SPI controller base
address. Also move it into drivers/pch/ since we will be adding a few PCH
drivers.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
14 Jan, 2016
1 commit
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Until now, the SoC selection for the ARCH_MVEBU platforms has been done
in the config header. Using CONFIG_ARMADA_XP in a non-clear way. As
it needed to get selected for AXP and A38x based boards. This patch
now changes this to move the SoC selection to Kconfig. And also
uses CONFIG_ARCH_MVEBU as a common define for both AXP and A38x.
This makes things a bit clearer - especially for new board additions.Additionally the defines CONFIG_SYS_MVEBU_DDR_AXP and
CONFIG_SYS_MVEBU_DDR_A38X are replaced with the already available
CONFIG_ARMADA_38X and CONFIG_ARMADA_XP.And CONFIG_DDR3 is removed, as its not referenced anywhere.
Signed-off-by: Stefan Roese
Cc: Luka Perkov
10 Nov, 2015
1 commit
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After consulting with some of the SPDX team, the conclusion is that
Makefiles are worth adding SPDX-License-Identifier tags too, and most of
ours have one. This adds tags to ones that lack them and converts a few
that had full (or in one case, very partial) license blobs into the
equivalent tag.Cc: Kate Stewart
Signed-off-by: Tom Rini
02 Nov, 2015
1 commit
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This commit adds:
- new uclass id: UCLASS_ADC
- new uclass driver: drivers/adc/adc-uclass.cThe new uclass's API allows for ADC operation on:
* single-channel with channel selection by a number
* multti-channel with channel selection by bit maskADC uclass's functions:
* single-channel:
- adc_start_channel() - start channel conversion
- adc_channel_data() - get conversion data
- adc_channel_single_shot() - start/get conversion data
* multi-channel:
- adc_start_channels() - start selected channels conversion
- adc_channels_data() - get conversion data
- adc_channels_single_shot() - start/get conversion data for channels
selected by bit mask
* general:
- adc_stop() - stop the conversion
- adc_vdd_value() - positive reference Voltage value with polarity [uV]
- adc_vss_value() - negative reference Voltage value with polarity [uV]
- adc_data_mask() - conversion data bit maskThe device tree can provide below constraints/properties:
- vdd-polarity-negative: if true: Vdd = vdd-microvolts * (-1)
- vss-polarity-negative: if true: Vss = vss-microvolts * (-1)
- vdd-supply: phandle to Vdd regulator's node
- vss-supply: phandle to Vss regulator's node
And optional, checked only if the above corresponding, doesn't exist:
- vdd-microvolts: positive reference Voltage [uV]
- vss-microvolts: negative reference Voltage [uV]Signed-off-by: Przemyslaw Marczak
Cc: Simon Glass
Signed-off-by: Minkyu Kang
23 Oct, 2015
1 commit
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Implement a Timer uclass to work with lib/time.c.
Signed-off-by: Thomas Chou
Acked-by: Simon Glass
