15 Oct, 2019
1 commit
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randomizer
imx8mm-evk needs to BCH encode and set NAND page number needed to be
randomizedmodify conditional compilation
Should use CONFIG_IMX8M, it should apply to imx8mq/mm/mn
Signed-off-by: Alice Guo
(cherry picked from commit da40cd99e4b3a78d2609ee777d60d651d6dbc313)
11 Oct, 2019
1 commit
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gf_13/14 mask was not set correctly in register definition.
Signed-off-by: Han Xu
(cherry picked from commit b8aed98b2ecfb0def64c474e1ae171930da4c9fc)
30 Sep, 2019
1 commit
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Conditional compilation added in MLK-22444 caused U-Boot compilation
of i.MX8MM error. Delete the wrong conditional compilation.Signed-off-by: Alice Guo
(cherry picked from commit 5638f06c300edf87461b822e2c42df2c9ccdd40f)
29 Sep, 2019
1 commit
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On i.MX7 in a sake of reducing the disturbances caused by a neighboring
cells in the FCB page in the NAND chip, a randomizer is enabled when
reading the FCB page by ROM bootloader.Add API for setting BCH to specific layout (and restoring it back) used by
ROM bootloader to be able to burn it in a proper way to NAND using
nandbcb command.Signed-off-by: Igor Opaniuk
Signed-off-by: Anti SullinSigned-off-by: Alice Guo
(cherry picked from commit eaba02830252ed044e319571a7f3ebed412ae93b)
06 Sep, 2019
1 commit
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Add the another 2Gb SPI-NAND flash which is 1.8v device and using
different device id.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
05 Sep, 2019
3 commits
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Add 4Gb micron SPI nand chip MT29F4G01 which does not support QUAD IO
and has two dies. Also fix the BBM size to 4 Bytes according to datasheet.Signed-off-by: Ye Li
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Current print for unrecognized ID only shows the buffer address not
show its device ID. Add a print to show the ID.Signed-off-by: Ye Li
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Miss including common.h in two files and cause build error
Signed-off-by: Ye Li
16 Jul, 2019
1 commit
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Writing/updating boot image in nand device is not
straight forward in i.MX6 platform and it requires
boot control block(BCB) to be configured.It becomes difficult to use uboot 'nand' command to
write BCB since it requires platform specific attributes
need to be taken care of.It is even difficult to use existing msx-nand.c driver by
incorporating BCB attributes like mxs_dma_desc does
because it requires change in mtd and nand command.So, cmd_nandbcb implemented in arch/arm/mach-imx
BCB contains two data structures, Firmware Configuration Block(FCB)
and Discovered Bad Block Table(DBBT). FCB has nand timings,
DBBT search area, page address of firmware.On summary, nandbcb update will
- erase the entire partition
- create BCB by creating 2 FCB/DBBT block followed by
1 FW block based on partition size and erasesize.
- fill FCB/DBBT structures
- write FW/SPL on FW1
- write FCB/DBBT in first 2 blocksfor nand boot, up on reset bootrom look for FCB structure in
first block's if FCB found the nand timings are loaded for
further reads. once FCB read done, DTTB will load and finally
firmware will be loaded which is boot image.Refer section "NAND Boot" from doc/imx/common/imx6.txt for more usage
information.Signed-off-by: Jagan Teki
Signed-off-by: Sergey Kubushyn
Signed-off-by: Shyam Saini
Signed-off-by: Han Xu
13 Jun, 2019
1 commit
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add the dedicate compatible string for i.MX6QP
Signed-off-by: Han Xu
24 May, 2019
13 commits
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On mx7ulp EVK board, we use MX25R6435F NOR flash, add its parameters
and IDs to flash parameter array. Otherwise, the flash probe will fails.Signed-off-by: Ye Li
(cherry picked from commit 0d6bee19bb3e87ebf984fdc218b3b020006cb2e9) -
Add the fuse checking in drivers, when the module is disabled in fuse,
the driver will not work.Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C,
USB-EHCI, GIS, LCDIF and EPDC.Signed-off-by: Ye Li
(cherry picked from commit 1704e116f9b39aeb99201919a18bc2b1e19a980e)
(cherry picked from commit 2d3b5df8530cd5ef883750378838dea7c40259af)
(cherry picked from commit 6e8c9ae136bee8ec0121c1db4b935510caad09db) -
The iMX6SX uses compatible string "fsl,imx6sx-gpmi-nand" for gpmi
node in DTS, so update the driver for the stringSigned-off-by: Ye Li
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iMX8MM DDR3L validation board uses GD25LQ16, but its id is not in
u-boot flash ids table. Add the new id and parameters into the table.Signed-off-by: Ye Li
(cherry picked from commit 04b813d4687028ce65c9772029d5da5500ec2e1c) -
Since iMX8 has enabled clock uclass, we can parse the clocks from DTB
and enable them in GPMI driver.Signed-off-by: Ye Li
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enable the GPMI NAND driver for i.MX8, the major changes
- register defination for i.mx8
- Makefile change for misc.c
- DMA structure must be 32bit addressSigned-off-by: Han Xu
(cherry picked from commit 474c4270108551647c7064a23abdc2e11d7f37ab)
(cherry picked from commit 029cce25cce94c30dd0305bb9b17ba7f939ee1af) -
Update the mini driver to add support for getting ecc info from ONFI and
support read image data from page unaligned NAND address.Signed-off-by: Ye Li
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Update the gpmi/apbh_dma/bch drivers and relevant registers for i.MX8M.
Signed-off-by: Ye Li
(cherry picked from commit 6cb839cabb42b81e37214e00448fc5dac89fd1f1)
(cherry picked from commit 468509f86a2d040398aa6b019bb6644bfb0ef11c) -
This patch is a porting of
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_4.1.15_1.0.0_ga&id=e4dacc44d22e9474ec456cb330df525cd805ea38
"
i.MX6QP and i.MX7D BCH module integrated a new feature to detect the
bitflip number for erased NAND page. So for these two platform, set the
erase threshold to gf/2 and if bitflip detected, GPMI driver will
correct the data to all 0xFF.Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q
with the one for i.MX6QP.
"In this patch, i.MX6UL is added and threshold changed to use ecc_strength.
Signed-off-by: Peng Fan
(cherry picked from commit 489929be0221bb7d4c46bb5bc6083650b78f73e0)
Signed-off-by: Ye Li
(cherry picked from commit 37d7f9614aa357f270312d7ceaab0f7006dc5aea)
(cherry picked from commit 5f50a850dd42d28b6105ee7e1b4b1822e7ba569b) -
This patch is porting from linux:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_4.1.15_1.0.0_ga&id=3d42fcece496224fde59f9343763fb2dfc5b0768"
We may meet the bitflips in reading an erased page(contains all 0xFF),
this may causes the UBIFS corrupt, please see the log from Elie:-----------------------------------------------------------------
[ 3.831323] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
[ 3.845026] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
[ 3.858710] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
[ 3.872408] UBI error: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read 16384 bytes
...
[ 4.011529] UBIFS error (pid 36): ubifs_recover_leb: corrupt empty space LEB 27:237568, corruption starts at 9815
[ 4.021897] UBIFS error (pid 36): ubifs_scanned_corruption: corruption at LEB 27:247383
[ 4.030000] UBIFS error (pid 36): ubifs_scanned_corruption: first 6569 bytes from LEB 27:247383
-----------------------------------------------------------------This patch does a check for the uncorrectable failure in the following steps:
[0] set the threshold.
The threshold is set based on the truth:
"A single 0 bit will lead to gf_len(13 or 14) bits 0 after the BCH
do the ECC."For the sake of safe, we will set the threshold with half the gf_len, and
do not make it bigger the ECC strength.[1] count the bitflips of the current ECC chunk, assume it is N.
[2] if the (N
(cherry picked from commit ceb324a2914487aa517a6c70a06a20b5e3438fda)
(cherry picked from commit 026751697e41c7376414a8716cf0ea4bf998b85f)
(cherry picked from commit 93b481f07b8cb59c733f420bebea77ac484f9036) -
Provide an option in DT to use legacy bch geometry, which compatible
with the 3.10 kernel bch setting. To enable the feature, adding
"fsl,legacy-bch-geometry" under gpmi-nand node.NOTICE: The feature must be enabled/disabled in both u-boot and kernel.
Signed-off-by: Han Xu
Signed-off-by: Ye Li -
The code change updated the NAND driver BCH ECC layout algorithm to
support large oob size NAND chips(oob > 1024 bytes) and proposed a new
way to set ECC layout.Current implementation requires each chunk size larger than oob size so
the bad block marker (BBM) can be guaranteed located in data chunk. The
ECC layout always using the unbalanced layout(Ecc for both meta and
Data0 chunk), but for the NAND chips with oob larger than 1k, the driver
cannot support because BCH doesn’t support GF 15 for 2K chunk.The change keeps the data chunk no larger than 1k and adjust the ECC
strength or ECC layout to locate the BBM in data chunk. General idea for
large oob NAND chips is1.Try all ECC strength from the minimum value required by NAND spec to
the maximum one that works, any ECC makes the BBM locate in data chunk
can be chosen.2.If none of them works, using separate ECC for meta, which will add one
extra ecc with the same ECC strength as other data chunks. This extra
ECC can guarantee BBM located in data chunk, of course, we need to check
if oob can afford it.Previous code has two methods for ECC layout setting, the
legacy_calc_ecc_layout and calc_ecc_layout_by_info, the difference
between these two methods is, legacy_calc_ecc_layout set the chunk size
larger chan oob size and then set the maximum ECC strength that oob can
afford. While the calc_ecc_layout_by_info set chunk size and ECC
strength according to NAND spec. It has been proved that the first
method cannot provide safe ECC strength for some modern NAND chips, so
in current code,1. Driver read NAND parameters first and then chose the proper ECC
layout setting method.2. If the oob is large or NAND required data chunk larger than oob size,
chose calc_ecc_for_large_oob, otherwise use calc_ecc_layout_by_info3. legacy_calc_ecc_layout only used for some NAND chips does not contains
necessary information. So this is only a backup plan, it is NOT
recommended to use these NAND chips.Signed-off-by: Han Xu
Signed-off-by: Ye Li -
Add SPI nor ID parameters for mt35xu512aba flash.
Signed-off-by: Ye Li
26 Mar, 2019
1 commit
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This converts the following to Kconfig:
CONFIG_SF_DEFAULT_BUS
CONFIG_SF_DEFAULT_CS
CONFIG_SF_DEFAULT_MODE
CONFIG_SF_DEFAULT_SPEEDI use moveconfig script and then manual check on generated u-boot.cfg
to solve the remaining issue.Signed-off-by: Patrick Delaunay
13 Mar, 2019
1 commit
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Currently the spl system calls nand_init which does nothing.
It isn't until an attempt to load from NAND that it gets initialized.
Subsequent attempts to load just skip the initialization because
NAND is already initialized.This moves the contents of mxs_nand_init to nand_init. In the event
of an error, it clears the number of nand chips found. Any
attempts to use nand will check if there are nand chips available
instead of actually doing the initialization at that time. If there
are none, it will return an error to the higher level calls.Signed-off-by: Adam Ford
15 Feb, 2019
3 commits
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The initialization of the NAND in SPL hard-coded ecc.bytes,
ecc.size, and ecc.strength which may work for some NAND parts,
but it not appropriate for others. With the pending patch
"mxs_nand: Fix BCH read timeout error on boards requiring ECC"
the driver can auto configure the ECC when these entries are
blank. This patch has been tested in NAND flash with oob 64
and oob 128.Signed-off-by: Adam Ford
Tested-by: Jörg Krause
Acked-by: Tim Harvey
Tested-by: Tim Harvey -
mxs_nand_init_dma is only referenced from mxs_nand.c. It's not
referenced in any headers or outside code, so this patch
defines it as static.Signed-off-by: Adam Ford
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The LogicPD board uses a Micron Flash with ECC. To boot this from
SPL, the ECC needs to be correctly configured or the BCH engine
times out.Signed-off-by: Adam Ford
Acked-by: Stefan Agner
Tested-by: Jörg Krause
Acked-by: Tim Harvey
Tested-by: Tim Harvey
07 Feb, 2019
9 commits
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Add a tiny SPI flash stack that just supports reading data/images from
SPI flash. This is useful for boards that have SPL size constraints and
would need to use SPI flash framework just to read images/data from
flash. There is approximately 1.5 to 2KB savings with this.Based on prior work of reducing spi flash id table by
Simon GoldschmidtSigned-off-by: Vignesh R
Tested-by: Simon Goldschmidt
Tested-by: Stefan Roese
Tested-by: Horatiu Vultur
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki #zynq-microzed -
spi_flash and spi_flash_ids are no longer needed after SPI NOR
migration. Remove them.Signed-off-by: Vignesh R
Tested-by: Simon Goldschmidt
Tested-by: Stefan Roese
Tested-by: Horatiu Vultur
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki #zynq-microzed -
Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD
layer. Fix up sf_dataflash to work in legacy way. And update sandbox to
use new interfaces/definitionsSigned-off-by: Vignesh R
Tested-by: Simon Goldschmidt
Tested-by: Stefan Roese
Tested-by: Horatiu Vultur
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki #zynq-microzed -
Linux uses "jedec,spi-nor" as compatible string for JEDEC compatible
SPI Flash device nodes. Therefore make U-Boot also to look for the same
compatible string so that we can use Linux DTS files as is.Signed-off-by: Vignesh R
Tested-by: Simon Goldschmidt
Tested-by: Stefan Roese
Tested-by: Horatiu Vultur
Tested-by: Jagan Teki #zynq-microzed -
For legacy reasons, we will have to keep around U-Boot specific
SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new frameworkSigned-off-by: Vignesh R
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki #zynq-microzed -
Sync Serial Flash Discoverable Parameters (SFDP) parsing support from
Linux. This allows auto detection and configuration of Flash parameters.Signed-off-by: Vignesh R
Tested-by: Simon Goldschmidt
Tested-by: Stefan Roese
Tested-by: Horatiu Vultur
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki #zynq-microzed -
Sync changes from Linux SPI NOR framework to add 4 byte addressing
support. This is required in order to support flashes like MT35x
that no longer support legacy Bank Address Register(BAR) way of accessing
>16MB region.Signed-off-by: Vignesh R
Tested-by: Simon Goldschmidt
Tested-by: Stefan Roese
Tested-by: Horatiu Vultur
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki #zynq-microzed -
Many SPI controllers have special MMIO interfaces which provide
accelerated read/write access but require knowledge of flash parameters
to make use of it. Recent spi-mem layer provides a way to support such
controllers.
Therefore, add spi-mem support to spi-nor-core as a way to support SPI
controllers with MMIO interface. SPI MEM layer takes care of translating
spi_mem_ops to spi_xfer()s in case of legacy SPI controllers.Signed-off-by: Vignesh R
Tested-by: Simon Goldschmidt
Tested-by: Stefan Roese
Tested-by: Horatiu Vultur
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki #zynq-microzed -
Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different types of
quad mode enable sequences. Many newer flashes no longer support BANK
registers used by sf layer to a access >16MB of flash address space.
So, sync SPI NOR framework from Linux v4.19 that supports all the
above features. Start with basic sync up that brings in basic framework
subsequent commits will bring in more features.Signed-off-by: Vignesh R
Tested-by: Simon Goldschmidt
Tested-by: Stefan Roese
Tested-by: Horatiu Vultur
Reviewed-by: Jagan Teki
Tested-by: Jagan Teki #zynq-microzed
29 Jan, 2019
1 commit
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The initialization function calls a nand_chip.scan_bbt(mtd) but
scan_bbt is never initialized resulting in an undefined function
pointer. This will direct the function pointer to nand_default_bbt
defined in the same file.Signed-off-by: Adam Ford
Acked-by: Stefan Agner
24 Jan, 2019
1 commit
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This patch adds support for nand multi chip select.
Also adding CONFIG_SYS_NAND_MAX_CHIPS to Kconfig to specify maximum number
of nand chips.Signed-off-by: Tummala Karthik Reddy
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
21 Jan, 2019
1 commit
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This commit converts the following items to Kconfig:
CONFIG_ATMEL_NAND_HWECC
CONFIG_ATMEL_NAND_HW_PMECC
CONFIG_PMECC_CAP
CONFIG_PMECC_SECTOR_SIZE
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.htmlFixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment")
[trini: Make the migration be size neutral and possibly not fix the
above in all cases]
Reported-by: Daniel Evans
Cc: Eugen Hristev
Signed-off-by: Derald D. Woods
Signed-off-by: Tom Rini
