07 May, 2018
1 commit
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.Signed-off-by: Tom Rini
15 Feb, 2018
1 commit
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Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bcafbb05e59aabdc31368984e76acaabc4.Signed-off-by: Tom Rini
10 Feb, 2018
1 commit
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To make this driver easier to be reused, dual-license DDR driver.
Signed-off-by: York Sun
CC: Simon Glass
CC: Tom Rini
CC: Heinrich Schuchardt
CC: Thomas Schaefer
CC: Masahiro Yamada
CC: Robert P. J. Day
CC: Alexander Merkle
CC: Joakim Tjernlund
CC: Curt Brune
CC: Valentin Longchamp
CC: Wolfgang Denk
CC: Anatolij Gustschin
CC: Ira W. Snyder
CC: Marek Vasut
CC: Kyle Moffett
CC: Sebastien Carlier
CC: Stefan Roese
CC: Peter Tyser
CC: Paul Gortmaker
CC: Peter Tyser
CC: Jean-Christophe PLAGNIOL-VILLARD
11 Sep, 2017
1 commit
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CoreLink Cache Coherent Interconnect (CCI) provides full cache
coherency between two clusters of multi-core CPUs and I/O coherency
for devices and I/O masters.This patch add new config option SYS_FSL_HAS_CCI400 and moves
existing register space definaton of CCI-400 bus to fsl_immap to be
shared. CONFIG_SYS_CCI400_ADDR is replaced with SYS_CCI400_OFFSET
in Kconfig.Signed-off-by: Ashish Kumar
Signed-off-by: Prabhakar Kushwaha
[YS: revised commit message, squashed patches for armv8 and armv7]
Reviewed-by: York Sun
15 Sep, 2016
1 commit
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32 more debug registers are added for newer DDR controllers.
Signed-off-by: York Sun
Signed-off-by: Shengzhou Liu
21 May, 2015
1 commit
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This register is reserved and shouldn't have been exposed.
Accessing it may have unexpected result on different SoCs.Signed-off-by: York Sun
23 Apr, 2014
1 commit
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Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register
calculation and programming.Signed-off-by: York Sun
26 Nov, 2013
1 commit
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Fix ccsr_ddr structure to avoid using typedef. Combine DDR2 and DDR3
structure for 83xx, 85xx and 86xx.Signed-off-by: York Sun