11 May, 2020
1 commit
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iMX8M dispmix uses GPR registers for display modules in
the mix. Implement a reset driver to use DTBSigned-off-by: Ye Li
(cherry picked from commit a981b518f357ced460fd87445b327aedadc86ee0)
11 Feb, 2020
1 commit
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sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
06 Feb, 2020
3 commits
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At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.Move the compatibility features into a separate header file.
Signed-off-by: Simon Glass
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At present devres.h is included in all files that include dm.h but few
make use of it. Also this pulls in linux/compat which adds several more
headers. Drop the automatic inclusion and require files to include devres
themselves. This provides a good indication of which files use devres.Signed-off-by: Simon Glass
Reviewed-by: Anatolij Gustschin -
This function name conflicts with our desire to #define free() to
something else on sandbox. Since it deals with resources, rename it to
rfree().Signed-off-by: Simon Glass
03 Feb, 2020
1 commit
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In Cyclone 5 SoC platform, the first USB probing is failed but second
probing is success. DWC2 USB driver read gsnpsid register right after
de-assert reset, but controller is not ready yet and it returns gsnpsid 0.
Polling reset status after de-assert reset to solve the issue.Retry with this fix more than 10 times without issue.
Signed-off-by: Ley Foon Tan
01 Nov, 2019
1 commit
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Introduce reset driver for Synopsys ARC HSDK SoC
Signed-off-by: Eugeniy Paltsev
Signed-off-by: Alexey Brodkin
25 Oct, 2019
1 commit
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This patch adds reset controller driver for MediaTek MIPS platform and
header file for mt7628.Signed-off-by: Weijie Gao
08 Oct, 2019
1 commit
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Add support for the reset controller that's used on the i.MX7D
and i.MX8MQ. This will be needed to be able to assert the PCIe
reset pins. Bindings taken from Linux, driver implementation
mostly taken from Linux and adjusted to U-Boot infrastructure.Signed-off-by: Patrick Wildt
Reviewed-by: Fabio Estevam
12 Aug, 2019
1 commit
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Move env_get() over to the new header file.
Acked-by: Joe Hershberger
Signed-off-by: Simon Glass
21 Jul, 2019
1 commit
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This moves sysreset support for socfgpa from ad-hoc code in mach-socfpga
to a UCLASS_SYSRESET based dm driver.A side effect is that gen5 and a10 can now select between cold and warm
reset.Signed-off-by: Simon Goldschmidt
11 May, 2019
1 commit
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Convert 'socfpga_reset_probe' to use 'dev_read_u32_default'
instead of 'fdtdec_get_int'.Signed-off-by: Simon Goldschmidt
09 May, 2019
2 commits
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- H6 Beelink GS1 board (Clément)
- Olimex A64-Teres-I board (Jonas)
- sunxi build fix for CONFIG_CMD_PXE|DHCP (Ondrej)
- Change include order (Jagan)
- EPHY clock changes (Jagan)
- EMAC enablement on Cubietruck Plus, BPI-M3 (Chen-Yu Tsai) -
Getting a RESET by index with device is not straight forward
for some use-cases like handling clock operations for child
node in parent driver. So we need to process the child node
in parent probe via ofnode and process RESET operation for child
without udevice but with ofnode.So add reset_get_by_index_nodev() and move the common code
in reset_get_by_index_tail() to use for reset_get_by_index()Cc: Stephen Warren
Signed-off-by: Jagan Teki
Reviewed-by: Simon Glass
01 May, 2019
1 commit
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Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common
header file path, so that we can get the correct path directly.Signed-off-by: Kever Yang
Reviewed-by: Philipp Tomsich
25 Apr, 2019
1 commit
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- Add support for Amlogic p200 & p201 Reference Designs
- Add Amlogic SoC information display
- Add support for the Libretech-AC AML-S805X-AC board
- Add Amlogic AXG reset compatible
- Add I2C support for Amlogic AXG
- Fix AXG PIN and BANK pinctrl definitions
- Fix regmap_read_poll_timeout warning about sandbox_timer_add_offset
- Add initial support for Amlogic G12A SoC and U200 board
- Enable PHY_REALTEK for selected boards
- Fix Khadas VIM2 README
24 Apr, 2019
1 commit
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It adds a Driver Model compatible reset driver for HiSlicon platform.
The driver implements a custom .of_xlate function, and uses .data field
as reset register offset and .id field as bit shift.Signed-off-by: Shawn Guo
Acked-by: Joe Hershberger
18 Apr, 2019
2 commits
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This adds code to take peripherals out of reset based on an environment
variable. This is in preparation for removing the code that does this from
SPL.However, some drivers even in current Linux cannot handle peripheral reset,
so until this works, we need a compatibility workaround.This workaround is implemented in the 'assert' and 'remove' callbacks of
this reset driver: the 'assert' callback does not disable peripherals that
were already taken out of reset, while the 'remove' callback, which is
called on OS_PREPARE, deasserts all peripheral resets if the environment
variable "socfpga_legacy_reset_compat" is set to 1, which is what the gen5
SPL did up to now.This is in preparation to clean up the SPL and implementing proper reset
handling for U-Boot.Signed-off-by: Simon Goldschmidt
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The only member of this driver's priv struct is a pointer, which is
called 'membase'. However, since this driver handles multiple sub-
architectures, this is not the base address from dts but the base
address of some common registers of those sub-arches.Reflect this better in sourcecode by renaming 'membase' to 'modrst_base'.
Signed-off-by: Simon Goldschmidt
10 Apr, 2019
1 commit
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Signed-off-by: Neil Armstrong
19 Jan, 2019
1 commit
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Add common reset driver for all Allwinner SoC's.
Since CLK and RESET share common DT compatible, it is CLK driver
job is to bind the reset driver. So add CLK bind call on respective
SoC driver by passing ccu map descriptor so-that reset deassert,
deassert operations held based on ccu reset table defined from
CLK driver.Select DM_RESET via CLK_SUNXI, this make hidden section of RESET
since CLK and RESET share common DT compatible and code.Signed-off-by: Jagan Teki
Acked-by: Maxime Ripard
15 Jan, 2019
1 commit
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This patch adds reset controller driver for MediaTek SoCs.
Signed-off-by: Ryder Lee
Signed-off-by: Weijie Gao
28 Oct, 2018
1 commit
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Complete in the drivers directory the work started with
commit 83d290c56fab ("SPDX: Convert all of our single
license tags to Linux Kernel style").Reviewed-by: Simon Glass
Signed-off-by: Patrick Delaunay
11 Sep, 2018
2 commits
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Some TI Keystone 2 and K3 family of SoCs contain a system controller
(like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and
the Device Management and Security Controller on AM65x SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations are
provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.This patch adds a reset driver that communicates to the system
controller over the TI SCI protocol for performing reset management of
various devices present on the SoC. Various reset functionalities are
achieved by the means of different TI SCI device operations provided by
the TI SCI framework.This code is loosely based on the drivers/reset/reset-ti-sci.c driver of
the Linux kernel.Reviewed-by: Tom Rini
Signed-off-by: Andreas Dannenberg
Signed-off-by: Lokesh Vutla -
Add a reset operations function pointer to support querying the current
status of a reset control.Reviewed-by: Tom Rini
Signed-off-by: Andreas Dannenberg
Signed-off-by: Lokesh Vutla
21 Jul, 2018
1 commit
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Following next kernel rcc bindings, we must use a MFD
RCC driver which is able to bind both clock and reset
drivers.We can reuse and adapt RCC MFD driver already available
for MCU SoCs (F4/F7/H7).Signed-off-by: Patrice Chotard
Signed-off-by: Patrick Delaunay
23 Jun, 2018
1 commit
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Signed-off-by: Masahiro Yamada
01 Jun, 2018
1 commit
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Signed-off-by: Álvaro Fernández Rojas
Reviewed-by: Simon Glass
Reviewed-by: Daniel Schwierzeck
08 May, 2018
2 commits
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Currently, regmap_init_mem() takes a udevice. This requires the node
has already been associated with a device. It prevents syscon/regmap
from behaving like those in Linux.Change the first argumenet to take a device node.
Signed-off-by: Masahiro Yamada
Acked-by: Neil Armstrong
Reviewed-by: Simon Glass -
Putting zero length array at the end of struct is a common technique
to embed arbitrary length of members. There is no good reason to let
regmap_alloc_count() branch by "if (count base is an alias of
regmap->ranges[0].start, but it is not helpful but make the code
just ugly.Rename regmap_alloc_count() to regmap_alloc() because the _count
suffix seems pointless.Signed-off-by: Masahiro Yamada
Reviewed-by: Simon Glass
[trini: fixup cpu_info-rcar.c]
Signed-off-by: Tom Rini
07 May, 2018
1 commit
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.Signed-off-by: Tom Rini
28 Apr, 2018
1 commit
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We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.Signed-off-by: Tom Rini
19 Apr, 2018
1 commit
18 Apr, 2018
3 commits
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Add reset lines for ethernet controller on each SoC.
Signed-off-by: Kunihiko Hayashi
Signed-off-by: Masahiro Yamada -
This fixes the Coverity Defect CID 175348 when dev_count_phandle_with_args()
returns a negative value.Fixes: 0c28233903b5 ("reset: Add get/assert/deassert/release for bulk of reset signals")
Signed-off-by: Neil Armstrong
17 Apr, 2018
1 commit
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Add a DM compatible reset driver for the SoCFPGA platform.
Signed-off-by: Dinh Nguyen
10 Apr, 2018
3 commits
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This patch adds the bulk reset API tests for the sandbox test suite.
Unlike the main test, it also check the "other" reset signal using the bulk API
and checks if the resets are correctly asserted/deasserted.To allow the bulk API to work, and avoid changing the DT, the number of resets
of the sandbox reset controller has been bumped to 101 for the "other" reset
line to be valid.Signed-off-by: Neil Armstrong
Reviewed-by: Simon Glass -
This patch adds a "bulk" API to the reset API in order to get/deassert/
assert/release a group of reset signals associated with a device.This bulk API will avoid adding a copy of the same code to manage
a group of reset signals in drivers.Signed-off-by: Neil Armstrong
Reviewed-by: Simon Glass -
The Amlogic Meson SoCs embeds up to 256 reset lines, add the corresponding
driver.Signed-off-by: Neil Armstrong