Eric Lee / smarc-uboot

22 Feb, 2014

1 commit

  • ee456337c   SMC91111: Fix compilation warnings ... Browse Code »

    This patch fixes the following warning messages coming out of
    'drivers/net/smc91111.h' when compiled for 'vexpress_aemv8a':

    warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]

    Currently this issue seems to surface when SMSC is compiled for 64-bit
    ARMv8 platforms, so the change is protected under CONFIG_ARM64, so that
    it doesn't break other existing platforms.

    In addition this patch tries to fix some checkpatch errors and warnings
    (others related to camel-casing and volatile usage will be addressed
    by a later patch).

    This fix has been tested on both ARMv8 foundation model v1 and v2.

    Signed-off-by: Bhupesh Sharma

    Bhupesh Sharma
     

21 Feb, 2014

2 commits

20 Feb, 2014

2 commits

  • 3e1135025   Merge branch 'u-boot/master' into 'u-boot-arm/master' ... Browse Code »

    Conflicts:
    Makefile
    drivers/net/npe/Makefile

    These two conflicts arise from commit 0b2d3f20
    ("ARM: NET: Remove the IXP NPE ethernet driver") and are
    resolved by deleting the drivers/net/npe/Makefile file
    and removing the CONFIG_IXP4XX_NPE line from Makefile.

    Albert ARIBAUD
     
  • 6825a95b0   kbuild: use Linux Kernel build scripts ... Browse Code »

    Now we are ready to switch over to real Kbuild.

    This commit disables temporary scripts:
    scripts/{Makefile.build.tmp, Makefile.host.tmp}
    and enables real Kbuild scripts:
    scripts/{Makefile.build,Makefile.host,Makefile.lib}.

    This switch is triggered by the line in scripts/Kbuild.include
    -build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj
    +build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj

    We need to adjust some build scripts for U-Boot.
    But smaller amount of modification is preferable.

    Additionally, we need to fix compiler flags which are
    locally added or removed.

    In Kbuild, it is not allowed to change CFLAGS locally.
    Instead, ccflags-y, asflags-y, cppflags-y,
    CFLAGS_$(basetarget).o, CFLAGS_REMOVE_$(basetarget).o
    are prepared for that purpose.

    Signed-off-by: Masahiro Yamada
    Tested-by: Gerhard Sittig

    Masahiro Yamada
     

19 Feb, 2014

5 commits

11 Feb, 2014

2 commits

07 Feb, 2014

4 commits

  • 50b0df814   net/designware: make driver compatible with data cache ... Browse Code »

    Up until now this driver only worked with data cache disabled.
    To make it work with enabled data cache following changes were required:

    * Flush Tx/Rx buffer descriptors their modification
    * Invalidate Tx/Rx buffer descriptors before reading its values
    * Flush cache for data passed from CPU to GMAC
    * Invalidate cache for data passed from GMAC to CPU

    Cc: Joe Hershberger
    Cc: Vipin Kumar
    Cc: Stefan Roese
    Cc: Mischa Jonker
    Cc: Shiraz Hashim
    Cc: Albert ARIBAUD
    Cc: Amit Virdi
    Cc: Sonic Zhang
    Signed-off-by: Alexey Brodkin

    Alexey Brodkin
     
  • 92a190aaa   net/designware - switch driver to phylib usage ... Browse Code »

    With this change driver will benefit from existing phylib and thus
    custom phy functionality implemented in the driver will go away:
    * Instantiation of the driver is now much shorter - 2 parameters
    instead of 4.
    * Simplified phy management/functoinality in driver is replaced with
    rich functionality of phylib.
    * Support of custom phy initialization is now done with existing
    "board_phy_config".

    Note that after this change some previously used config options
    (driver-specific PHY configuration) will be obsolete and they are simply
    substituted with similar options of phylib.

    For example:
    * CONFIG_DW_AUTONEG - no need in this one. Autonegotiation is enabled
    by default.
    * CONFIG_DW_SEARCH_PHY - if one wants to specify attached phy
    explicitly CONFIG_PHY_ADDR board config option has to be used, otherwise
    automatically the first discovered on MDIO bus phy will be used

    I believe there's no need now in "doc/README.designware_eth" because
    user only needs to instantiate the driver with "designware_initialize"
    whose prototype exists in "include/netdev.h".

    Cc: Joe Hershberger
    Cc: Vipin Kumar
    Cc: Stefan Roese
    Cc: Mischa Jonker
    Cc: Shiraz Hashim
    Cc: Albert ARIBAUD
    Cc: Amit Virdi
    Cc: Sonic Zhang
    Signed-off-by: Alexey Brodkin

    Alexey Brodkin
     
  • 74cb708d5   net/designware: add explicit reset of {tx|rx}_currdescnum ... Browse Code »

    Driver "init" function might be called multiple times.
    On every "init" Tx/Rx buffer descriptors are initialized: "descs_init"
    -> "{tx|rx}_descs_init".

    In its turn those init functions set MAC's "{tx|rx}desclistaddr" to
    point on the first buffer descriptor in the list.

    So CPU to start operation from the first buffer descriptor as well after
    every "init" we have to reset "{tx|rx}_currdescnum".

    Cc: Joe Hershberger
    Cc: Vipin Kumar
    Cc: Stefan Roese
    Cc: Mischa Jonker
    Signed-off-by: Alexey Brodkin

    Alexey Brodkin
     
  • 819ca38fa   blackfin: Initialize the EMAC VLAN with proper default value ... Browse Code »

    EMAC_VLANx regs is not properly initiallized in u-boot, once it's overwrite in the
    kernel when DSA enabled, hot reset will lead to bringing up EMAC fail in u-boot.

    Signed-off-by: Aaron Wu
    Signed-off-by: Sonic Zhang

    Aaron Wu
     

06 Feb, 2014

1 commit

05 Feb, 2014

1 commit

04 Feb, 2014

2 commits

25 Jan, 2014

1 commit

22 Jan, 2014

2 commits

21 Jan, 2014

1 commit

15 Jan, 2014

1 commit

  • f66e3ded6   net: phy: atheros: Fix the masks for AR8031/8035 ... Browse Code »

    Use the same masks as used in the kernel:
    https://git.kernel.org/cgit/linux/kernel/git/stable/linux-stable.git/tree/drivers/net/phy/at803x.c?id=refs/tags/v3.12.6

    With such changes Ethernet is functional on hummingboard solo.

    Signed-off-by: Fabio Estevam
    Acked-by: Stefano Babic
    Acked-by: Joe Hershberger
    Acked-by: Marek Vasut
    Patch: 306640

    Fabio Estevam
     

10 Jan, 2014

1 commit

06 Jan, 2014

1 commit

18 Dec, 2013

1 commit

12 Dec, 2013

1 commit

11 Dec, 2013

1 commit

05 Dec, 2013

1 commit

02 Dec, 2013

1 commit

26 Nov, 2013

2 commits

  • 629d6b32d   powerpc/mpc85xx: Add T2080/T2081 SoC support ... Browse Code »

    Add support for Freescale T2080/T2081 SoC.

    T2080 includes the following functions and features:
    - Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz
    - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
    - Hierarchical interconnect fabric
    - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
    - Data Path Acceleration Architecture (DPAA) incorporating acceleration
    - 16 SerDes lanes up to 10.3125 GHz
    - 8 mEMACs for network interfaces (four 1Gbps MACs and four 10Gbps/1Gbps MACs)
    - High-speed peripheral interfaces
    - Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV)
    - Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz
    - Additional peripheral interfaces
    - Two serial ATA (SATA 2.0) controllers
    - Two high-speed USB 2.0 controllers with integrated PHY
    - Enhanced secure digital host controller (SD/SDHC/SDXC/eMMC)
    - Enhanced serial peripheral interface (eSPI)
    - Four I2C controllers
    - Four 2-pin UARTs or two 4-pin UARTs
    - Integrated Flash Controller supporting NAND and NOR flash
    - Three eight-channel DMA engines
    - Support for hardware virtualization and partitioning enforcement
    - QorIQ Platform's Trust Architecture 2.0

    Differences between T2080 and T2081:
    Feature T2080 T2081
    1G Ethernet numbers: 8 6
    10G Ethernet numbers: 4 2
    SerDes lanes: 16 8
    Serial RapidIO,RMan: 2 no
    SATA Controller: 2 no
    Aurora: yes no
    SoC Package: 896-pins 780-pins

    Signed-off-by: Shengzhou Liu
    Acked-by: York Sun

    Shengzhou Liu
     
  • 82a55c1ef   net/fman: Add support for 10GEC3 and 10GEC4 ... Browse Code »

    There are more than two 10GEC in single FMAN in some SoCs(e.g. T2080).
    This patch adds support for 10GEC3 and 10GEC4.

    Signed-off-by: Shengzhou Liu

    Shengzhou Liu
     

25 Nov, 2013

2 commits

23 Nov, 2013

4 commits

  • 2287286be   net: rtl8169: Add support for RTL8168d/8111d ... Browse Code »

    This chip is compatible with the existing driver, except that it uses
    BAR2 instead of BAR1 for the I/O memory region. Using this patch I can
    use the PCIe ethernet interface on the CompuLab Trimslice to boot from
    the network.

    Signed-off-by: Thierry Reding
    Patch: 276477

    Thierry Reding
     
  • 22ece0e2e   net: rtl8169: Improve cache maintenance ... Browse Code »

    Instead of directly calling the low-level invalidate_dcache_range() and
    flush_cache() functions, provide thin wrappers that take into account
    alignment requirements.

    While at it, fix a case where the cache was flushed but should have been
    invalidated, two cases where the buffer data was flushed instead of the
    descriptor and a missing cache invalidation before reading the packet
    data that the NIC just wrote to memory.

    Signed-off-by: Thierry Reding
    Patch: 276474

    Thierry Reding
     
  • a5144237a   net: zynq_gem: Add d-cache support ... Browse Code »

    Added d-cache support for zynq_gem.c,
    Observed a difference of +0.8 MiB/s when downloading
    a file of size of 3007944Bytes.

    With d-cache OFF:
    ----------------
    Filename 'uImage'.
    Load address: 0x800
    Loading: #################################################################
    #################################################################
    #################################################################
    ##########
    1.3 MiB/s
    done
    Bytes transferred = 3007944 (2de5c8 hex)

    With d-cache ON:
    ---------------
    Filename 'uImage'.
    Load address: 0x800
    Loading: #################################################################
    #################################################################
    #################################################################
    ##########
    2.1 MiB/s
    done
    Bytes transferred = 3007944 (2de5c8 hex)

    Changes on zynq_gem for d-cache support:
    - Tx and Rx buffers are cache-aligned
    - Updated logic for invalidating Rx buffers and flushing Tx buffers.
    - Tx and Rx BD's are allocated from non-cacheable region.
    (When BDs are cached, we don't see a consistent link)
    - Use TX BD status intead of txsr status checks.

    Signed-off-by: Srikanth Thokala
    Signed-off-by: Jagannadha Sutradharudu Teki
    Signed-off-by: Michal Simek

    Srikanth Thokala
     
  • f27f3b526   phy: Use general phy code for smsc lan8720a ... Browse Code »

    Signed-off-by: David Dueck

    David Dueck