18 Mar, 2015

1 commit


25 Jan, 2014

1 commit


13 Dec, 2013

1 commit


05 Dec, 2013

1 commit

  • MPC8349 has been using mpc85xx DDR driver through a symbolic link to
    mpc85xx_ddr_gen2.c. After consolidating the drivers to a single set
    under driver/ddr/fsl/, the link is replaced by referring driver
    directly. We now can simply enable the macro and use the driver.
    Other mpc83xx SoCs still use their own driver.

    Signed-off-by: York Sun

    York Sun
     

26 Nov, 2013

1 commit


05 Nov, 2013

2 commits


15 Oct, 2013

1 commit


24 Jul, 2013

2 commits


23 Jul, 2013

2 commits


08 Jun, 2013

1 commit

  • The pci_indirect.c file is always compiled when
    CONFIG_PCI is defined although the indirect PCI
    bridge support is not needed by every board.

    Introduce a new CONFIG_PCI_INDIRECT_BRIDGE
    config option and only compile indirect PCI
    bridge support if this options is enabled.

    Also add the new option into the configuration
    files of the boards which needs that.

    Compile tested for powerpc, x86, arm and nds32.
    MAKEALL results:

    powerpc:
    --------------------- SUMMARY ----------------------------
    Boards compiled: 641
    Boards with warnings but no errors: 2 ( ELPPC MPC8323ERDB )
    ----------------------------------------------------------
    Note: the warnings for ELPPC and MPC8323ERDB are present even
    without the actual patch.

    x86:
    --------------------- SUMMARY ----------------------------
    Boards compiled: 1
    ----------------------------------------------------------

    arm:
    --------------------- SUMMARY ----------------------------
    Boards compiled: 311
    ----------------------------------------------------------

    nds32:
    --------------------- SUMMARY ----------------------------
    Boards compiled: 3
    ----------------------------------------------------------

    Cc: Tom Rini
    Cc: Daniel Schwierzeck
    Signed-off-by: Gabor Juhos

    Gabor Juhos
     

04 Jul, 2012

1 commit

  • extention of commit 3b6b256 "powerpc/mpc83xx: increment
    malloc heap size for the MPC832x MDS boards" to all other
    mpc83xx based boards. It fixes "Unable to save the rest
    of sector" messages when trying to save the environment
    to flash.

    Signed-off-by: Kim Phillips

    Kim Phillips
     

21 Jun, 2012

1 commit


04 Nov, 2011

4 commits


22 Oct, 2011

2 commits


06 Oct, 2011

1 commit


30 Sep, 2011

1 commit


27 Oct, 2010

2 commits

  • CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not
    being able to use "sizeof(struct global_data)" in assembler files.
    Recent experience has shown that manual synchronization is not
    reliable enough. This patch renames CONFIG_SYS_GBL_DATA_SIZE into
    GENERATED_GBL_DATA_SIZE which gets automatically generated by the
    asm-offsets tool. In the result, all definitions of this value can be
    deleted from the board config files. We have to make sure that all
    files that reference such data include the new file.

    No other changes have been done yet, but it is obvious that similar
    changes / simplifications can be done for other, related macro
    definitions as well.

    Signed-off-by: Wolfgang Denk
    Acked-by: Kumar Gala

    Wolfgang Denk
     
  • CONFIG_SYS_INIT_RAM_END was a misnomer as it suggests this might be
    some end address; to make the meaning more clear we rename it into
    CONFIG_SYS_INIT_RAM_SIZE

    No other code changes are performed in this patch, only minor editing
    of white space (due to the changed length) and the comments was done,
    where noticed.

    Note that the code for the PATI and cmi_mpc5xx board configurations
    looks seriously broken. Last known maintainers on Cc:

    Signed-off-by: Wolfgang Denk
    Cc: Denis Peter
    Cc: Martin Winistoerfer
    Acked-by: Kumar Gala

    Wolfgang Denk
     

19 Oct, 2010

3 commits

  • Now that warm booting is not supported, there isn't a need for the
    BOOTFLAG_COLD and BOOTFLAG_WARM defines, so remove them.

    Note that this change makes the board info bd_bootflags field useless.
    It will always be set to 0, but we leave it around so that we don't
    break the board info structure that some OSes are expecting to be passed
    from U-Boot.

    Signed-off-by: Peter Tyser

    Peter Tyser
     
  • Clean up Makefile, and drop a lot of the config.mk files on the way.

    We now also automatically pick all boards that are listed in
    boards.cfg (and with all configurations), so we can drop the redundant
    entries from MAKEALL to avoid building these twice.

    Signed-off-by: Wolfgang Denk

    Wolfgang Denk
     
  • The change is currently needed to be able to remove the board
    configuration scripting from the top level Makefile and replace it by
    a simple, table driven script.

    Moving this configuration setting into the "CONFIG_*" name space is
    also desirable because it is needed if we ever should move forward to
    a Kconfig driven configuration system.

    Signed-off-by: Wolfgang Denk

    Wolfgang Denk
     

24 Sep, 2010

1 commit

  • Newer Linux kernels can overrun the initial memory window used for
    booting with their BSS area. When this happens, they overwrite the FDT
    and silently fail to boot.

    On e300 CPUs, the Linux kernel uses an initial BAT covering the first
    256MB of RAM. See arch/powerpc/kernel/head_32.S for details. Increase
    the value of CONFIG_SYS_BOOTMAPSZ to accommodate the maximum value
    allowed by Linux. This will allow very large kernels to boot.

    Signed-off-by: Ira W. Snyder
    Signed-off-by: Kim Phillips

    Ira W. Snyder
     

23 Sep, 2010

1 commit


23 Apr, 2010

2 commits

  • before, MPC8349ITX boots u-boot in 4.3sec:

    column1 is elapsed time since first message
    column2 is elapsed time since previous message
    column3 is the message
    0.000 0.000: U-Boot 2010.03-00126-gfd4e49c (Apr 11 2010 - 17:25:29) MPC83XX
    0.000 0.000:
    0.000 0.000: Reset Status:
    0.000 0.000:
    0.032 0.032: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
    0.032 0.000: Board: Freescale MPC8349E-mITX
    0.032 0.000: UPMA: Configured for compact flash
    0.032 0.000: I2C: ready
    0.061 0.028: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
    1.516 1.456: FLASH: 16 MB
    2.641 1.125: PCI: Bus Dev VenId DevId Class Int
    2.652 0.011: 00 10 1095 3114 0180 00
    2.652 0.000: PCI: Bus Dev VenId DevId Class Int
    2.652 0.000: In: serial
    2.652 0.000: Out: serial
    2.652 0.000: Err: serial
    2.682 0.030: Board revision: 1.0 (PCF8475A)
    3.080 0.398: Net: TSEC1: No support for PHY id ffffffff; assuming generic
    3.080 0.000: TSEC0, TSEC1
    4.300 1.219: IDE: Bus 0: .** Timeout **

    after, MPC8349ITX boots u-boot in 3.0sec:

    0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX
    0.010 0.000:
    0.010 0.000: Reset Status:
    0.010 0.000:
    0.017 0.007: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz
    0.017 0.000: Board: Freescale MPC8349E-mITX
    0.038 0.020: UPMA: Configured for compact flash
    0.038 0.000: I2C: ready
    0.038 0.000: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz)
    0.260 0.222: FLASH: 16 MB
    1.390 1.130: PCI: Bus Dev VenId DevId Class Int
    1.390 0.000: 00 10 1095 3114 0180 00
    1.390 0.000: PCI: Bus Dev VenId DevId Class Int
    1.400 0.010: In: serial
    1.400 0.000: Out: serial
    1.400 0.000: Err: serial
    1.400 0.000: Board revision: 1.0 (PCF8475A)
    1.832 0.432: Net: TSEC1: No support for PHY id ffffffff; assuming generic
    1.832 0.000: TSEC0, TSEC1
    3.038 1.205: IDE: Bus 0: .** Timeout **

    also tested on these boards (albeit with a less accurate
    boottime measurement method):

    seconds: before after
    8349MDS ~2.6 ~2.2
    8360MDS ~2.8 ~2.6
    8313RDB ~2.5 ~2.3 #nand boot
    837xRDB ~3.1 ~2.3

    also tested on an 8323ERDB.

    v2: also remove the delayed icache enablement assumption in arch ppc's
    board.c, and add a CONFIG_MPC83xx define in the ITX config file for
    consistency (even though it was already being defined in 83xx'
    config.mk).

    Signed-off-by: Kim Phillips

    Kim Phillips
     
  • because it's convenient.

    Signed-off-by: Kim Phillips

    Kim Phillips
     

23 Feb, 2010

1 commit


27 Sep, 2009

1 commit

  • some LCRR bits are not documented throughout the 83xx family RMs.
    New board porters copying similar board configurations might omit
    setting e.g., DBYP since it was not documented in their SoC's RM.

    Prevent them bricking their board by retaining power on reset values
    in bit fields that the board porter doesn't explicitly configure
    via CONFIG_SYS__ assignments in the board
    config file.

    also move LCRR assignment to cpu_init_r[am] to help ensure no
    transactions are being executed via the local bus while CLKDIV is being
    modified.

    also start to use i/o accessors.

    Signed-off-by: Kim Phillips

    Kim Phillips
     

27 Aug, 2009

1 commit


22 Aug, 2009

2 commits

  • linux mpc83xx_defconfig kernels are getting bigger, accommodate for
    their growth by adjusting default load and fdt addresses.

    Signed-off-by: Kim Phillips

    Kim Phillips
     
  • This was introduced with the MPC8349EMDS board, and then copied to
    a couple other boards by nature of being the reference implementation.

    u-boot$git grep CONFIG_SYS_MID_FLASH_JUMP
    include/configs/MPC8349EMDS.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
    include/configs/sbc8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
    include/configs/vme8349.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
    u-boot$

    It currently isn't used, so delete it before it spreads further.

    Signed-off-by: Paul Gortmaker
    Signed-off-by: Kim Phillips

    Paul Gortmaker
     

27 Jul, 2009

1 commit


15 Jul, 2009

1 commit


13 Jun, 2009

1 commit