Eric Lee / smarc-uboot

22 Nov, 2013

4 commits

  • 3f719069c   mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-scheme ... Browse Code »

    This patch adds new CONFIG_NAND_OMAP_ECCSCHEME, replacing other distributed
    CONFIG_xx used for selecting NAND ecc-schemes.
    This patch aims at solving following issues.

    1) Currently ecc-scheme is tied to SoC platform, which prevents user to select
    other ecc-schemes also supported in hardware. like;
    - most of OMAP3 SoC platforms use only 1-bit Hamming ecc-scheme, inspite
    the fact that they can use higher ecc-schemes like 8-bit ecc-schemes with
    software based error detection (OMAP_ECC_BCH4_CODE_HW_DETECTION_SW).
    - most of AM33xx SoC plaforms use 8-bit BCH ecc-scheme for now, but hardware
    supports BCH16 ecc-scheme also.

    2) Different platforms use different CONFIG_xx to select ecc-schemes, which
    adds confusion for user while migrating platforms.
    - *CONFIG_NAND_OMAP_ELM* which enables ELM hardware engine, selects only
    8-bit BCH ecc-scheme with h/w based error-correction (OMAP_ECC_BCH8_CODE_HW)
    whereas ELM hardware engine supports other ecc-schemes also like; BCH4,
    and BCH16 (in future).
    - *CONFIG_NAND_OMAP_BCH8* selects 8-bit BCH ecc-scheme with s/w based error
    correction (OMAP_ECC_BCH8_CODE_HW_DETECTION_SW).
    - *CONFIG_SPL_NAND_SOFTECC* selects 1-bit Hamming ecc-scheme using s/w library

    Thus adding new *CONFIG_NAND_OMAP_ECCSCHEME* de-couples ecc-scheme dependency
    on SoC platform and NAND driver. And user can select ecc-scheme independently
    foreach board.
    However, selection some hardware based ecc-schemes (OMAP_ECC_BCHx_CODE_HW) still
    depends on presence of ELM hardware engine on SoC. (Refer doc/README.nand)

    Signed-off-by: Pekon Gupta

    pekon gupta
     
  • d016dc42c   mtd: nand: omap: enable BCH ECC scheme using ELM for generic platform ... Browse Code »
    56

    BCH8_ECC scheme implemented in omap_gpmc.c driver has following favours
    +-----------------------------------+-----------------+-----------------+
    |ECC Scheme | ECC Calculation | Error Detection |
    +-----------------------------------+-----------------+-----------------+
    |OMAP_ECC_BCH8_CODE_HW |GPMC |ELM H/W engine |
    |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |GPMC |S/W BCH library |
    +-----------------------------------+-----------------+-----------------+

    Current implementation limits the BCH8_CODE_HW only for AM33xx device family.
    (using CONFIG_AM33XX). However, other SoC families (like TI81xx) also have
    ELM hardware module, and can support ECC error detection using ELM.

    This patch
    - removes CONFIG_AM33xx
    Thus this driver can be reused by all devices having ELM h/w engine.
    - adds omap_select_ecc_scheme()
    A common function to handle ecc-scheme related configurations. This
    can be used both during device-probe and via user-space u-boot commads
    to change ecc-scheme. During device probe ecc-scheme is selected based
    on CONFIG_NAND_OMAP_ELM or CONFIG_NAND_OMAP_BCH8
    - enables CONFIG_BCH
    S/W library (lib/bch.c) required by OMAP_ECC_BCHx_CODE_HW_DETECTION_SW
    is enabled by CONFIG_BCH.
    - enables CONFIG_SYS_NAND_ONFI_DETECTION
    for auto-detection of ONFI compliant NAND devices
    - updates following README doc
    doc/README.nand
    board/ti/am335x/README
    doc/README.omap3

    Signed-off-by: Pekon Gupta
    [scottwood@freescale.com: fixed unused variable warning]
    Signed-off-by: Scott Wood

    pekon gupta
     
  • beba5f04f   mtd: nand: omap: make am33xx/elm.c as common driver for all OMAPx and AMxxxx platforms ... Browse Code »

    ELM hardware engine which is used for ECC error detection, is present on all
    latest OMAP SoC (like OMAP4xxx, OMAP5xxx, DRA7xxx, AM33xx, AM43xx). Thus ELM
    driver should be moved to common drivers/mtd/nand/ folder so that all SoC
    having on-chip ELM hardware engine can re-use it.
    This patch has following changes:
    - mv arch/arm/include/asm/arch-am33xx/elm.h arch/arm/include/asm/omap_elm.h
    - mv arch/arm/cpu/armv7/am33xx/elm.c drivers/mtd/nand/omap_elm.c
    - update Makefiles
    - update #include
    - add CONFIG_NAND_OMAP_ELM to compile driver/mtd/nand/omap_elm.c
    and include in all board configs using AM33xx SoC platform.

    Signed-off-by: Pekon Gupta

    pekon gupta
     
  • 68ec9c85a   mtd: move & update nand_ecclayout structure (plus board changes) ... Browse Code »

    nand_ecclayout is present in mtd.h at Linux.
    Move this structure to mtd.h to comply with Linux.

    Also, increase the ecc placement locations to 640 to suport device having
    writesize/oobsize of 8KB/640B. This means that the maximum oobsize has gone
    up to 640 bytes and consequently the maximum ecc placement locations have
    also gone up to 640.

    Changes from Prabhabkar's version (squashed into one patch to preserve
    bisectability):
    - Added _LARGE to MTD_MAX_*_ENTRIES

    This makes the names match current Linux source, and resolves
    a conflict between
    http://patchwork.ozlabs.org/patch/280488/
    and
    http://patchwork.ozlabs.org/patch/284513/

    The former was posted first and is closer to matching Linux, but
    unlike Linux it does not add _LARGE to the names. The second adds
    _LARGE to one of the names, and depends on it in a subsequent patch
    (http://patchwork.ozlabs.org/patch/284512/).

    - Made max oobfree/eccpos configurable, and used this on tricorder,
    alpr, ASH405, T4160QDS, and T4240QDS (these boards failed to build
    for me without doing so, due to a size increase).

    On tricorder SPL, this saves 2576 bytes (and makes the SPL build
    again) versus the new default of 640 eccpos and 32 oobfree, and
    saves 336 bytes versus the old default of 128 eccpos and 8 oobfree.

    Signed-off-by: Prabhakar Kushwaha
    CC: Vipin Kumar
    [scottwood@freescale.com: changes as described above]
    Signed-off-by: Scott Wood
    Cc: Thomas Weber
    Cc: Matthias Fuchs
    Cc: Stefan Roese
    Cc: York Sun
    Cc: Tom Rini
    Reviewed-by: Stefan Roese

    Prabhakar Kushwaha
     

24 Jul, 2013

1 commit

27 Nov, 2012

1 commit

  • 3287f6d38   nand: Add torture feature ... Browse Code »

    This patch adds a NAND Flash torture feature, which is useful as a block stress
    test to determine if a block is still good and reliable (or should be marked as
    bad), e.g. after a write error.

    This code is ported from mtd-utils' lib/libmtd.c.

    Signed-off-by: Benoît Thébaudeau
    Cc: Scott Wood
    [scottwood@freescale.com: removed unnec. ifdef and unwrapped error strings]
    Signed-off-by: Scott Wood

    Benoît Thébaudeau
     

18 Sep, 2012

1 commit

19 May, 2012

1 commit

27 Jan, 2012

1 commit

  • 578931b34   nand: Introduce CONFIG_SYS_NAND_SELF_INIT ... Browse Code »

    This allows a driver to run code between nand_scan_ident() and
    nand_scan_tail(), among other things. See the additions to
    doc/README.nand for details.

    To allow a gradual transition, Boards that don't set
    CONFIG_SYS_NAND_SELF_INIT will still be initialized the old way, but
    new drivers should not require this, and existing drivers should be
    converted when convenient.

    Signed-off-by: Scott Wood

    Scott Wood
     

04 Oct, 2011

1 commit

02 Jul, 2011

1 commit

  • c9494866d   cmd_nand: add nand write.trimffs command ... Browse Code »
    1

    Add another nand write. variant, trimffs. This command will request of
    nand_write_skip_bad() that all trailing all-0xff pages will be
    dropped from eraseblocks when they are written to flash as-per the
    reccommended behaviour of the UBI FAQ [1].

    The function that implements this timming is the drop_ffs() function
    by Artem Bityutskiy, ported from the mtd-utils tree.

    [1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo

    Signed-off-by: Ben Gardiner
    CC: Artem Bityutskiy
    CC: Detlev Zundel
    Acked-by: Scott Wood
    Signed-off-by: Scott Wood

    Ben Gardiner
     

17 Jul, 2009

1 commit

  • be33b046b   Remove legacy NAND and disk on chip code. ... Browse Code »
    43

    Legacy NAND had been scheduled for removal. Any boards that use this
    were already not building in the previous release due to an #error.

    The disk on chip code in common/cmd_doc.c relies on legacy NAND,
    and it has also been removed. There is newer disk on chip code
    in drivers/mtd/nand; someone with access to hardware and sufficient
    time and motivation can try to get that working, but for now disk
    on chip is not supported.

    Signed-off-by: Scott Wood

    Scott Wood
     

08 Jul, 2009

1 commit

  • 6e29ed8e5   davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC) ... Browse Code »

    Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option. It's not just nasty;
    it's also unused by any current boards, and doesn't even match the
    main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC
    on newer chips that support it).

    DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30,
    match non-BROKEN code paths for 1-bit HW ECC. The BROKEN code paths
    do seem to partially match what MontaVista/TI kernels (4.0/2.6.10,
    and 5.0/2.6.18) do ... but only for small pages. Large page support
    is really broken (and it's unclear just what software it was trying
    to match!), and the ECC layout was making three more bytes available
    for use by filesystem (or whatever) code.

    Since this option itself seems broken, remove it. Add a comment
    about the MV/TI compat issue, and the most straightforward way to
    address it (should someone really need to solve it).

    Signed-off-by: David Brownell
    Signed-off-by: Scott Wood

    David Brownell
     

04 Apr, 2009

1 commit

  • 99067b08f   Noisily disable the legacy NAND subsystem. ... Browse Code »

    Legacy NAND is marked for feature removal after April 2009 (i.e. this
    upcoming release). There are still several boards that reference it
    (though many do so only for disk-on-chip support which has been silently
    disabled for a while now). These boards will now fail to build
    with #error, though the code is still there if the user removes #error.

    The plan is to remove the code outright in the next release, along with
    any board code that refers to it (such as board/esd/common/auto_update.c).

    Also, remove the legacy NAND API description from README.nand.

    Signed-off-by: Scott Wood

    Scott Wood
     

24 Jan, 2009

1 commit

  • 6c869637f   NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS ... Browse Code »

    This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and
    changes the default from 8 to 1 for the legacy and the new MTD
    NAND layer. This allows to remove all NAND_MAX_CHIPS definitions
    in the board config files because none of the boards use multi
    chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440
    define

    #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE

    but that's bogus and did not work anyhow.

    Signed-off-by: Wolfgang Grandegger
    Signed-off-by: Scott Wood

    Wolfgang Grandegger
     

19 Oct, 2008

1 commit

11 Sep, 2008

1 commit

  • 9b05aa788   ARM DaVinci: Fix broken HW ECC for large page NAND. ... Browse Code »

    Based on original patch by Bernard Blackham

    U-boot's HW ECC support for large page NAND on Davinci is completely
    broken. Some kernels, such as the 2.6.10 one supported by
    MontaVista for DaVinci, rely upon this broken behaviour as they
    share the same code for ECCs. In the existing scheme, error
    detection *might* work on large page, but error correction
    definitely does not. Small page ECC correction works, but the
    format is not compatible with the mainline git kernel.

    This patch adds ECC code that matches what is currently in the
    Davinci git repository (since NAND support was added in 2.6.24).
    This makes the ECC and OOB layout written by u-boot compatible with
    Linux for both small page and large page devices and fixes ECC
    correction for large page devices.

    The old behaviour can be restored by defining the macro
    CFG_DAVINCI_BROKEN_ECC, which is undefined by default.

    Signed-off-by: Hugo Villeneuve
    Acked-by: Sergey Kubushyn
    Signed-off-by: Scott Wood

    Hugo Villeneuve
     

13 Aug, 2008

2 commits

10 Jan, 2008

1 commit

10 Jul, 2007

1 commit

23 Apr, 2007

1 commit

28 Oct, 2006

1 commit

19 Oct, 2006

1 commit

10 Oct, 2006

1 commit

06 Mar, 2006

2 commits

28 Jun, 2003

1 commit

  • 8bde7f776   * Code cleanup: ... Browse Code »
    46

    - remove trailing white space, trailing empty lines, C++ comments, etc.
    - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c)

    * Patches by Kenneth Johansson, 25 Jun 2003:
    - major rework of command structure
    (work done mostly by Michal Cendrowski and Joakim Kristiansen)

    wdenk
     

01 Jun, 2003

1 commit

  • 7a8e9bed1   * Patch by Marc Singer, 29 May 2003: ... Browse Code »

    Fixed rarp boot method for IA32 and other little-endian CPUs.

    * Patch by Marc Singer, 28 May 2003:
    Added port I/O commands.

    * Patch by Matthew McClintock, 28 May 2003
    - cpu/mpc824x/start.S: fix relocation code when booting from RAM
    - minor patches for utx8245

    * Patch by Daniel Engström, 28 May 2003:
    x86 update

    * Patch by Dave Ellis, 9 May 2003 + 27 May 2003:
    add nand flash support to SXNI855T configuration
    fix/extend nand flash support:
    - fix 'nand erase' command so does not erase bad blocks
    - fix 'nand write' command so does not write to bad blocks
    - fix nand_probe() so handles no flash detected properly
    - add doc/README.nand
    - add .jffs2 and .oob options to nand read/write
    - add 'nand bad' command to list bad blocks
    - add 'clean' option to 'nand erase' to write JFFS2 clean markers
    - make NAND read/write faster

    * Patch by Rune Torgersen, 23 May 2003:
    Update for MPC8266ADS board

    wdenk