13 Dec, 2011

1 commit


01 Dec, 2011

1 commit

  • Add basic cpuidle support for AM33XX family of SoC.
    Right now only two idle states (WFI and WFI+SR) are
    supported. The latency/residency numbers chosen will
    be fine-tuned based on power measurements on actual
    hardware.

    Signed-off-by: Vaibhav Bedia

    Vaibhav Bedia
     

30 Nov, 2011

5 commits

  • TI processors in TI81x and AM33x family work with PMICs like
    TPS65910/1 which are not part of the TWL series. These processors
    also do not have a voltage controller/processor module.

    In order to invoke the normal regulator calls from the voltage
    layer the following changes are done to struct voltagedomain
    - Add a flag use_regulator for the SoC voltagedomain
    code to indicate its intention of using a PMIC which
    is not controlled by VC/VP
    - Add a regulator_init callback which the platform code
    can utilise for any custom init sequence before making
    use of the regulator. Platform code is also expected
    to set the voltdm->scale function in the init callback

    Signed-off-by: Ravikumar Kattekola
    Signed-off-by: Vaibhav Bedia

    Vaibhav Bedia
     
  • Provide mechanism to know if DVFS is scaling on a specific domain.
    This API will allow us to detect transition and take appropriate
    measures in idle path

    Acked-by: Todd Poynor
    Acked-by: Santosh Shilimkar
    Signed-off-by: Nishanth Menon
    [vaibhav.bedia@ti.com: Pull in for AM33xx]
    Signed-off-by: Vaibhav Bedia

    Nishanth Menon
     
  • dvfs.h is required by omap cpufreq driver that
    lives in drivers folder, so move it to plat/
    directory. Also move voltage.h, vc.h & vp.h
    similarly to have clean header file inclusions

    Signed-off-by: Afzal Mohammed

    Afzal Mohammed
     
  • Move OMAP cpufreq driver from arch/arm/mach-omap2 into
    drivers/cpufreq, along with a few cleanups:

    - generalize support for better handling of different SoCs in the OMAP
    - use OPP layer instead of OMAP clock internals for frequency table init

    Signed-off-by: Santosh Shilimkar
    [khilman@ti.com: move to drivers]
    Signed-off-by: Kevin Hilman
    [vaibhav.bedia@ti.com: Pull in for AM33xx]
    Signed-off-by: Vaibhav Bedia

    Santosh Shilimkar
     
  • DMA support for MCSPI transfer enabled and removed unwanted flag
    dma_not_enabled as DMA feature is enabled in omap2_mcspi.

    Signed-off-by: Philip, Avinash

    Philip, Avinash
     

29 Nov, 2011

1 commit


28 Nov, 2011

3 commits


23 Nov, 2011

1 commit

  • This patch is added to route CPSW interrupts through ICSS module.
    CPSW CPSW_RX and CPSW_TX interrupts are not directly used from CPSW
    and instead they are routed through Timer module. This is done as an
    software workaround for enabling interrupt pacing feature. As interrupt
    Pacing works on C0_RX_PULSE interrupt connection to A8 INTC, which is
    not connected to Cortex A8 interrupt controller directly due to hw issue,
    it prevents interrupt pacing to work in AM33xx EVM. Therefore, Timer
    capture module is used to pickup these interrupts and routed to A8 INTC.

    Signed-off-by: Chandan Nath
    Signed-off-by: Afzal Mohammed

    Afzal Mohammed
     

22 Nov, 2011

1 commit


16 Nov, 2011

1 commit


28 Oct, 2011

1 commit

  • Fix,

    arch/arm/plat-omap/sram.c: In function 'omap3_sram_restore_context':
    arch/arm/plat-omap/sram.c:330:3: warning: initialization makes pointer from integer without a cast
    arch/arm/mach-omap2/pm34xx.c: In function 'omap_push_sram_idle':
    arch/arm/mach-omap2/pm34xx.c:848:22: warning: initialization makes pointer from integer without a cast
    arch/arm/mach-omap2/pm34xx.c:851:28: warning: initialization makes pointer from integer without a cast

    Signed-off-by: Afzal Mohammed

    Afzal Mohammed
     

27 Oct, 2011

25 commits