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include/spartan3.h 3.95 KB

83d290c56 Tom Rini SPDX: Convert all...	1	/* SPDX-License-Identifier: GPL-2.0+ */
875c78934 Wolfgang Denk Add Xilinx Sparta...	2 3 4	/* * (C) Copyright 2002 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
875c78934 Wolfgang Denk Add Xilinx Sparta...	5 6 7 8 9 10	*/ #ifndef _SPARTAN3_H_ #define _SPARTAN3_H_ #include <xilinx.h>
875c78934 Wolfgang Denk Add Xilinx Sparta...	11 12	/* Slave Parallel Implementation function table */ typedef struct {
2df9d5c43 Michal Simek fpga: xilinx: Fix...	13 14 15 16 17 18 19 20 21 22 23 24 25	xilinx_pre_fn pre; xilinx_pgm_fn pgm; xilinx_init_fn init; xilinx_err_fn err; xilinx_done_fn done; xilinx_clk_fn clk; xilinx_cs_fn cs; xilinx_wr_fn wr; xilinx_rdata_fn rdata; xilinx_wdata_fn wdata; xilinx_busy_fn busy; xilinx_abort_fn abort; xilinx_post_fn post;
2a6e3869f Michal Simek fpga: spartan3: A...	26	} xilinx_spartan3_slave_parallel_fns;
875c78934 Wolfgang Denk Add Xilinx Sparta...	27 28 29	/* Slave Serial Implementation function table */ typedef struct {
2df9d5c43 Michal Simek fpga: xilinx: Fix...	30 31 32 33 34 35 36 37 38	xilinx_pre_fn pre; xilinx_pgm_fn pgm; xilinx_clk_fn clk; xilinx_init_fn init; xilinx_done_fn done; xilinx_wr_fn wr; xilinx_post_fn post; xilinx_bwr_fn bwr; /* block write function */ xilinx_abort_fn abort;
2a6e3869f Michal Simek fpga: spartan3: A...	39	} xilinx_spartan3_slave_serial_fns;
875c78934 Wolfgang Denk Add Xilinx Sparta...	40
a99a06cbb Michal Simek fpga: xilinx: spa...	41	#if defined(CONFIG_FPGA_SPARTAN3)
14cfc4f37 Michal Simek fpga: xilinx: Sim...	42	extern struct xilinx_fpga_op spartan3_op;
a99a06cbb Michal Simek fpga: xilinx: spa...	43 44 45 46	# define FPGA_SPARTAN3_OPS &spartan3_op #else # define FPGA_SPARTAN3_OPS NULL #endif
14cfc4f37 Michal Simek fpga: xilinx: Sim...	47
875c78934 Wolfgang Denk Add Xilinx Sparta...	48 49 50	/* Device Image Sizes ********************************************************************/ / Spartan-III (1.2V) */
53677ef18 Wolfgang Denk Big white-space c...	51 52 53 54 55 56 57 58	#define XILINX_XC3S50_SIZE 439264/8 #define XILINX_XC3S200_SIZE 1047616/8 #define XILINX_XC3S400_SIZE 1699136/8 #define XILINX_XC3S1000_SIZE 3223488/8 #define XILINX_XC3S1500_SIZE 5214784/8 #define XILINX_XC3S2000_SIZE 7673024/8 #define XILINX_XC3S4000_SIZE 11316864/8 #define XILINX_XC3S5000_SIZE 13271936/8
875c78934 Wolfgang Denk Add Xilinx Sparta...	59
923efd286 Bruce Adler add image size an...	60 61 62 63 64 65	/* Spartan-3E (v3.4) */ #define XILINX_XC3S100E_SIZE 581344/8 #define XILINX_XC3S250E_SIZE 1353728/8 #define XILINX_XC3S500E_SIZE 2270208/8 #define XILINX_XC3S1200E_SIZE 3841184/8 #define XILINX_XC3S1600E_SIZE 5969696/8
28cdc1c8e Stefano Babic fpga: add definit...	66 67 68 69 70	/* * Spartan-6 : the Spartan-6 family can be programmed * exactly as the Spartan-3 */ #define XILINK_XC6SLX4_SIZE (3713568/8)
875c78934 Wolfgang Denk Add Xilinx Sparta...	71 72	/* Descriptor Macros *********************************************************************/
3bff4ffa3 Matthias Fuchs Add new Xilinx Sp...	73	/* Spartan-III devices */
875c78934 Wolfgang Denk Add Xilinx Sparta...	74	#define XILINX_XC3S50_DESC(iface, fn_table, cookie) \
a99a06cbb Michal Simek fpga: xilinx: spa...	75 76	{ xilinx_spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie, \ FPGA_SPARTAN3_OPS }
875c78934 Wolfgang Denk Add Xilinx Sparta...	77 78	#define XILINX_XC3S200_DESC(iface, fn_table, cookie) \
a99a06cbb Michal Simek fpga: xilinx: spa...	79 80	{ xilinx_spartan3, iface, XILINX_XC3S200_SIZE, fn_table, cookie, \ FPGA_SPARTAN3_OPS }
875c78934 Wolfgang Denk Add Xilinx Sparta...	81 82	#define XILINX_XC3S400_DESC(iface, fn_table, cookie) \
a99a06cbb Michal Simek fpga: xilinx: spa...	83 84	{ xilinx_spartan3, iface, XILINX_XC3S400_SIZE, fn_table, cookie, \ FPGA_SPARTAN3_OPS }
875c78934 Wolfgang Denk Add Xilinx Sparta...	85 86	#define XILINX_XC3S1000_DESC(iface, fn_table, cookie) \
a99a06cbb Michal Simek fpga: xilinx: spa...	87 88	{ xilinx_spartan3, iface, XILINX_XC3S1000_SIZE, fn_table, cookie, \ FPGA_SPARTAN3_OPS }
875c78934 Wolfgang Denk Add Xilinx Sparta...	89 90	#define XILINX_XC3S1500_DESC(iface, fn_table, cookie) \
a99a06cbb Michal Simek fpga: xilinx: spa...	91 92	{ xilinx_spartan3, iface, XILINX_XC3S1500_SIZE, fn_table, cookie, \ FPGA_SPARTAN3_OPS }
875c78934 Wolfgang Denk Add Xilinx Sparta...	93 94	#define XILINX_XC3S2000_DESC(iface, fn_table, cookie) \
a99a06cbb Michal Simek fpga: xilinx: spa...	95 96	{ xilinx_spartan3, iface, XILINX_XC3S2000_SIZE, fn_table, cookie, \ FPGA_SPARTAN3_OPS }
875c78934 Wolfgang Denk Add Xilinx Sparta...	97 98	#define XILINX_XC3S4000_DESC(iface, fn_table, cookie) \
a99a06cbb Michal Simek fpga: xilinx: spa...	99 100	{ xilinx_spartan3, iface, XILINX_XC3S4000_SIZE, fn_table, cookie, \ FPGA_SPARTAN3_OPS }
875c78934 Wolfgang Denk Add Xilinx Sparta...	101 102	#define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
a99a06cbb Michal Simek fpga: xilinx: spa...	103 104	{ xilinx_spartan3, iface, XILINX_XC3S5000_SIZE, fn_table, cookie, \ FPGA_SPARTAN3_OPS }
875c78934 Wolfgang Denk Add Xilinx Sparta...	105
923efd286 Bruce Adler add image size an...	106 107	/* Spartan-3E devices */ #define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
a99a06cbb Michal Simek fpga: xilinx: spa...	108 109	{ xilinx_spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie, \ FPGA_SPARTAN3_OPS }
923efd286 Bruce Adler add image size an...	110 111	#define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
a99a06cbb Michal Simek fpga: xilinx: spa...	112 113	{ xilinx_spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie, \ FPGA_SPARTAN3_OPS }
923efd286 Bruce Adler add image size an...	114 115	#define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
a99a06cbb Michal Simek fpga: xilinx: spa...	116 117	{ xilinx_spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie, \ FPGA_SPARTAN3_OPS }
923efd286 Bruce Adler add image size an...	118 119	#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
14cfc4f37 Michal Simek fpga: xilinx: Sim...	120	{ xilinx_spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie, \
a99a06cbb Michal Simek fpga: xilinx: spa...	121	FPGA_SPARTAN3_OPS }
923efd286 Bruce Adler add image size an...	122 123	#define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
14cfc4f37 Michal Simek fpga: xilinx: Sim...	124	{ xilinx_spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie, \
a99a06cbb Michal Simek fpga: xilinx: spa...	125	FPGA_SPARTAN3_OPS }
923efd286 Bruce Adler add image size an...	126
28cdc1c8e Stefano Babic fpga: add definit...	127	#define XILINX_XC6SLX4_DESC(iface, fn_table, cookie) \
a99a06cbb Michal Simek fpga: xilinx: spa...	128 129	{ xilinx_spartan3, iface, XILINK_XC6SLX4_SIZE, fn_table, cookie, \ FPGA_SPARTAN3_OPS }
28cdc1c8e Stefano Babic fpga: add definit...	130
875c78934 Wolfgang Denk Add Xilinx Sparta...	131	#endif /* _SPARTAN3_H_ */