Commit 6560491fe5acd2f150853efdd5d9bd714a93374c
Committed by
Andreas Bießmann
1 parent
0c01c3e876
Exists in
v2017.01-smarct4x
and in
33 other branches
arm: at91: at91sam9m10g45ek/corvus remove useless chip select 1 init
On these boards the DDR is connected to a dedicated controller and not to chip select 1 of the EBI. Signed-off-by: Erik van Luijk <evanluijk@interact.nl> Tested-by: Erik van Luijk <evanluijk@interact.nl>
Showing 2 changed files with 0 additions and 16 deletions Side-by-side Diff
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c
| ... | ... | @@ -131,20 +131,12 @@ |
| 131 | 131 | void mem_init(void) |
| 132 | 132 | { |
| 133 | 133 | struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; |
| 134 | - struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX; | |
| 135 | 134 | struct atmel_mpddr ddr2; |
| 136 | - unsigned long csa; | |
| 137 | 135 | |
| 138 | 136 | ddr2_conf(&ddr2); |
| 139 | 137 | |
| 140 | 138 | /* enable DDR2 clock */ |
| 141 | 139 | writel(0x4, &pmc->scer); |
| 142 | - | |
| 143 | - /* Chip select 1 is for DDR2/SDRAM */ | |
| 144 | - csa = readl(&mat->ebicsa); | |
| 145 | - csa |= AT91_MATRIX_EBI_CS1A_SDRAMC; | |
| 146 | - csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V; | |
| 147 | - writel(csa, &mat->ebicsa); | |
| 148 | 140 | |
| 149 | 141 | /* DDRAM2 Controller initialize */ |
| 150 | 142 | ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); |
board/siemens/corvus/board.c
| ... | ... | @@ -144,20 +144,12 @@ |
| 144 | 144 | void mem_init(void) |
| 145 | 145 | { |
| 146 | 146 | struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; |
| 147 | - struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX; | |
| 148 | 147 | struct atmel_mpddr ddr2; |
| 149 | - unsigned long csa; | |
| 150 | 148 | |
| 151 | 149 | ddr2_conf(&ddr2); |
| 152 | 150 | |
| 153 | 151 | /* enable DDR2 clock */ |
| 154 | 152 | writel(0x4, &pmc->scer); |
| 155 | - | |
| 156 | - /* Chip select 1 is for DDR2/SDRAM */ | |
| 157 | - csa = readl(&mat->ebicsa); | |
| 158 | - csa |= AT91_MATRIX_EBI_CS1A_SDRAMC; | |
| 159 | - csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V; | |
| 160 | - writel(csa, &mat->ebicsa); | |
| 161 | 153 | |
| 162 | 154 | /* DDRAM2 Controller initialize */ |
| 163 | 155 | ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2); |