Commit b2740fd7a0f8d80b416d4de1f57b6542407d23bd

Authored by Ye Li
Committed by Peng Fan
1 parent bb71569f51

MLK-12616-5 GPT: Update GPT driver for MX6ULL

The MX6ULL has GPT with supporting OSC clock source, update the driver
accordingly.

Signed-off-by: Ye Li <ye.li@nxp.com>

Showing 1 changed file with 5 additions and 4 deletions Side-by-side Diff

arch/arm/imx-common/timer.c
... ... @@ -2,7 +2,7 @@
2 2 * (C) Copyright 2007
3 3 * Sascha Hauer, Pengutronix
4 4 *
5   - * (C) Copyright 2009-2015 Freescale Semiconductor, Inc.
  5 + * (C) Copyright 2009-2016 Freescale Semiconductor, Inc.
6 6 *
7 7 * SPDX-License-Identifier: GPL-2.0+
8 8 */
... ... @@ -46,7 +46,7 @@
46 46 if (((is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) &&
47 47 (is_soc_rev(CHIP_REV_1_0) > 0)) || is_cpu_type(MXC_CPU_MX6DL) ||
48 48 is_cpu_type(MXC_CPU_MX6SOLO) || is_cpu_type(MXC_CPU_MX6SX) ||
49   - is_cpu_type(MXC_CPU_MX6UL))
  49 + is_cpu_type(MXC_CPU_MX6UL) || is_cpu_type(MXC_CPU_MX6ULL))
50 50 return 1;
51 51  
52 52 return 0;
53 53  
... ... @@ -110,12 +110,13 @@
110 110 if (gpt_has_clk_source_osc()) {
111 111 i |= GPTCR_CLKSOURCE_OSC | GPTCR_TEN;
112 112  
113   - /* For DL/S, SX, UL, set 24Mhz OSC Enable bit and prescaler */
  113 + /* For DL/S, SX, UL, ULL set 24Mhz OSC Enable bit and prescaler */
114 114 if (is_cpu_type(MXC_CPU_MX6DL) ||
115 115 is_cpu_type(MXC_CPU_MX6SOLO) ||
116 116 is_cpu_type(MXC_CPU_MX6SX) ||
117 117 is_cpu_type(MXC_CPU_MX7D) ||
118   - is_cpu_type(MXC_CPU_MX6UL)) {
  118 + is_cpu_type(MXC_CPU_MX6UL) ||
  119 + is_cpu_type(MXC_CPU_MX6ULL)) {
119 120 i |= GPTCR_24MEN;
120 121  
121 122 /* Produce 3Mhz clock */