Eric Lee / smarc-uboot

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Commit d8fffa057c9430fd0c5104ab6ff7db4cdb03db51

Authored by Wolfgang Denk
2 parents 0dd78fb943 3c945542da
Exists in master and in 56 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, emb_lf_v2024.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

Merge branch 'master' of git://git.denx.de/u-boot-mips 

* 'master' of git://git.denx.de/u-boot-mips:
  MIPS: Jz4740: Add qi_lb60 board support
  MIPS: Jz4740: Add NAND driver
  MIPS: Ingenic XBurst Jz4740 processor support

Showing 20 changed files Inline Diff

1 ######################################################################### 1 #########################################################################
2 # # 2 # #
3 # Regular Maintainers for U-Boot board support: # 3 # Regular Maintainers for U-Boot board support: #
4 # # 4 # #
5 # For any board without permanent maintainer, please contact # 5 # For any board without permanent maintainer, please contact #
6 # Wolfgang Denk <wd@denx.de> # 6 # Wolfgang Denk <wd@denx.de> #
7 # and Cc: the <u-boot@lists.denx.de> mailing list. # 7 # and Cc: the <u-boot@lists.denx.de> mailing list. #
8 # # 8 # #
9 # Note: lists sorted by Maintainer Name # 9 # Note: lists sorted by Maintainer Name #
10 ######################################################################### 10 #########################################################################
11 11
12 12
13 ######################################################################### 13 #########################################################################
14 # PowerPC Systems: # 14 # PowerPC Systems: #
15 # # 15 # #
16 # Maintainer Name, Email Address # 16 # Maintainer Name, Email Address #
17 # Board CPU # 17 # Board CPU #
18 ######################################################################### 18 #########################################################################
19 19
20 Poonam Aggrwal <poonam.aggrwal@freescale.com> 20 Poonam Aggrwal <poonam.aggrwal@freescale.com>
21 21
22 P2020RDB P2020 22 P2020RDB P2020
23 23
24 Greg Allen <gallen@arlut.utexas.edu> 24 Greg Allen <gallen@arlut.utexas.edu>
25 25
26 UTX8245 MPC8245 26 UTX8245 MPC8245
27 27
28 Pantelis Antoniou <panto@intracom.gr> 28 Pantelis Antoniou <panto@intracom.gr>
29 29
30 NETVIA MPC8xx 30 NETVIA MPC8xx
31 31
32 Reinhard Arlt <reinhard.arlt@esd-electronics.com> 32 Reinhard Arlt <reinhard.arlt@esd-electronics.com>
33 33
34 cpci5200 MPC5200 34 cpci5200 MPC5200
35 mecp5123 MPC5121 35 mecp5123 MPC5121
36 mecp5200 MPC5200 36 mecp5200 MPC5200
37 pf5200 MPC5200 37 pf5200 MPC5200
38 38
39 caddy2 MPC8349 39 caddy2 MPC8349
40 vme8349 MPC8349 40 vme8349 MPC8349
41 41
42 CPCI750 PPC750FX/GX 42 CPCI750 PPC750FX/GX
43 43
44 Yuli Barcohen <yuli@arabellasw.com> 44 Yuli Barcohen <yuli@arabellasw.com>
45 45
46 Adder MPC87x/MPC852T 46 Adder MPC87x/MPC852T
47 ep8248 MPC8248 47 ep8248 MPC8248
48 ISPAN MPC8260 48 ISPAN MPC8260
49 MPC8260ADS MPC826x/MPC827x/MPC8280 49 MPC8260ADS MPC826x/MPC827x/MPC8280
50 Rattler MPC8248 50 Rattler MPC8248
51 ZPC1900 MPC8265 51 ZPC1900 MPC8265
52 52
53 Michael Barkowski <michael.barkowski@freescale.com> 53 Michael Barkowski <michael.barkowski@freescale.com>
54 54
55 MPC8323ERDB MPC8323 55 MPC8323ERDB MPC8323
56 56
57 Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com> 57 Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
58 58
59 sacsng MPC8260 59 sacsng MPC8260
60 60
61 Oliver Brown <obrown@adventnetworks.com> 61 Oliver Brown <obrown@adventnetworks.com>
62 62
63 gw8260 MPC8260 63 gw8260 MPC8260
64 64
65 Cyril Chemparathy <cyril@ti.com> 65 Cyril Chemparathy <cyril@ti.com>
66 66
67 tnetv107x_evm tnetv107x 67 tnetv107x_evm tnetv107x
68 68
69 Conn Clark <clark@esteem.com> 69 Conn Clark <clark@esteem.com>
70 70
71 ESTEEM192E MPC8xx 71 ESTEEM192E MPC8xx
72 72
73 Joe D'Abbraccio <ljd015@freescale.com> 73 Joe D'Abbraccio <ljd015@freescale.com>
74 74
75 MPC837xERDB MPC837x 75 MPC837xERDB MPC837x
76 76
77 Kári Davíðsson <kd@flaga.is> 77 Kári Davíðsson <kd@flaga.is>
78 78
79 FLAGADM MPC823 79 FLAGADM MPC823
80 80
81 Torsten Demke <torsten.demke@fci.com> 81 Torsten Demke <torsten.demke@fci.com>
82 82
83 eXalion MPC824x 83 eXalion MPC824x
84 84
85 Wolfgang Denk <wd@denx.de> 85 Wolfgang Denk <wd@denx.de>
86 86
87 IceCube_5200 MPC5200 87 IceCube_5200 MPC5200
88 88
89 ARIA MPC5121e 89 ARIA MPC5121e
90 90
91 AMX860 MPC860 91 AMX860 MPC860
92 ETX094 MPC850 92 ETX094 MPC850
93 FPS850L MPC850 93 FPS850L MPC850
94 FPS860L MPC860 94 FPS860L MPC860
95 ICU862 MPC862 95 ICU862 MPC862
96 IP860 MPC860 96 IP860 MPC860
97 IVML24 MPC860 97 IVML24 MPC860
98 IVML24_128 MPC860 98 IVML24_128 MPC860
99 IVML24_256 MPC860 99 IVML24_256 MPC860
100 IVMS8 MPC860 100 IVMS8 MPC860
101 IVMS8_128 MPC860 101 IVMS8_128 MPC860
102 IVMS8_256 MPC860 102 IVMS8_256 MPC860
103 LANTEC MPC850 103 LANTEC MPC850
104 LWMON MPC823 104 LWMON MPC823
105 R360MPI MPC823 105 R360MPI MPC823
106 RMU MPC850 106 RMU MPC850
107 RRvision MPC823 107 RRvision MPC823
108 SM850 MPC850 108 SM850 MPC850
109 SPD823TS MPC823 109 SPD823TS MPC823
110 TQM823L MPC823 110 TQM823L MPC823
111 TQM823L_LCD MPC823 111 TQM823L_LCD MPC823
112 TQM850L MPC850 112 TQM850L MPC850
113 TQM855L MPC855 113 TQM855L MPC855
114 TQM860L MPC860 114 TQM860L MPC860
115 TQM860L_FEC MPC860 115 TQM860L_FEC MPC860
116 c2mon MPC855 116 c2mon MPC855
117 hermes MPC860 117 hermes MPC860
118 lwmon MPC823 118 lwmon MPC823
119 119
120 CU824 MPC8240 120 CU824 MPC8240
121 Sandpoint8240 MPC8240 121 Sandpoint8240 MPC8240
122 122
123 ATC MPC8250 123 ATC MPC8250
124 PM825 MPC8250 124 PM825 MPC8250
125 125
126 TQM8255 MPC8255 126 TQM8255 MPC8255
127 127
128 CPU86 MPC8260 128 CPU86 MPC8260
129 PM826 MPC8260 129 PM826 MPC8260
130 TQM8260 MPC8260 130 TQM8260 MPC8260
131 131
132 P3G4 MPC7410 132 P3G4 MPC7410
133 133
134 PCIPPC2 MPC750 134 PCIPPC2 MPC750
135 PCIPPC6 MPC750 135 PCIPPC6 MPC750
136 136
137 Alex Dubov <oakad@yahoo.com> 137 Alex Dubov <oakad@yahoo.com>
138 138
139 mpq101 MPC8548 139 mpq101 MPC8548
140 140
141 Phil Edworthy <phil.edworthy@renesas.com> 141 Phil Edworthy <phil.edworthy@renesas.com>
142 142
143 rsk7264 SH7264 143 rsk7264 SH7264
144 144
145 Dirk Eibach <eibach@gdsys.de> 145 Dirk Eibach <eibach@gdsys.de>
146 146
147 devconcenter PPC460EX 147 devconcenter PPC460EX
148 dlvision PPC405EP 148 dlvision PPC405EP
149 dlvision-10g PPC405EP 149 dlvision-10g PPC405EP
150 gdppc440etx PPC440EP/GR 150 gdppc440etx PPC440EP/GR
151 intip PPC460EX 151 intip PPC460EX
152 io PPC405EP 152 io PPC405EP
153 iocon PPC405EP 153 iocon PPC405EP
154 neo PPC405EP 154 neo PPC405EP
155 155
156 Dave Ellis <DGE@sixnetio.com> 156 Dave Ellis <DGE@sixnetio.com>
157 157
158 SXNI855T MPC8xx 158 SXNI855T MPC8xx
159 159
160 Thomas Frieden <ThomasF@hyperion-entertainment.com> 160 Thomas Frieden <ThomasF@hyperion-entertainment.com>
161 161
162 AmigaOneG3SE MPC7xx 162 AmigaOneG3SE MPC7xx
163 163
164 Matthias Fuchs <matthias.fuchs@esd-electronics.com> 164 Matthias Fuchs <matthias.fuchs@esd-electronics.com>
165 165
166 ADCIOP IOP480 (PPC401) 166 ADCIOP IOP480 (PPC401)
167 APC405 PPC405GP 167 APC405 PPC405GP
168 AR405 PPC405GP 168 AR405 PPC405GP
169 ASH405 PPC405EP 169 ASH405 PPC405EP
170 CANBT PPC405CR 170 CANBT PPC405CR
171 CPCI2DP PPC405GP 171 CPCI2DP PPC405GP
172 CPCI405 PPC405GP 172 CPCI405 PPC405GP
173 CPCI4052 PPC405GP 173 CPCI4052 PPC405GP
174 CPCI405AB PPC405GP 174 CPCI405AB PPC405GP
175 CPCI405DT PPC405GP 175 CPCI405DT PPC405GP
176 CPCIISER4 PPC405GP 176 CPCIISER4 PPC405GP
177 DASA_SIM IOP480 (PPC401) 177 DASA_SIM IOP480 (PPC401)
178 DP405 PPC405EP 178 DP405 PPC405EP
179 DU405 PPC405GP 179 DU405 PPC405GP
180 DU440 PPC440EPx 180 DU440 PPC440EPx
181 G2000 PPC405EP 181 G2000 PPC405EP
182 HH405 PPC405EP 182 HH405 PPC405EP
183 HUB405 PPC405EP 183 HUB405 PPC405EP
184 OCRTC PPC405GP 184 OCRTC PPC405GP
185 ORSG PPC405GP 185 ORSG PPC405GP
186 PCI405 PPC405GP 186 PCI405 PPC405GP
187 PLU405 PPC405EP 187 PLU405 PPC405EP
188 PMC405 PPC405GP 188 PMC405 PPC405GP
189 PMC405DE PPC405EP 189 PMC405DE PPC405EP
190 PMC440 PPC440EPx 190 PMC440 PPC440EPx
191 VOH405 PPC405EP 191 VOH405 PPC405EP
192 VOM405 PPC405EP 192 VOM405 PPC405EP
193 WUH405 PPC405EP 193 WUH405 PPC405EP
194 CMS700 PPC405EP 194 CMS700 PPC405EP
195 195
196 Siddarth Gore <gores@marvell.com> 196 Siddarth Gore <gores@marvell.com>
197 197
198 guruplug ARM926EJS (Kirkwood SoC) 198 guruplug ARM926EJS (Kirkwood SoC)
199 199
200 Paul Gortmaker <paul.gortmaker@windriver.com> 200 Paul Gortmaker <paul.gortmaker@windriver.com>
201 201
202 sbc8349 MPC8349 202 sbc8349 MPC8349
203 sbc8540 MPC8540 203 sbc8540 MPC8540
204 sbc8548 MPC8548 204 sbc8548 MPC8548
205 sbc8560 MPC8560 205 sbc8560 MPC8560
206 sbc8641d MPC8641D 206 sbc8641d MPC8641D
207 207
208 Frank Gottschling <fgottschling@eltec.de> 208 Frank Gottschling <fgottschling@eltec.de>
209 209
210 MHPC MPC8xx 210 MHPC MPC8xx
211 211
212 BAB7xx MPC740/MPC750 212 BAB7xx MPC740/MPC750
213 213
214 Wolfgang Grandegger <wg@denx.de> 214 Wolfgang Grandegger <wg@denx.de>
215 215
216 ipek01 MPC5200 216 ipek01 MPC5200
217 217
218 PN62 MPC8240 218 PN62 MPC8240
219 IPHASE4539 MPC8260 219 IPHASE4539 MPC8260
220 SCM MPC8260 220 SCM MPC8260
221 221
222 Klaus Heydeck <heydeck@kieback-peter.de> 222 Klaus Heydeck <heydeck@kieback-peter.de>
223 223
224 KUP4K MPC855 224 KUP4K MPC855
225 KUP4X MPC859 225 KUP4X MPC859
226 226
227 Ilko Iliev <iliev@ronetix.at> 227 Ilko Iliev <iliev@ronetix.at>
228 228
229 PM9261 AT91SAM9261 229 PM9261 AT91SAM9261
230 PM9263 AT91SAM9263 230 PM9263 AT91SAM9263
231 PM9G45 ARM926EJS (AT91SAM9G45 SoC) 231 PM9G45 ARM926EJS (AT91SAM9G45 SoC)
232 232
233 Gary Jennejohn <garyj@denx.de> 233 Gary Jennejohn <garyj@denx.de>
234 234
235 quad100hd PPC405EP 235 quad100hd PPC405EP
236 236
237 Murray Jensen <Murray.Jensen@csiro.au> 237 Murray Jensen <Murray.Jensen@csiro.au>
238 238
239 cogent_mpc8xx MPC8xx 239 cogent_mpc8xx MPC8xx
240 240
241 cogent_mpc8260 MPC8260 241 cogent_mpc8260 MPC8260
242 hymod MPC8260 242 hymod MPC8260
243 243
244 Larry Johnson <lrj@acm.org> 244 Larry Johnson <lrj@acm.org>
245 245
246 korat PPC440EPx 246 korat PPC440EPx
247 247
248 Feng Kan <fkan@amcc.com> 248 Feng Kan <fkan@amcc.com>
249 249
250 redwood PPC4xx 250 redwood PPC4xx
251 251
252 Brad Kemp <Brad.Kemp@seranoa.com> 252 Brad Kemp <Brad.Kemp@seranoa.com>
253 253
254 ppmc8260 MPC8260 254 ppmc8260 MPC8260
255 255
256 Sangmoon Kim <dogoil@etinsys.com> 256 Sangmoon Kim <dogoil@etinsys.com>
257 257
258 debris MPC8245 258 debris MPC8245
259 KVME080 MPC8245 259 KVME080 MPC8245
260 260
261 The LEOX team <team@leox.org> 261 The LEOX team <team@leox.org>
262 262
263 ELPT860 MPC860T 263 ELPT860 MPC860T
264 264
265 Guennadi Liakhovetski <g.liakhovetski@gmx.de> 265 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
266 266
267 linkstation MPC8241 267 linkstation MPC8241
268 268
269 Dave Liu <daveliu@freescale.com> 269 Dave Liu <daveliu@freescale.com>
270 270
271 MPC8315ERDB MPC8315 271 MPC8315ERDB MPC8315
272 MPC832XEMDS MPC832x 272 MPC832XEMDS MPC832x
273 MPC8360EMDS MPC8360 273 MPC8360EMDS MPC8360
274 MPC837XEMDS MPC837x 274 MPC837XEMDS MPC837x
275 275
276 Nye Liu <nyet@zumanetworks.com> 276 Nye Liu <nyet@zumanetworks.com>
277 277
278 ZUMA MPC7xx_74xx 278 ZUMA MPC7xx_74xx
279 279
280 Kumar Gala <kumar.gala@freescale.com> 280 Kumar Gala <kumar.gala@freescale.com>
281 281
282 MPC8540ADS MPC8540 282 MPC8540ADS MPC8540
283 MPC8560ADS MPC8560 283 MPC8560ADS MPC8560
284 MPC8541CDS MPC8541 284 MPC8541CDS MPC8541
285 MPC8555CDS MPC8555 285 MPC8555CDS MPC8555
286 286
287 MPC8641HPCN MPC8641D 287 MPC8641HPCN MPC8641D
288 288
289 Ron Madrid <info@sheldoninst.com> 289 Ron Madrid <info@sheldoninst.com>
290 290
291 SIMPC8313 MPC8313 291 SIMPC8313 MPC8313
292 292
293 Dan Malek <dan@embeddedalley.com> 293 Dan Malek <dan@embeddedalley.com>
294 294
295 stxgp3 MPC85xx 295 stxgp3 MPC85xx
296 stxssa MPC85xx 296 stxssa MPC85xx
297 stxxtc MPC8xx 297 stxxtc MPC8xx
298 298
299 Ryan Mallon <ryan@bluewatersys.com> 299 Ryan Mallon <ryan@bluewatersys.com>
300 300
301 snapper9260 ARM926EJS (AT91SAM9260 SoC) 301 snapper9260 ARM926EJS (AT91SAM9260 SoC)
302 snapper9g20 ARM926EJS (AT91SAM9G20 SoC) 302 snapper9g20 ARM926EJS (AT91SAM9G20 SoC)
303 303
304 Eran Man <eran@nbase.co.il> 304 Eran Man <eran@nbase.co.il>
305 305
306 EVB64260_750CX MPC750CX 306 EVB64260_750CX MPC750CX
307 307
308 Andrea "llandre" Marson <andrea.marson@dave-tech.it> 308 Andrea "llandre" Marson <andrea.marson@dave-tech.it>
309 309
310 PPChameleonEVB PPC405EP 310 PPChameleonEVB PPC405EP
311 311
312 Tirumala Marri <tmarri@apm.com> 312 Tirumala Marri <tmarri@apm.com>
313 313
314 bluestone APM821XX 314 bluestone APM821XX
315 315
316 Reinhard Meyer <reinhard.meyer@emk-elektronik.de> 316 Reinhard Meyer <reinhard.meyer@emk-elektronik.de>
317 317
318 TOP860 MPC860T 318 TOP860 MPC860T
319 TOP5200 MPC5200 319 TOP5200 MPC5200
320 TOP9000 ARM926EJS (AT91SAM9xxx SoC) 320 TOP9000 ARM926EJS (AT91SAM9xxx SoC)
321 321
322 Tolunay Orkun <torkun@nextio.com> 322 Tolunay Orkun <torkun@nextio.com>
323 323
324 csb272 PPC405GP 324 csb272 PPC405GP
325 csb472 PPC405GP 325 csb472 PPC405GP
326 326
327 John Otken <jotken@softadvances.com> 327 John Otken <jotken@softadvances.com>
328 328
329 luan PPC440SP 329 luan PPC440SP
330 taihu PPC405EP 330 taihu PPC405EP
331 331
332 Keith Outwater <Keith_Outwater@mvis.com> 332 Keith Outwater <Keith_Outwater@mvis.com>
333 333
334 GEN860T MPC860T 334 GEN860T MPC860T
335 GEN860T_SC MPC860T 335 GEN860T_SC MPC860T
336 336
337 Frank Panno <fpanno@delphintech.com> 337 Frank Panno <fpanno@delphintech.com>
338 338
339 ep8260 MPC8260 339 ep8260 MPC8260
340 340
341 Denis Peter <d.peter@mpl.ch> 341 Denis Peter <d.peter@mpl.ch>
342 342
343 MIP405 PPC4xx 343 MIP405 PPC4xx
344 PIP405 PPC4xx 344 PIP405 PPC4xx
345 345
346 Werner Pfister <Pfister_Werner@intercontrol.de> 346 Werner Pfister <Pfister_Werner@intercontrol.de>
347 digsy_mtc mpc5200 347 digsy_mtc mpc5200
348 digsy_mtc_rev5 mpc5200 348 digsy_mtc_rev5 mpc5200
349 349
350 Kim Phillips <kim.phillips@freescale.com> 350 Kim Phillips <kim.phillips@freescale.com>
351 351
352 MPC8349EMDS MPC8349 352 MPC8349EMDS MPC8349
353 353
354 Sergei Poselenov <sposelenov@emcraft.com> 354 Sergei Poselenov <sposelenov@emcraft.com>
355 355
356 a4m072 MPC5200 356 a4m072 MPC5200
357 357
358 Sudhakar Rajashekhara <sudhakar.raj@ti.com> 358 Sudhakar Rajashekhara <sudhakar.raj@ti.com>
359 359
360 da850evm ARM926EJS (DA850/OMAP-L138) 360 da850evm ARM926EJS (DA850/OMAP-L138)
361 361
362 Ricardo Ribalda <ricardo.ribalda@uam.es> 362 Ricardo Ribalda <ricardo.ribalda@uam.es>
363 363
364 ml507 PPC440x5 364 ml507 PPC440x5
365 v5fx30teval PPC440x5 365 v5fx30teval PPC440x5
366 xilinx-ppc405-generic PPC405 366 xilinx-ppc405-generic PPC405
367 xilinx-ppc440-generic PPC440x5 367 xilinx-ppc440-generic PPC440x5
368 368
369 Stefan Roese <sr@denx.de> 369 Stefan Roese <sr@denx.de>
370 370
371 P3M7448 MPC7448 371 P3M7448 MPC7448
372 372
373 uc100 MPC857 373 uc100 MPC857
374 374
375 TQM85xx MPC8540/8541/8555/8560 375 TQM85xx MPC8540/8541/8555/8560
376 376
377 acadia PPC405EZ 377 acadia PPC405EZ
378 alpr PPC440GX 378 alpr PPC440GX
379 bamboo PPC440EP 379 bamboo PPC440EP
380 bunbinga PPC405EP 380 bunbinga PPC405EP
381 canyonlands PPC460EX 381 canyonlands PPC460EX
382 ebony PPC440GP 382 ebony PPC440GP
383 glacier PPC460GT 383 glacier PPC460GT
384 haleakala PPC405EXr 384 haleakala PPC405EXr
385 icon PPC440SPe 385 icon PPC440SPe
386 katmai PPC440SPe 386 katmai PPC440SPe
387 kilauea PPC405EX 387 kilauea PPC405EX
388 lwmon5 PPC440EPx 388 lwmon5 PPC440EPx
389 makalu PPC405EX 389 makalu PPC405EX
390 ocotea PPC440GX 390 ocotea PPC440GX
391 p3p440 PPC440GP 391 p3p440 PPC440GP
392 pcs440ep PPC440EP 392 pcs440ep PPC440EP
393 rainier PPC440GRx 393 rainier PPC440GRx
394 sequoia PPC440EPx 394 sequoia PPC440EPx
395 sycamore PPC405GPr 395 sycamore PPC405GPr
396 t3corp PPC460GT 396 t3corp PPC460GT
397 taishan PPC440GX 397 taishan PPC440GX
398 walnut PPC405GP 398 walnut PPC405GP
399 yellowstone PPC440GR 399 yellowstone PPC440GR
400 yosemite PPC440EP 400 yosemite PPC440EP
401 zeus PPC405EP 401 zeus PPC405EP
402 402
403 P3M750 PPC750FX/GX/GL 403 P3M750 PPC750FX/GX/GL
404 404
405 Yusdi Santoso <yusdi_santoso@adaptec.com> 405 Yusdi Santoso <yusdi_santoso@adaptec.com>
406 406
407 HIDDEN_DRAGON MPC8241/MPC8245 407 HIDDEN_DRAGON MPC8241/MPC8245
408 408
409 Travis Sawyer (travis.sawyer@sandburst.com> 409 Travis Sawyer (travis.sawyer@sandburst.com>
410 410
411 KAREF PPC440GX 411 KAREF PPC440GX
412 METROBOX PPC440GX 412 METROBOX PPC440GX
413 413
414 Georg Schardt <schardt@team-ctech.de> 414 Georg Schardt <schardt@team-ctech.de>
415 415
416 fx12mm PPC405 416 fx12mm PPC405
417 417
418 Heiko Schocher <hs@denx.de> 418 Heiko Schocher <hs@denx.de>
419 419
420 charon MPC5200 420 charon MPC5200
421 ids8247 MPC8247 421 ids8247 MPC8247
422 jupiter MPC5200 422 jupiter MPC5200
423 kmeter1 MPC8360 423 kmeter1 MPC8360
424 kmsupx5 MPC8321 424 kmsupx5 MPC8321
425 mgcoge MPC8247 425 mgcoge MPC8247
426 mgcoge3ne MPC8247 426 mgcoge3ne MPC8247
427 mucmc52 MPC5200 427 mucmc52 MPC5200
428 muas3001 MPC8270 428 muas3001 MPC8270
429 municse MPC5200 429 municse MPC5200
430 sc3 PPC405GP 430 sc3 PPC405GP
431 suvd3 MPC8321 431 suvd3 MPC8321
432 tuda1 MPC8321 432 tuda1 MPC8321
433 tuxa1 MPC8321 433 tuxa1 MPC8321
434 uc101 MPC5200 434 uc101 MPC5200
435 ve8313 MPC8313 435 ve8313 MPC8313
436 436
437 Peter De Schrijver <p2@mind.be> 437 Peter De Schrijver <p2@mind.be>
438 438
439 ML2 PPC4xx 439 ML2 PPC4xx
440 440
441 Andre Schwarz <andre.schwarz@matrix-vision.de> 441 Andre Schwarz <andre.schwarz@matrix-vision.de>
442 442
443 mergerbox MPC8377 443 mergerbox MPC8377
444 mvbc_p MPC5200 444 mvbc_p MPC5200
445 mvblm7 MPC8343 445 mvblm7 MPC8343
446 mvsmr MPC5200 446 mvsmr MPC5200
447 447
448 Jon Smirl <jonsmirl@gmail.com> 448 Jon Smirl <jonsmirl@gmail.com>
449 449
450 pcm030 MPC5200 450 pcm030 MPC5200
451 451
452 Timur Tabi <timur@freescale.com> 452 Timur Tabi <timur@freescale.com>
453 453
454 MPC8349E-mITX MPC8349 454 MPC8349E-mITX MPC8349
455 MPC8349E-mITX-GP MPC8349 455 MPC8349E-mITX-GP MPC8349
456 P1022DS P1022 456 P1022DS P1022
457 457
458 Erik Theisen <etheisen@mindspring.com> 458 Erik Theisen <etheisen@mindspring.com>
459 459
460 W7OLMC PPC4xx 460 W7OLMC PPC4xx
461 W7OLMG PPC4xx 461 W7OLMG PPC4xx
462 462
463 Jim Thompson <jim@musenki.com> 463 Jim Thompson <jim@musenki.com>
464 464
465 MUSENKI MPC8245/8241 465 MUSENKI MPC8245/8241
466 Sandpoint8245 MPC8245 466 Sandpoint8245 MPC8245
467 467
468 Rune Torgersen <runet@innovsys.com> 468 Rune Torgersen <runet@innovsys.com>
469 469
470 MPC8266ADS MPC8266 470 MPC8266ADS MPC8266
471 471
472 Peter Tyser <ptyser@xes-inc.com> 472 Peter Tyser <ptyser@xes-inc.com>
473 473
474 xpedite1000 PPC440GX 474 xpedite1000 PPC440GX
475 xpedite5170 MPC8640 475 xpedite5170 MPC8640
476 xpedite5200 MPC8548 476 xpedite5200 MPC8548
477 xpedite5370 MPC8572 477 xpedite5370 MPC8572
478 xpedite5500 P2020 478 xpedite5500 P2020
479 479
480 David Updegraff <dave@cray.com> 480 David Updegraff <dave@cray.com>
481 481
482 CRAYL1 PPC4xx 482 CRAYL1 PPC4xx
483 483
484 Anton Vorontsov <avorontsov@ru.mvista.com> 484 Anton Vorontsov <avorontsov@ru.mvista.com>
485 485
486 MPC8360ERDK MPC8360 486 MPC8360ERDK MPC8360
487 487
488 Josef Wagner <Wagner@Microsys.de> 488 Josef Wagner <Wagner@Microsys.de>
489 489
490 CPC45 MPC8245 490 CPC45 MPC8245
491 PM520 MPC5200 491 PM520 MPC5200
492 492
493 Michael Weiss <michael.weiss@ifm.com> 493 Michael Weiss <michael.weiss@ifm.com>
494 494
495 PDM360NG MPC5121e 495 PDM360NG MPC5121e
496 496
497 Stephen Williams <steve@icarus.com> 497 Stephen Williams <steve@icarus.com>
498 498
499 JSE PPC405GPr 499 JSE PPC405GPr
500 500
501 Ilya Yanok <yanok@emcraft.com> 501 Ilya Yanok <yanok@emcraft.com>
502 502
503 mpc8308_p1m MPC8308 503 mpc8308_p1m MPC8308
504 MPC8308RDB MPC8308 504 MPC8308RDB MPC8308
505 505
506 Roy Zang <tie-fei.zang@freescale.com> 506 Roy Zang <tie-fei.zang@freescale.com>
507 507
508 mpc7448hpc2 MPC7448 508 mpc7448hpc2 MPC7448
509 P1023RDS P1023 509 P1023RDS P1023
510 510
511 John Zhan <zhanz@sinovee.com> 511 John Zhan <zhanz@sinovee.com>
512 512
513 svm_sc8xx MPC8xx 513 svm_sc8xx MPC8xx
514 514
515 Detlev Zundel <dzu@denx.de> 515 Detlev Zundel <dzu@denx.de>
516 516
517 inka4x0 MPC5200 517 inka4x0 MPC5200
518 518
519 ------------------------------------------------------------------------- 519 -------------------------------------------------------------------------
520 520
521 Unknown / orphaned boards: 521 Unknown / orphaned boards:
522 522
523 ADS860 MPC8xx 523 ADS860 MPC8xx
524 FADS823 MPC8xx 524 FADS823 MPC8xx
525 FADS850SAR MPC8xx 525 FADS850SAR MPC8xx
526 FADS860T MPC8xx 526 FADS860T MPC8xx
527 GENIETV MPC8xx 527 GENIETV MPC8xx
528 IAD210 MPC8xx 528 IAD210 MPC8xx
529 MBX MPC8xx 529 MBX MPC8xx
530 MBX860T MPC8xx 530 MBX860T MPC8xx
531 NX823 MPC8xx 531 NX823 MPC8xx
532 RPXClassic MPC8xx 532 RPXClassic MPC8xx
533 RPXlite MPC8xx 533 RPXlite MPC8xx
534 534
535 MOUSSE MPC824x 535 MOUSSE MPC824x
536 536
537 RPXsuper MPC8260 537 RPXsuper MPC8260
538 rsdproto MPC8260 538 rsdproto MPC8260
539 539
540 EVB64260 MPC7xx_74xx 540 EVB64260 MPC7xx_74xx
541 541
542 versatile ARM926EJ-S 542 versatile ARM926EJ-S
543 543
544 544
545 ######################################################################### 545 #########################################################################
546 # ARM Systems: # 546 # ARM Systems: #
547 # # 547 # #
548 # Maintainer Name, Email Address # 548 # Maintainer Name, Email Address #
549 # Board CPU # 549 # Board CPU #
550 ######################################################################### 550 #########################################################################
551 551
552 Albert ARIBAUD <albert.u.boot@aribaud.net> 552 Albert ARIBAUD <albert.u.boot@aribaud.net>
553 553
554 edminiv2 ARM926EJS (Orion5x SoC) 554 edminiv2 ARM926EJS (Orion5x SoC)
555 555
556 Stefano Babic <sbabic@denx.de> 556 Stefano Babic <sbabic@denx.de>
557 557
558 ea20 davinci 558 ea20 davinci
559 mx35pdk i.MX35 559 mx35pdk i.MX35
560 mx51evk i.MX51 560 mx51evk i.MX51
561 polaris xscale/pxa 561 polaris xscale/pxa
562 trizepsiv xscale/pxa 562 trizepsiv xscale/pxa
563 vision2 i.MX51 563 vision2 i.MX51
564 564
565 Jason Liu <r64343@freescale.com> 565 Jason Liu <r64343@freescale.com>
566 566
567 mx53evk i.MX53 567 mx53evk i.MX53
568 mx53loco i.MX53 568 mx53loco i.MX53
569 569
570 Enric Balletbo i Serra <eballetbo@iseebcn.com> 570 Enric Balletbo i Serra <eballetbo@iseebcn.com>
571 571
572 igep0020 ARM ARMV7 (OMAP3xx SoC) 572 igep0020 ARM ARMV7 (OMAP3xx SoC)
573 igep0030 ARM ARMV7 (OMAP3xx SoC) 573 igep0030 ARM ARMV7 (OMAP3xx SoC)
574 574
575 Dirk Behme <dirk.behme@gmail.com> 575 Dirk Behme <dirk.behme@gmail.com>
576 576
577 omap3_beagle ARM ARMV7 (OMAP3530 SoC) 577 omap3_beagle ARM ARMV7 (OMAP3530 SoC)
578 578
579 Eric Benard <eric@eukrea.com> 579 Eric Benard <eric@eukrea.com>
580 580
581 cpuat91 ARM920T 581 cpuat91 ARM920T
582 cpu9260 ARM926EJS (AT91SAM9260 SoC) 582 cpu9260 ARM926EJS (AT91SAM9260 SoC)
583 cpu9G20 ARM926EJS (AT91SAM9G20 SoC) 583 cpu9G20 ARM926EJS (AT91SAM9G20 SoC)
584 584
585 Ajay Bhargav <ajay.bhargav@einfochips.com> 585 Ajay Bhargav <ajay.bhargav@einfochips.com>
586 586
587 gplugd ARM926EJS (ARMADA100 88AP168 SoC) 587 gplugd ARM926EJS (ARMADA100 88AP168 SoC)
588 588
589 Rishi Bhattacharya <rishi@ti.com> 589 Rishi Bhattacharya <rishi@ti.com>
590 590
591 omap5912osk ARM926EJS 591 omap5912osk ARM926EJS
592 592
593 Andreas Bießmann <andreas.devel@gmail.com> 593 Andreas Bießmann <andreas.devel@gmail.com>
594 594
595 at91rm9200ek at91rm9200 595 at91rm9200ek at91rm9200
596 grasshopper avr32 596 grasshopper avr32
597 597
598 Cliff Brake <cliff.brake@gmail.com> 598 Cliff Brake <cliff.brake@gmail.com>
599 599
600 pxa255_idp xscale/pxa 600 pxa255_idp xscale/pxa
601 601
602 Rick Bronson <rick@efn.org> 602 Rick Bronson <rick@efn.org>
603 603
604 AT91RM9200DK at91rm9200 604 AT91RM9200DK at91rm9200
605 605
606 Luca Ceresoli <luca.ceresoli@comelit.it> 606 Luca Ceresoli <luca.ceresoli@comelit.it>
607 607
608 dig297 ARM ARMV7 (OMAP3530 SoC) 608 dig297 ARM ARMV7 (OMAP3530 SoC)
609 609
610 Po-Yu Chuang <ratbert@faraday-tech.com> 610 Po-Yu Chuang <ratbert@faraday-tech.com>
611 611
612 a320evb FA526 (ARM920T-like) (a320 SoC) 612 a320evb FA526 (ARM920T-like) (a320 SoC)
613 613
614 Eric Cooper <ecc@cmu.edu> 614 Eric Cooper <ecc@cmu.edu>
615 615
616 dockstar ARM926EJS (Kirkwood SoC) 616 dockstar ARM926EJS (Kirkwood SoC)
617 617
618 Wolfgang Denk <wd@denx.de> 618 Wolfgang Denk <wd@denx.de>
619 imx27lite i.MX27 619 imx27lite i.MX27
620 qong i.MX31 620 qong i.MX31
621 621
622 Kristoffer Ericson <kristoffer.ericson@gmail.com> 622 Kristoffer Ericson <kristoffer.ericson@gmail.com>
623 623
624 jornada SA1110 624 jornada SA1110
625 625
626 Fabio Estevam <fabio.estevam@freescale.com> 626 Fabio Estevam <fabio.estevam@freescale.com>
627 627
628 mx25pdk i.MX25 628 mx25pdk i.MX25
629 mx31pdk i.MX31 629 mx31pdk i.MX31
630 mx53ard i.MX53 630 mx53ard i.MX53
631 mx53smd i.MX53 631 mx53smd i.MX53
632 632
633 Daniel Gorsulowski <daniel.gorsulowski@esd.eu> 633 Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
634 634
635 meesc ARM926EJS (AT91SAM9263 SoC) 635 meesc ARM926EJS (AT91SAM9263 SoC)
636 otc570 ARM926EJS (AT91SAM9263 SoC) 636 otc570 ARM926EJS (AT91SAM9263 SoC)
637 637
638 Sedji Gaouaou<sedji.gaouaou@atmel.com> 638 Sedji Gaouaou<sedji.gaouaou@atmel.com>
639 at91sam9g10ek ARM926EJS (AT91SAM9G10 SoC) 639 at91sam9g10ek ARM926EJS (AT91SAM9G10 SoC)
640 at91sam9m10g45ek ARM926EJS (AT91SAM9G45 SoC) 640 at91sam9m10g45ek ARM926EJS (AT91SAM9G45 SoC)
641 641
642 Simon Guinot <simon.guinot@sequanux.org> 642 Simon Guinot <simon.guinot@sequanux.org>
643 643
644 inetspace_v2 ARM926EJS (Kirkwood SoC) 644 inetspace_v2 ARM926EJS (Kirkwood SoC)
645 netspace_v2 ARM926EJS (Kirkwood SoC) 645 netspace_v2 ARM926EJS (Kirkwood SoC)
646 netspace_max_v2 ARM926EJS (Kirkwood SoC) 646 netspace_max_v2 ARM926EJS (Kirkwood SoC)
647 647
648 Igor Grinberg <grinberg@compulab.co.il> 648 Igor Grinberg <grinberg@compulab.co.il>
649 649
650 cm-t35 ARM ARMV7 (OMAP3xx Soc) 650 cm-t35 ARM ARMV7 (OMAP3xx Soc)
651 651
652 Kshitij Gupta <kshitij@ti.com> 652 Kshitij Gupta <kshitij@ti.com>
653 653
654 omap1510inn ARM925T 654 omap1510inn ARM925T
655 omap1610inn ARM926EJS 655 omap1610inn ARM926EJS
656 656
657 Vaibhav Hiremath <hvaibhav@ti.com> 657 Vaibhav Hiremath <hvaibhav@ti.com>
658 658
659 am3517_evm ARM ARMV7 (AM35x SoC) 659 am3517_evm ARM ARMV7 (AM35x SoC)
660 660
661 Grazvydas Ignotas <notasas@gmail.com> 661 Grazvydas Ignotas <notasas@gmail.com>
662 662
663 omap3_pandora ARM ARMV7 (OMAP3xx SoC) 663 omap3_pandora ARM ARMV7 (OMAP3xx SoC)
664 664
665 Matthias Kaehlcke <matthias@kaehlcke.net> 665 Matthias Kaehlcke <matthias@kaehlcke.net>
666 edb9301 ARM920T (EP9301) 666 edb9301 ARM920T (EP9301)
667 edb9302 ARM920T (EP9302) 667 edb9302 ARM920T (EP9302)
668 edb9302a ARM920T (EP9302) 668 edb9302a ARM920T (EP9302)
669 edb9307 ARM920T (EP9307) 669 edb9307 ARM920T (EP9307)
670 edb9307a ARM920T (EP9307) 670 edb9307a ARM920T (EP9307)
671 edb9312 ARM920T (EP9312) 671 edb9312 ARM920T (EP9312)
672 edb9315 ARM920T (EP9315) 672 edb9315 ARM920T (EP9315)
673 edb9315a ARM920T (EP9315) 673 edb9315a ARM920T (EP9315)
674 674
675 Nishant Kamat <nskamat@ti.com> 675 Nishant Kamat <nskamat@ti.com>
676 676
677 omap1610h2 ARM926EJS 677 omap1610h2 ARM926EJS
678 678
679 Minkyu Kang <mk7.kang@samsung.com> 679 Minkyu Kang <mk7.kang@samsung.com>
680 680
681 SMDKC100 ARM ARMV7 (S5PC100 SoC) 681 SMDKC100 ARM ARMV7 (S5PC100 SoC)
682 s5p_goni ARM ARMV7 (S5PC110 SoC) 682 s5p_goni ARM ARMV7 (S5PC110 SoC)
683 s5pc210_universal ARM ARMV7 (S5PC210 SoC) 683 s5pc210_universal ARM ARMV7 (S5PC210 SoC)
684 684
685 Chander Kashyap <k.chander@samsung.com> 685 Chander Kashyap <k.chander@samsung.com>
686 686
687 origen ARM ARMV7 (S5PC210 SoC) 687 origen ARM ARMV7 (S5PC210 SoC)
688 SMDKV310 ARM ARMV7 (S5PC210 SoC) 688 SMDKV310 ARM ARMV7 (S5PC210 SoC)
689 689
690 Torsten Koschorrek <koschorrek@synertronixx.de> 690 Torsten Koschorrek <koschorrek@synertronixx.de>
691 scb9328 ARM920T (i.MXL) 691 scb9328 ARM920T (i.MXL)
692 692
693 Frederik Kriewitz <frederik@kriewitz.eu> 693 Frederik Kriewitz <frederik@kriewitz.eu>
694 694
695 devkit8000 ARM ARMV7 (OMAP3530 SoC) 695 devkit8000 ARM ARMV7 (OMAP3530 SoC)
696 696
697 Sergey Kubushyn <ksi@koi8.net> 697 Sergey Kubushyn <ksi@koi8.net>
698 698
699 DV-EVM ARM926EJS 699 DV-EVM ARM926EJS
700 SONATA ARM926EJS 700 SONATA ARM926EJS
701 SCHMOOGIE ARM926EJS 701 SCHMOOGIE ARM926EJS
702 702
703 Prakash Kumar <prakash@embedx.com> 703 Prakash Kumar <prakash@embedx.com>
704 704
705 cerf250 xscale/pxa 705 cerf250 xscale/pxa
706 706
707 Vipin Kumar <vipin.kumar@st.com> 707 Vipin Kumar <vipin.kumar@st.com>
708 708
709 spear300 ARM926EJS (spear300 Soc) 709 spear300 ARM926EJS (spear300 Soc)
710 spear310 ARM926EJS (spear310 Soc) 710 spear310 ARM926EJS (spear310 Soc)
711 spear320 ARM926EJS (spear320 Soc) 711 spear320 ARM926EJS (spear320 Soc)
712 spear600 ARM926EJS (spear600 Soc) 712 spear600 ARM926EJS (spear600 Soc)
713 713
714 Sergey Lapin <slapin@ossfans.org> 714 Sergey Lapin <slapin@ossfans.org>
715 715
716 afeb9260 ARM926EJS (AT91SAM9260 SoC) 716 afeb9260 ARM926EJS (AT91SAM9260 SoC)
717 717
718 Valentin Longchamp <valentin.longchamp@keymile.com> 718 Valentin Longchamp <valentin.longchamp@keymile.com>
719 719
720 km_kirkwood ARM926EJS (Kirkwood SoC) 720 km_kirkwood ARM926EJS (Kirkwood SoC)
721 portl2 ARM926EJS (Kirkwood SoC) 721 portl2 ARM926EJS (Kirkwood SoC)
722 722
723 Nishanth Menon <nm@ti.com> 723 Nishanth Menon <nm@ti.com>
724 724
725 omap3_sdp3430 ARM ARMV7 (OMAP3xx SoC) 725 omap3_sdp3430 ARM ARMV7 (OMAP3xx SoC)
726 omap3_zoom1 ARM ARMV7 (OMAP3xx SoC) 726 omap3_zoom1 ARM ARMV7 (OMAP3xx SoC)
727 727
728 David Müller <d.mueller@elsoft.ch> 728 David Müller <d.mueller@elsoft.ch>
729 729
730 smdk2410 ARM920T 730 smdk2410 ARM920T
731 VCMA9 ARM920T 731 VCMA9 ARM920T
732 732
733 Eric Millbrandt <emillbrandt@dekaresearch.com> 733 Eric Millbrandt <emillbrandt@dekaresearch.com>
734 734
735 galaxy5200 mpc5200 735 galaxy5200 mpc5200
736 736
737 Nagendra T S <nagendra@mistralsolutions.com> 737 Nagendra T S <nagendra@mistralsolutions.com>
738 738
739 am3517_crane ARM ARMV7 (AM35x SoC) 739 am3517_crane ARM ARMV7 (AM35x SoC)
740 740
741 Kyungmin Park <kyungmin.park@samsung.com> 741 Kyungmin Park <kyungmin.park@samsung.com>
742 742
743 apollon ARM1136EJS 743 apollon ARM1136EJS
744 744
745 Sandeep Paulraj <s-paulraj@ti.com> 745 Sandeep Paulraj <s-paulraj@ti.com>
746 746
747 davinci_dm355evm ARM926EJS 747 davinci_dm355evm ARM926EJS
748 davinci_dm355leopard ARM926EJS 748 davinci_dm355leopard ARM926EJS
749 davinci_dm365evm ARM926EJS 749 davinci_dm365evm ARM926EJS
750 davinci_dm6467evm ARM926EJS 750 davinci_dm6467evm ARM926EJS
751 751
752 Linus Walleij <linus.walleij@linaro.org> 752 Linus Walleij <linus.walleij@linaro.org>
753 integratorap various 753 integratorap various
754 integratorcp various 754 integratorcp various
755 755
756 Dave Peverley <dpeverley@mpc-data.co.uk> 756 Dave Peverley <dpeverley@mpc-data.co.uk>
757 757
758 omap730p2 ARM926EJS 758 omap730p2 ARM926EJS
759 759
760 Manikandan Pillai <mani.pillai@ti.com> 760 Manikandan Pillai <mani.pillai@ti.com>
761 761
762 omap3_evm ARM ARMV7 (OMAP3xx SoC) 762 omap3_evm ARM ARMV7 (OMAP3xx SoC)
763 763
764 Stelian Pop <stelian.pop@leadtechdesign.com> 764 Stelian Pop <stelian.pop@leadtechdesign.com>
765 765
766 at91sam9260ek ARM926EJS (AT91SAM9260 SoC) 766 at91sam9260ek ARM926EJS (AT91SAM9260 SoC)
767 at91sam9261ek ARM926EJS (AT91SAM9261 SoC) 767 at91sam9261ek ARM926EJS (AT91SAM9261 SoC)
768 at91sam9263ek ARM926EJS (AT91SAM9263 SoC) 768 at91sam9263ek ARM926EJS (AT91SAM9263 SoC)
769 at91sam9rlek ARM926EJS (AT91SAM9RL SoC) 769 at91sam9rlek ARM926EJS (AT91SAM9RL SoC)
770 770
771 Tom Rix <Tom.Rix@windriver.com> 771 Tom Rix <Tom.Rix@windriver.com>
772 772
773 omap3_zoom2 ARM ARMV7 (OMAP3xx SoC) 773 omap3_zoom2 ARM ARMV7 (OMAP3xx SoC)
774 774
775 John Rigby <jcrigby@gmail.com> 775 John Rigby <jcrigby@gmail.com>
776 776
777 tx25 i.MX25 777 tx25 i.MX25
778 778
779 Stefan Roese <sr@denx.de> 779 Stefan Roese <sr@denx.de>
780 780
781 pdnb3 xscale/ixp 781 pdnb3 xscale/ixp
782 scpu xscale/ixp 782 scpu xscale/ixp
783 783
784 Alessandro Rubini <rubini@unipv.it> 784 Alessandro Rubini <rubini@unipv.it>
785 Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com> 785 Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
786 786
787 nhk8815 ARM926EJS (Nomadik 8815 Soc) 787 nhk8815 ARM926EJS (Nomadik 8815 Soc)
788 788
789 Steve Sakoman <sakoman@gmail.com> 789 Steve Sakoman <sakoman@gmail.com>
790 790
791 omap3_overo ARM ARMV7 (OMAP3xx SoC) 791 omap3_overo ARM ARMV7 (OMAP3xx SoC)
792 792
793 Jens Scharsig <esw@bus-elektronik.de> 793 Jens Scharsig <esw@bus-elektronik.de>
794 794
795 eb_cpux9k2 ARM920T (AT91RM9200 SoC) 795 eb_cpux9k2 ARM920T (AT91RM9200 SoC)
796 796
797 Heiko Schocher <hs@denx.de> 797 Heiko Schocher <hs@denx.de>
798 798
799 magnesium i.MX27 799 magnesium i.MX27
800 mgcoge3un ARM926EJS (Kirkwood SoC) 800 mgcoge3un ARM926EJS (Kirkwood SoC)
801 801
802 Robert Schwebel <r.schwebel@pengutronix.de> 802 Robert Schwebel <r.schwebel@pengutronix.de>
803 803
804 csb226 xscale/pxa 804 csb226 xscale/pxa
805 innokom xscale/pxa 805 innokom xscale/pxa
806 806
807 Michael Schwingen <michael@schwingen.org> 807 Michael Schwingen <michael@schwingen.org>
808 808
809 actux1 xscale/ixp 809 actux1 xscale/ixp
810 actux2 xscale/ixp 810 actux2 xscale/ixp
811 actux3 xscale/ixp 811 actux3 xscale/ixp
812 actux4 xscale/ixp 812 actux4 xscale/ixp
813 dvlhost xscale/ixp 813 dvlhost xscale/ixp
814 814
815 Nick Thompson <nick.thompson@gefanuc.com> 815 Nick Thompson <nick.thompson@gefanuc.com>
816 816
817 da830evm ARM926EJS (DA830/OMAP-L137) 817 da830evm ARM926EJS (DA830/OMAP-L137)
818 818
819 Albin Tonnerre <albin.tonnerre@free-electrons.com> 819 Albin Tonnerre <albin.tonnerre@free-electrons.com>
820 820
821 sbc35_a9g20 ARM926EJS (AT91SAM9G20 SoC) 821 sbc35_a9g20 ARM926EJS (AT91SAM9G20 SoC)
822 tny_a9260 ARM926EJS (AT91SAM9260 SoC) 822 tny_a9260 ARM926EJS (AT91SAM9260 SoC)
823 tny_a9g20 ARM926EJS (AT91SAM9G20 SoC) 823 tny_a9g20 ARM926EJS (AT91SAM9G20 SoC)
824 824
825 Greg Ungerer <greg.ungerer@opengear.com> 825 Greg Ungerer <greg.ungerer@opengear.com>
826 826
827 cm4008 ks8695p 827 cm4008 ks8695p
828 cm4116 ks8695p 828 cm4116 ks8695p
829 cm4148 ks8695p 829 cm4148 ks8695p
830 830
831 Aneesh V <aneesh@ti.com> 831 Aneesh V <aneesh@ti.com>
832 832
833 omap4_panda ARM ARMV7 (OMAP4xx SoC) 833 omap4_panda ARM ARMV7 (OMAP4xx SoC)
834 omap4_sdp4430 ARM ARMV7 (OMAP4xx SoC) 834 omap4_sdp4430 ARM ARMV7 (OMAP4xx SoC)
835 835
836 Marek Vasut <marek.vasut@gmail.com> 836 Marek Vasut <marek.vasut@gmail.com>
837 837
838 balloon3 xscale/pxa 838 balloon3 xscale/pxa
839 colibri_pxa270 xscale/pxa 839 colibri_pxa270 xscale/pxa
840 palmld xscale/pxa 840 palmld xscale/pxa
841 palmtc xscale/pxa 841 palmtc xscale/pxa
842 vpac270 xscale/pxa 842 vpac270 xscale/pxa
843 zipitz2 xscale/pxa 843 zipitz2 xscale/pxa
844 efikamx i.MX51 844 efikamx i.MX51
845 efikasb i.MX51 845 efikasb i.MX51
846 846
847 Hugo Villeneuve <hugo.villeneuve@lyrtech.com> 847 Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
848 848
849 SFFSDR ARM926EJS 849 SFFSDR ARM926EJS
850 850
851 Matt Waddel <matt.waddel@linaro.org> 851 Matt Waddel <matt.waddel@linaro.org>
852 852
853 ca9x4_ct_vxp ARM ARMV7 (Quad Core) 853 ca9x4_ct_vxp ARM ARMV7 (Quad Core)
854 854
855 Prafulla Wadaskar <prafulla@marvell.com> 855 Prafulla Wadaskar <prafulla@marvell.com>
856 856
857 aspenite ARM926EJS (ARMADA100 88AP168 SoC) 857 aspenite ARM926EJS (ARMADA100 88AP168 SoC)
858 mv88f6281gtw_ge ARM926EJS (Kirkwood SoC) 858 mv88f6281gtw_ge ARM926EJS (Kirkwood SoC)
859 openrd_base ARM926EJS (Kirkwood SoC) 859 openrd_base ARM926EJS (Kirkwood SoC)
860 rd6281a ARM926EJS (Kirkwood SoC) 860 rd6281a ARM926EJS (Kirkwood SoC)
861 sheevaplug ARM926EJS (Kirkwood SoC) 861 sheevaplug ARM926EJS (Kirkwood SoC)
862 862
863 Tom Warren <twarren@nvidia.com> 863 Tom Warren <twarren@nvidia.com>
864 864
865 harmony Tegra2 (ARM7 & A9 Dual Core) 865 harmony Tegra2 (ARM7 & A9 Dual Core)
866 seaboard Tegra2 (ARM7 & A9 Dual Core) 866 seaboard Tegra2 (ARM7 & A9 Dual Core)
867 867
868 Lei Wen <leiwen@marvell.com> 868 Lei Wen <leiwen@marvell.com>
869 869
870 dkb ARM926EJS (PANTHEON 88AP920 SOC) 870 dkb ARM926EJS (PANTHEON 88AP920 SOC)
871 871
872 Matthias Weisser <weisserm@arcor.de> 872 Matthias Weisser <weisserm@arcor.de>
873 873
874 jadecpu ARM926EJS (MB86R01 SoC) 874 jadecpu ARM926EJS (MB86R01 SoC)
875 zmx25 ARM926EJS (imx25 SoC) 875 zmx25 ARM926EJS (imx25 SoC)
876 876
877 Richard Woodruff <r-woodruff2@ti.com> 877 Richard Woodruff <r-woodruff2@ti.com>
878 878
879 omap2420h4 ARM1136EJS 879 omap2420h4 ARM1136EJS
880 880
881 Syed Mohammed Khasim <sm.khasim@gmail.com> 881 Syed Mohammed Khasim <sm.khasim@gmail.com>
882 Sughosh Ganu <urwithsughosh@gmail.com> 882 Sughosh Ganu <urwithsughosh@gmail.com>
883 883
884 hawkboard ARM926EJS (OMAP-L138) 884 hawkboard ARM926EJS (OMAP-L138)
885 885
886 ------------------------------------------------------------------------- 886 -------------------------------------------------------------------------
887 887
888 Unknown / orphaned boards: 888 Unknown / orphaned boards:
889 Board CPU Last known maintainer / Comment 889 Board CPU Last known maintainer / Comment
890 ......................................................................... 890 .........................................................................
891 cradle xscale/pxa Kyle Harris <kharris@nexus-tech.net> / dead address 891 cradle xscale/pxa Kyle Harris <kharris@nexus-tech.net> / dead address
892 lubbock xscale/pxa Kyle Harris <kharris@nexus-tech.net> / dead address 892 lubbock xscale/pxa Kyle Harris <kharris@nexus-tech.net> / dead address
893 893
894 imx31_phycore_eet i.MX31 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned 894 imx31_phycore_eet i.MX31 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned
895 mx31ads i.MX31 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned 895 mx31ads i.MX31 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned
896 SMDK6400 S3C6400 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned 896 SMDK6400 S3C6400 Guennadi Liakhovetski <g.liakhovetski@gmx.de> / resigned
897 897
898 ######################################################################### 898 #########################################################################
899 # x86 Systems: # 899 # x86 Systems: #
900 # # 900 # #
901 # Maintainer Name, Email Address # 901 # Maintainer Name, Email Address #
902 # Board CPU # 902 # Board CPU #
903 ######################################################################### 903 #########################################################################
904 904
905 Graeme Russ <graeme.russ@gmail.com> 905 Graeme Russ <graeme.russ@gmail.com>
906 906
907 eNET AMD SC520 907 eNET AMD SC520
908 908
909 ######################################################################### 909 #########################################################################
910 # MIPS Systems: # 910 # MIPS Systems: #
911 # # 911 # #
912 # Maintainer Name, Email Address # 912 # Maintainer Name, Email Address #
913 # Board CPU # 913 # Board CPU #
914 ######################################################################### 914 #########################################################################
915 915
916 Wolfgang Denk <wd@denx.de> 916 Wolfgang Denk <wd@denx.de>
917 917
918 incaip MIPS32 4Kc 918 incaip MIPS32 4Kc
919 919
920 Thomas Lange <thomas@corelatus.se> 920 Thomas Lange <thomas@corelatus.se>
921 dbau1x00 MIPS32 Au1000 921 dbau1x00 MIPS32 Au1000
922 gth2 MIPS32 Au1000 922 gth2 MIPS32 Au1000
923 923
924 Vlad Lungu <vlad.lungu@windriver.com> 924 Vlad Lungu <vlad.lungu@windriver.com>
925 qemu_mips MIPS32 925 qemu_mips MIPS32
926 926
927 Stefan Roese <sr@denx.de> 927 Stefan Roese <sr@denx.de>
928 928
929 vct_xxx MIPS32 4Kc 929 vct_xxx MIPS32 4Kc
930 930
931 Xiangfu Liu <xiangfu@openmobilefree.net>
932
933 qi_lb60 MIPS32 (XBurst Jz4740 SoC)
934
931 ######################################################################### 935 #########################################################################
932 # Nios-II Systems: # 936 # Nios-II Systems: #
933 # # 937 # #
934 # Maintainer Name, Email Address # 938 # Maintainer Name, Email Address #
935 # Board CPU # 939 # Board CPU #
936 ######################################################################### 940 #########################################################################
937 941
938 Scott McNutt <smcnutt@psyent.com> 942 Scott McNutt <smcnutt@psyent.com>
939 943
940 PCI5441 Nios-II 944 PCI5441 Nios-II
941 PK1C20 Nios-II 945 PK1C20 Nios-II
942 nios2-generic Nios-II 946 nios2-generic Nios-II
943 947
944 ######################################################################### 948 #########################################################################
945 # MicroBlaze Systems: # 949 # MicroBlaze Systems: #
946 # # 950 # #
947 # Maintainer Name, Email Address # 951 # Maintainer Name, Email Address #
948 # Board CPU # 952 # Board CPU #
949 ######################################################################### 953 #########################################################################
950 954
951 Michal Simek <monstr@monstr.eu> 955 Michal Simek <monstr@monstr.eu>
952 956
953 microblaze-generic MicroBlaze 957 microblaze-generic MicroBlaze
954 958
955 ######################################################################### 959 #########################################################################
956 # Coldfire Systems: # 960 # Coldfire Systems: #
957 # # 961 # #
958 # Maintainer Name, Email Address # 962 # Maintainer Name, Email Address #
959 # Board CPU # 963 # Board CPU #
960 ######################################################################### 964 #########################################################################
961 965
962 Hayden Fraser <Hayden.Fraser@freescale.com> 966 Hayden Fraser <Hayden.Fraser@freescale.com>
963 967
964 M5253EVBE mcf52x2 968 M5253EVBE mcf52x2
965 969
966 Matthias Fuchs <matthias.fuchs@esd-electronics.com> 970 Matthias Fuchs <matthias.fuchs@esd-electronics.com>
967 971
968 TASREG MCF5249 972 TASREG MCF5249
969 973
970 TsiChung Liew <Tsi-Chung.Liew@freescale.com> 974 TsiChung Liew <Tsi-Chung.Liew@freescale.com>
971 975
972 M52277EVB mcf5227x 976 M52277EVB mcf5227x
973 M5235EVB mcf52x2 977 M5235EVB mcf52x2
974 M5253DEMO mcf52x2 978 M5253DEMO mcf52x2
975 M53017EVB mcf532x 979 M53017EVB mcf532x
976 M5329EVB mcf532x 980 M5329EVB mcf532x
977 M5373EVB mcf532x 981 M5373EVB mcf532x
978 M54455EVB mcf5445x 982 M54455EVB mcf5445x
979 M5475EVB mcf547x_8x 983 M5475EVB mcf547x_8x
980 M5485EVB mcf547x_8x 984 M5485EVB mcf547x_8x
981 985
982 Wolfgang Wegner <w.wegner@astro-kom.de> 986 Wolfgang Wegner <w.wegner@astro-kom.de>
983 987
984 astro_mcf5373l MCF5373L 988 astro_mcf5373l MCF5373L
985 989
986 ######################################################################### 990 #########################################################################
987 # AVR32 Systems: # 991 # AVR32 Systems: #
988 # # 992 # #
989 # Maintainer Name, Email Address # 993 # Maintainer Name, Email Address #
990 # Board CPU # 994 # Board CPU #
991 ######################################################################### 995 #########################################################################
992 996
993 Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> 997 Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
994 998
995 FAVR-32-EZKIT AT32AP7000 999 FAVR-32-EZKIT AT32AP7000
996 1000
997 Mark Jackson <mpfj@mimc.co.uk> 1001 Mark Jackson <mpfj@mimc.co.uk>
998 1002
999 MIMC200 AT32AP7000 1003 MIMC200 AT32AP7000
1000 1004
1001 Alex Raimondi <alex.raimondi@miromico.ch> 1005 Alex Raimondi <alex.raimondi@miromico.ch>
1002 Julien May <julien.may@miromico.ch> 1006 Julien May <julien.may@miromico.ch>
1003 1007
1004 HAMMERHEAD AT32AP7000 1008 HAMMERHEAD AT32AP7000
1005 1009
1006 Haavard Skinnemoen <haavard.skinnemoen@atmel.com> 1010 Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
1007 1011
1008 ATSTK1000 AT32AP7xxx 1012 ATSTK1000 AT32AP7xxx
1009 ATSTK1002 AT32AP7000 1013 ATSTK1002 AT32AP7000
1010 ATSTK1003 AT32AP7001 1014 ATSTK1003 AT32AP7001
1011 ATSTK1004 AT32AP7002 1015 ATSTK1004 AT32AP7002
1012 ATSTK1006 AT32AP7000 1016 ATSTK1006 AT32AP7000
1013 ATNGW100 AT32AP7000 1017 ATNGW100 AT32AP7000
1014 1018
1015 ######################################################################### 1019 #########################################################################
1016 # SuperH Systems: # 1020 # SuperH Systems: #
1017 # # 1021 # #
1018 # Maintainer Name, Email Address # 1022 # Maintainer Name, Email Address #
1019 # Board CPU # 1023 # Board CPU #
1020 ######################################################################### 1024 #########################################################################
1021 1025
1022 Yusuke Goda <goda.yusuke@renesas.com> 1026 Yusuke Goda <goda.yusuke@renesas.com>
1023 1027
1024 MIGO-R SH7722 1028 MIGO-R SH7722
1025 1029
1026 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 1030 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
1027 <iwamatsu.nobuhiro@renesas.com> 1031 <iwamatsu.nobuhiro@renesas.com>
1028 1032
1029 MS7750SE SH7750 1033 MS7750SE SH7750
1030 MS7722SE SH7722 1034 MS7722SE SH7722
1031 R7780MP SH7780 1035 R7780MP SH7780
1032 R2DPlus SH7751R 1036 R2DPlus SH7751R
1033 SH7763RDP SH7763 1037 SH7763RDP SH7763
1034 RSK7203 SH7203 1038 RSK7203 SH7203
1035 AP325RXA SH7723 1039 AP325RXA SH7723
1036 SHMIN SH7706 1040 SHMIN SH7706
1037 1041
1038 Mark Jonas <mark.jonas@de.bosch.com> 1042 Mark Jonas <mark.jonas@de.bosch.com>
1039 1043
1040 mpr2 SH7720 1044 mpr2 SH7720
1041 1045
1042 Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 1046 Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
1043 1047
1044 MS7720SE SH7720 1048 MS7720SE SH7720
1045 R0P77570030RL SH7757 1049 R0P77570030RL SH7757
1046 R0P77850011RL SH7785 1050 R0P77850011RL SH7785
1047 1051
1048 ######################################################################### 1052 #########################################################################
1049 # Blackfin Systems: # 1053 # Blackfin Systems: #
1050 # # 1054 # #
1051 # Maintainer Name, Email Address # 1055 # Maintainer Name, Email Address #
1052 # Board CPU # 1056 # Board CPU #
1053 ######################################################################### 1057 #########################################################################
1054 1058
1055 Mike Frysinger <vapier@gentoo.org> 1059 Mike Frysinger <vapier@gentoo.org>
1056 Blackfin Team <u-boot-devel@blackfin.uclinux.org> 1060 Blackfin Team <u-boot-devel@blackfin.uclinux.org>
1057 1061
1058 BF506F-EZKIT BF506 1062 BF506F-EZKIT BF506
1059 BF518F-EZBRD BF518 1063 BF518F-EZBRD BF518
1060 BF526-EZBRD BF526 1064 BF526-EZBRD BF526
1061 BF527-AD7160-EVAL BF527 1065 BF527-AD7160-EVAL BF527
1062 BF527-EZKIT BF527 1066 BF527-EZKIT BF527
1063 BF527-EZKIT-V2 BF527 1067 BF527-EZKIT-V2 BF527
1064 BF527-SDP BF527 1068 BF527-SDP BF527
1065 BF533-EZKIT BF533 1069 BF533-EZKIT BF533
1066 BF533-STAMP BF533 1070 BF533-STAMP BF533
1067 BF537-PNAV BF537 1071 BF537-PNAV BF537
1068 BF537-STAMP BF537 1072 BF537-STAMP BF537
1069 BF538F-EZKIT BF538 1073 BF538F-EZKIT BF538
1070 BF548-EZKIT BF548 1074 BF548-EZKIT BF548
1071 BF561-EZKIT BF561 1075 BF561-EZKIT BF561
1072 1076
1073 M.Hasewinkel (MHA) <info@ssv-embedded.de> 1077 M.Hasewinkel (MHA) <info@ssv-embedded.de>
1074 1078
1075 dnp5370 BF537 1079 dnp5370 BF537
1076 1080
1077 Brent Kandetzki <brentk@teleco.com> 1081 Brent Kandetzki <brentk@teleco.com>
1078 1082
1079 IP04 BF532 1083 IP04 BF532
1080 1084
1081 Peter Meerwald <devel@bct-electronic.com> 1085 Peter Meerwald <devel@bct-electronic.com>
1082 1086
1083 bct-brettl2 BF536 1087 bct-brettl2 BF536
1084 1088
1085 I-SYST Micromodule <support@i-syst.com> 1089 I-SYST Micromodule <support@i-syst.com>
1086 1090
1087 IBF-DSP561 BF561 1091 IBF-DSP561 BF561
1088 1092
1089 Wojtek Skulski <skulski@pas.rochester.edu> 1093 Wojtek Skulski <skulski@pas.rochester.edu>
1090 Wojtek Skulski <info@skutek.com> 1094 Wojtek Skulski <info@skutek.com>
1091 Benjamin Matthews <mben12@gmail.com> 1095 Benjamin Matthews <mben12@gmail.com>
1092 1096
1093 BlackStamp BF533 1097 BlackStamp BF533
1094 BlackVME BF561 1098 BlackVME BF561
1095 1099
1096 Martin Strubel <strubel@section5.ch> 1100 Martin Strubel <strubel@section5.ch>
1097 1101
1098 BF537-minotaur BF537 1102 BF537-minotaur BF537
1099 BF537-srv1 BF537 1103 BF537-srv1 BF537
1100 1104
1101 Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org> 1105 Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org>
1102 1106
1103 CM-BF527 BF527 1107 CM-BF527 BF527
1104 CM-BF533 BF533 1108 CM-BF533 BF533
1105 CM-BF537E BF537 1109 CM-BF537E BF537
1106 CM-BF537U BF537 1110 CM-BF537U BF537
1107 CM-BF548 BF548 1111 CM-BF548 BF548
1108 CM-BF561 BF561 1112 CM-BF561 BF561
1109 TCM-BF518 BF518 1113 TCM-BF518 BF518
1110 TCM-BF537 BF537 1114 TCM-BF537 BF537
1111 1115
1112 Valentin Yakovenkov <yakovenkov@niistt.ru> 1116 Valentin Yakovenkov <yakovenkov@niistt.ru>
1113 Anton Shurpin <shurpin.aa@niistt.ru> 1117 Anton Shurpin <shurpin.aa@niistt.ru>
1114 1118
1115 BF561-ACVILON BF561 1119 BF561-ACVILON BF561
1116 1120
1117 Haitao Zhang <hzhang@ucrobotics.com> 1121 Haitao Zhang <hzhang@ucrobotics.com>
1118 Chong Huang <chuang@ucrobotics.com> 1122 Chong Huang <chuang@ucrobotics.com>
1119 1123
1120 bf525-ucr2 BF525 1124 bf525-ucr2 BF525
1121 1125
1122 ######################################################################### 1126 #########################################################################
1123 # End of MAINTAINERS list # 1127 # End of MAINTAINERS list #
1124 ######################################################################### 1128 #########################################################################
1125 1129
1 #!/bin/bash 1 #!/bin/bash
2 # Tool mainly for U-Boot Quality Assurance: build one or more board 2 # Tool mainly for U-Boot Quality Assurance: build one or more board
3 # configurations with minimal verbosity, showing only warnings and 3 # configurations with minimal verbosity, showing only warnings and
4 # errors. 4 # errors.
5 5
6 usage() 6 usage()
7 { 7 {
8 # if exiting with 0, write to stdout, else write to stderr 8 # if exiting with 0, write to stdout, else write to stderr
9 local ret=${1:-0} 9 local ret=${1:-0}
10 [ "${ret}" -eq 1 ] && exec 1>&2 10 [ "${ret}" -eq 1 ] && exec 1>&2
11 cat <<-EOF 11 cat <<-EOF
12 Usage: MAKEALL [options] [--] [boards-to-build] 12 Usage: MAKEALL [options] [--] [boards-to-build]
13 13
14 Options: 14 Options:
15 -a ARCH, --arch ARCH Build all boards with arch ARCH 15 -a ARCH, --arch ARCH Build all boards with arch ARCH
16 -c CPU, --cpu CPU Build all boards with cpu CPU 16 -c CPU, --cpu CPU Build all boards with cpu CPU
17 -v VENDOR, --vendor VENDOR Build all boards with vendor VENDOR 17 -v VENDOR, --vendor VENDOR Build all boards with vendor VENDOR
18 -s SOC, --soc SOC Build all boards with soc SOC 18 -s SOC, --soc SOC Build all boards with soc SOC
19 -h, --help This help output 19 -h, --help This help output
20 20
21 Selections by these options are logically ANDed; if the same option 21 Selections by these options are logically ANDed; if the same option
22 is used repeatedly, such selections are ORed. So "-v FOO -v BAR" 22 is used repeatedly, such selections are ORed. So "-v FOO -v BAR"
23 will select all configurations where the vendor is either FOO or 23 will select all configurations where the vendor is either FOO or
24 BAR. Any additional arguments specified on the command line are 24 BAR. Any additional arguments specified on the command line are
25 always build additionally. See the boards.cfg file for more info. 25 always build additionally. See the boards.cfg file for more info.
26 26
27 If no boards are specified, then the default is "powerpc". 27 If no boards are specified, then the default is "powerpc".
28 28
29 Environment variables: 29 Environment variables:
30 BUILD_NCPUS number of parallel make jobs (default: auto) 30 BUILD_NCPUS number of parallel make jobs (default: auto)
31 CROSS_COMPILE cross-compiler toolchain prefix (default: "") 31 CROSS_COMPILE cross-compiler toolchain prefix (default: "")
32 MAKEALL_LOGDIR output all logs to here (default: ./LOG/) 32 MAKEALL_LOGDIR output all logs to here (default: ./LOG/)
33 BUILD_DIR output build directory (default: ./) 33 BUILD_DIR output build directory (default: ./)
34 34
35 Examples: 35 Examples:
36 - build all Power Architecture boards: 36 - build all Power Architecture boards:
37 MAKEALL -a powerpc 37 MAKEALL -a powerpc
38 MAKEALL --arch powerpc 38 MAKEALL --arch powerpc
39 MAKEALL powerpc 39 MAKEALL powerpc
40 - build all PowerPC boards manufactured by vendor "esd": 40 - build all PowerPC boards manufactured by vendor "esd":
41 MAKEALL -a powerpc -v esd 41 MAKEALL -a powerpc -v esd
42 - build all PowerPC boards manufactured either by "keymile" or "siemens": 42 - build all PowerPC boards manufactured either by "keymile" or "siemens":
43 MAKEALL -a powerpc -v keymile -v siemens 43 MAKEALL -a powerpc -v keymile -v siemens
44 - build all Freescale boards with MPC83xx CPUs, plus all 4xx boards: 44 - build all Freescale boards with MPC83xx CPUs, plus all 4xx boards:
45 MAKEALL -c mpc83xx -v freescale 4xx 45 MAKEALL -c mpc83xx -v freescale 4xx
46 EOF 46 EOF
47 exit ${ret} 47 exit ${ret}
48 } 48 }
49 49
50 SHORT_OPTS="ha:c:v:s:" 50 SHORT_OPTS="ha:c:v:s:"
51 LONG_OPTS="help,arch:,cpu:,vendor:,soc:" 51 LONG_OPTS="help,arch:,cpu:,vendor:,soc:"
52 52
53 # Option processing based on util-linux-2.13/getopt-parse.bash 53 # Option processing based on util-linux-2.13/getopt-parse.bash
54 54
55 # Note that we use `"$@"' to let each command-line parameter expand to a 55 # Note that we use `"$@"' to let each command-line parameter expand to a
56 # separate word. The quotes around `$@' are essential! 56 # separate word. The quotes around `$@' are essential!
57 # We need TEMP as the `eval set --' would nuke the return value of 57 # We need TEMP as the `eval set --' would nuke the return value of
58 # getopt. 58 # getopt.
59 TEMP=`getopt -o ${SHORT_OPTS} --long ${LONG_OPTS} \ 59 TEMP=`getopt -o ${SHORT_OPTS} --long ${LONG_OPTS} \
60 -n 'MAKEALL' -- "$@"` 60 -n 'MAKEALL' -- "$@"`
61 61
62 [ $? != 0 ] && usage 1 62 [ $? != 0 ] && usage 1
63 63
64 # Note the quotes around `$TEMP': they are essential! 64 # Note the quotes around `$TEMP': they are essential!
65 eval set -- "$TEMP" 65 eval set -- "$TEMP"
66 66
67 SELECTED='' 67 SELECTED=''
68 68
69 while true ; do 69 while true ; do
70 case "$1" in 70 case "$1" in
71 -a|--arch) 71 -a|--arch)
72 # echo "Option ARCH: argument \`$2'" 72 # echo "Option ARCH: argument \`$2'"
73 if [ "$opt_a" ] ; then 73 if [ "$opt_a" ] ; then
74 opt_a="${opt_a%)} || \$2 == \"$2\")" 74 opt_a="${opt_a%)} || \$2 == \"$2\")"
75 else 75 else
76 opt_a="(\$2 == \"$2\")" 76 opt_a="(\$2 == \"$2\")"
77 fi 77 fi
78 SELECTED='y' 78 SELECTED='y'
79 shift 2 ;; 79 shift 2 ;;
80 -c|--cpu) 80 -c|--cpu)
81 # echo "Option CPU: argument \`$2'" 81 # echo "Option CPU: argument \`$2'"
82 if [ "$opt_c" ] ; then 82 if [ "$opt_c" ] ; then
83 opt_c="${opt_c%)} || \$3 == \"$2\")" 83 opt_c="${opt_c%)} || \$3 == \"$2\")"
84 else 84 else
85 opt_c="(\$3 == \"$2\")" 85 opt_c="(\$3 == \"$2\")"
86 fi 86 fi
87 SELECTED='y' 87 SELECTED='y'
88 shift 2 ;; 88 shift 2 ;;
89 -s|--soc) 89 -s|--soc)
90 # echo "Option SoC: argument \`$2'" 90 # echo "Option SoC: argument \`$2'"
91 if [ "$opt_s" ] ; then 91 if [ "$opt_s" ] ; then
92 opt_s="${opt_s%)} || \$6 == \"$2\")" 92 opt_s="${opt_s%)} || \$6 == \"$2\")"
93 else 93 else
94 opt_s="(\$6 == \"$2\")" 94 opt_s="(\$6 == \"$2\")"
95 fi 95 fi
96 SELECTED='y' 96 SELECTED='y'
97 shift 2 ;; 97 shift 2 ;;
98 -v|--vendor) 98 -v|--vendor)
99 # echo "Option VENDOR: argument \`$2'" 99 # echo "Option VENDOR: argument \`$2'"
100 if [ "$opt_v" ] ; then 100 if [ "$opt_v" ] ; then
101 opt_v="${opt_v%)} || \$5 == \"$2\")" 101 opt_v="${opt_v%)} || \$5 == \"$2\")"
102 else 102 else
103 opt_v="(\$5 == \"$2\")" 103 opt_v="(\$5 == \"$2\")"
104 fi 104 fi
105 SELECTED='y' 105 SELECTED='y'
106 shift 2 ;; 106 shift 2 ;;
107 -h|--help) 107 -h|--help)
108 usage ;; 108 usage ;;
109 --) 109 --)
110 shift ; break ;; 110 shift ; break ;;
111 *) 111 *)
112 echo "Internal error!" >&2 ; exit 1 ;; 112 echo "Internal error!" >&2 ; exit 1 ;;
113 esac 113 esac
114 done 114 done
115 # echo "Remaining arguments:" 115 # echo "Remaining arguments:"
116 # for arg do echo '--> '"\`$arg'" ; done 116 # for arg do echo '--> '"\`$arg'" ; done
117 117
118 FILTER="\$1 !~ /^#/" 118 FILTER="\$1 !~ /^#/"
119 [ "$opt_a" ] && FILTER="${FILTER} && $opt_a" 119 [ "$opt_a" ] && FILTER="${FILTER} && $opt_a"
120 [ "$opt_c" ] && FILTER="${FILTER} && $opt_c" 120 [ "$opt_c" ] && FILTER="${FILTER} && $opt_c"
121 [ "$opt_s" ] && FILTER="${FILTER} && $opt_s" 121 [ "$opt_s" ] && FILTER="${FILTER} && $opt_s"
122 [ "$opt_v" ] && FILTER="${FILTER} && $opt_v" 122 [ "$opt_v" ] && FILTER="${FILTER} && $opt_v"
123 123
124 if [ "$SELECTED" ] ; then 124 if [ "$SELECTED" ] ; then
125 SELECTED=$(awk '('"$FILTER"') { print $1 }' boards.cfg) 125 SELECTED=$(awk '('"$FILTER"') { print $1 }' boards.cfg)
126 126
127 # Make sure some boards from boards.cfg are actually found 127 # Make sure some boards from boards.cfg are actually found
128 if [ -z "$SELECTED" ] ; then 128 if [ -z "$SELECTED" ] ; then
129 echo "Error: No boards selected, invalid arguments" 129 echo "Error: No boards selected, invalid arguments"
130 exit 1 130 exit 1
131 fi 131 fi
132 fi 132 fi
133 133
134 ######################################################################### 134 #########################################################################
135 135
136 # Print statistics when we exit 136 # Print statistics when we exit
137 trap exit 1 2 3 15 137 trap exit 1 2 3 15
138 trap print_stats 0 138 trap print_stats 0
139 139
140 # Determine number of CPU cores if no default was set 140 # Determine number of CPU cores if no default was set
141 : ${BUILD_NCPUS:="`getconf _NPROCESSORS_ONLN`"} 141 : ${BUILD_NCPUS:="`getconf _NPROCESSORS_ONLN`"}
142 142
143 if [ "$BUILD_NCPUS" -gt 1 ] 143 if [ "$BUILD_NCPUS" -gt 1 ]
144 then 144 then
145 JOBS="-j $((BUILD_NCPUS + 1))" 145 JOBS="-j $((BUILD_NCPUS + 1))"
146 else 146 else
147 JOBS="" 147 JOBS=""
148 fi 148 fi
149 149
150 150
151 if [ "${CROSS_COMPILE}" ] ; then 151 if [ "${CROSS_COMPILE}" ] ; then
152 MAKE="make CROSS_COMPILE=${CROSS_COMPILE}" 152 MAKE="make CROSS_COMPILE=${CROSS_COMPILE}"
153 else 153 else
154 MAKE=make 154 MAKE=make
155 fi 155 fi
156 156
157 if [ "${MAKEALL_LOGDIR}" ] ; then 157 if [ "${MAKEALL_LOGDIR}" ] ; then
158 LOG_DIR=${MAKEALL_LOGDIR} 158 LOG_DIR=${MAKEALL_LOGDIR}
159 else 159 else
160 LOG_DIR="LOG" 160 LOG_DIR="LOG"
161 fi 161 fi
162 162
163 if [ ! "${BUILD_DIR}" ] ; then 163 if [ ! "${BUILD_DIR}" ] ; then
164 BUILD_DIR="." 164 BUILD_DIR="."
165 fi 165 fi
166 166
167 [ -d ${LOG_DIR} ] || mkdir ${LOG_DIR} || exit 1 167 [ -d ${LOG_DIR} ] || mkdir ${LOG_DIR} || exit 1
168 168
169 LIST="" 169 LIST=""
170 170
171 # Keep track of the number of builds and errors 171 # Keep track of the number of builds and errors
172 ERR_CNT=0 172 ERR_CNT=0
173 ERR_LIST="" 173 ERR_LIST=""
174 TOTAL_CNT=0 174 TOTAL_CNT=0
175 RC=0 175 RC=0
176 176
177 # Helper funcs for parsing boards.cfg 177 # Helper funcs for parsing boards.cfg
178 boards_by_field() 178 boards_by_field()
179 { 179 {
180 awk \ 180 awk \
181 -v field="$1" \ 181 -v field="$1" \
182 -v select="$2" \ 182 -v select="$2" \
183 '($1 !~ /^#/ && $field == select) { print $1 }' \ 183 '($1 !~ /^#/ && $field == select) { print $1 }' \
184 boards.cfg 184 boards.cfg
185 } 185 }
186 boards_by_arch() { boards_by_field 2 "$@" ; } 186 boards_by_arch() { boards_by_field 2 "$@" ; }
187 boards_by_cpu() { boards_by_field 3 "$@" ; } 187 boards_by_cpu() { boards_by_field 3 "$@" ; }
188 boards_by_soc() { boards_by_field 6 "$@" ; } 188 boards_by_soc() { boards_by_field 6 "$@" ; }
189 189
190 ######################################################################### 190 #########################################################################
191 ## MPC5xx Systems 191 ## MPC5xx Systems
192 ######################################################################### 192 #########################################################################
193 193
194 LIST_5xx="$(boards_by_cpu mpc5xx)" 194 LIST_5xx="$(boards_by_cpu mpc5xx)"
195 195
196 ######################################################################### 196 #########################################################################
197 ## MPC5xxx Systems 197 ## MPC5xxx Systems
198 ######################################################################### 198 #########################################################################
199 199
200 LIST_5xxx="$(boards_by_cpu mpc5xxx)" 200 LIST_5xxx="$(boards_by_cpu mpc5xxx)"
201 201
202 ######################################################################### 202 #########################################################################
203 ## MPC512x Systems 203 ## MPC512x Systems
204 ######################################################################### 204 #########################################################################
205 205
206 LIST_512x="$(boards_by_cpu mpc512x)" 206 LIST_512x="$(boards_by_cpu mpc512x)"
207 207
208 ######################################################################### 208 #########################################################################
209 ## MPC8xx Systems 209 ## MPC8xx Systems
210 ######################################################################### 210 #########################################################################
211 211
212 LIST_8xx="$(boards_by_cpu mpc8xx)" 212 LIST_8xx="$(boards_by_cpu mpc8xx)"
213 213
214 ######################################################################### 214 #########################################################################
215 ## PPC4xx Systems 215 ## PPC4xx Systems
216 ######################################################################### 216 #########################################################################
217 217
218 LIST_4xx="$(boards_by_cpu ppc4xx)" 218 LIST_4xx="$(boards_by_cpu ppc4xx)"
219 219
220 ######################################################################### 220 #########################################################################
221 ## MPC8220 Systems 221 ## MPC8220 Systems
222 ######################################################################### 222 #########################################################################
223 223
224 LIST_8220="$(boards_by_cpu mpc8220)" 224 LIST_8220="$(boards_by_cpu mpc8220)"
225 225
226 ######################################################################### 226 #########################################################################
227 ## MPC824x Systems 227 ## MPC824x Systems
228 ######################################################################### 228 #########################################################################
229 229
230 LIST_824x="$(boards_by_cpu mpc824x)" 230 LIST_824x="$(boards_by_cpu mpc824x)"
231 231
232 ######################################################################### 232 #########################################################################
233 ## MPC8260 Systems (includes 8250, 8255 etc.) 233 ## MPC8260 Systems (includes 8250, 8255 etc.)
234 ######################################################################### 234 #########################################################################
235 235
236 LIST_8260="$(boards_by_cpu mpc8260)" 236 LIST_8260="$(boards_by_cpu mpc8260)"
237 237
238 ######################################################################### 238 #########################################################################
239 ## MPC83xx Systems (includes 8349, etc.) 239 ## MPC83xx Systems (includes 8349, etc.)
240 ######################################################################### 240 #########################################################################
241 241
242 LIST_83xx="$(boards_by_cpu mpc83xx)" 242 LIST_83xx="$(boards_by_cpu mpc83xx)"
243 243
244 ######################################################################### 244 #########################################################################
245 ## MPC85xx Systems (includes 8540, 8560 etc.) 245 ## MPC85xx Systems (includes 8540, 8560 etc.)
246 ######################################################################### 246 #########################################################################
247 247
248 LIST_85xx="$(boards_by_cpu mpc85xx)" 248 LIST_85xx="$(boards_by_cpu mpc85xx)"
249 249
250 ######################################################################### 250 #########################################################################
251 ## MPC86xx Systems 251 ## MPC86xx Systems
252 ######################################################################### 252 #########################################################################
253 253
254 LIST_86xx="$(boards_by_cpu mpc86xx)" 254 LIST_86xx="$(boards_by_cpu mpc86xx)"
255 255
256 ######################################################################### 256 #########################################################################
257 ## 74xx/7xx Systems 257 ## 74xx/7xx Systems
258 ######################################################################### 258 #########################################################################
259 259
260 LIST_74xx_7xx="$(boards_by_cpu 74xx_7xx)" 260 LIST_74xx_7xx="$(boards_by_cpu 74xx_7xx)"
261 261
262 ######################################################################### 262 #########################################################################
263 ## PowerPC groups 263 ## PowerPC groups
264 ######################################################################### 264 #########################################################################
265 265
266 LIST_TSEC=" \ 266 LIST_TSEC=" \
267 ${LIST_83xx} \ 267 ${LIST_83xx} \
268 ${LIST_85xx} \ 268 ${LIST_85xx} \
269 ${LIST_86xx} \ 269 ${LIST_86xx} \
270 " 270 "
271 271
272 LIST_powerpc=" \ 272 LIST_powerpc=" \
273 ${LIST_5xx} \ 273 ${LIST_5xx} \
274 ${LIST_512x} \ 274 ${LIST_512x} \
275 ${LIST_5xxx} \ 275 ${LIST_5xxx} \
276 ${LIST_8xx} \ 276 ${LIST_8xx} \
277 ${LIST_8220} \ 277 ${LIST_8220} \
278 ${LIST_824x} \ 278 ${LIST_824x} \
279 ${LIST_8260} \ 279 ${LIST_8260} \
280 ${LIST_83xx} \ 280 ${LIST_83xx} \
281 ${LIST_85xx} \ 281 ${LIST_85xx} \
282 ${LIST_86xx} \ 282 ${LIST_86xx} \
283 ${LIST_4xx} \ 283 ${LIST_4xx} \
284 ${LIST_74xx_7xx}\ 284 ${LIST_74xx_7xx}\
285 " 285 "
286 286
287 # Alias "ppc" -> "powerpc" to not break compatibility with older scripts 287 # Alias "ppc" -> "powerpc" to not break compatibility with older scripts
288 # still using "ppc" instead of "powerpc" 288 # still using "ppc" instead of "powerpc"
289 LIST_ppc=" \ 289 LIST_ppc=" \
290 ${LIST_powerpc} \ 290 ${LIST_powerpc} \
291 " 291 "
292 292
293 ######################################################################### 293 #########################################################################
294 ## StrongARM Systems 294 ## StrongARM Systems
295 ######################################################################### 295 #########################################################################
296 296
297 LIST_SA="$(boards_by_cpu sa1100)" 297 LIST_SA="$(boards_by_cpu sa1100)"
298 298
299 ######################################################################### 299 #########################################################################
300 ## ARM9 Systems 300 ## ARM9 Systems
301 ######################################################################### 301 #########################################################################
302 302
303 LIST_ARM9="$(boards_by_cpu arm920t) \ 303 LIST_ARM9="$(boards_by_cpu arm920t) \
304 $(boards_by_cpu arm926ejs) \ 304 $(boards_by_cpu arm926ejs) \
305 $(boards_by_cpu arm925t) \ 305 $(boards_by_cpu arm925t) \
306 omap1610h2 \ 306 omap1610h2 \
307 omap1610inn \ 307 omap1610inn \
308 omap730p2 \ 308 omap730p2 \
309 " 309 "
310 310
311 ######################################################################### 311 #########################################################################
312 ## ARM11 Systems 312 ## ARM11 Systems
313 ######################################################################### 313 #########################################################################
314 LIST_ARM11="$(boards_by_cpu arm1136) \ 314 LIST_ARM11="$(boards_by_cpu arm1136) \
315 apollon \ 315 apollon \
316 imx31_phycore \ 316 imx31_phycore \
317 imx31_phycore_eet \ 317 imx31_phycore_eet \
318 mx31pdk \ 318 mx31pdk \
319 mx31pdk_nand \ 319 mx31pdk_nand \
320 smdk6400 \ 320 smdk6400 \
321 " 321 "
322 322
323 ######################################################################### 323 #########################################################################
324 ## ARMV7 Systems 324 ## ARMV7 Systems
325 ######################################################################### 325 #########################################################################
326 326
327 LIST_ARMV7="$(boards_by_cpu armv7)" 327 LIST_ARMV7="$(boards_by_cpu armv7)"
328 328
329 ######################################################################### 329 #########################################################################
330 ## AT91 Systems 330 ## AT91 Systems
331 ######################################################################### 331 #########################################################################
332 332
333 LIST_at91="$(boards_by_soc at91)" 333 LIST_at91="$(boards_by_soc at91)"
334 334
335 ######################################################################### 335 #########################################################################
336 ## Xscale Systems 336 ## Xscale Systems
337 ######################################################################### 337 #########################################################################
338 338
339 LIST_pxa="$(boards_by_cpu pxa)" 339 LIST_pxa="$(boards_by_cpu pxa)"
340 340
341 LIST_ixp="$(boards_by_cpu ixp) 341 LIST_ixp="$(boards_by_cpu ixp)
342 pdnb3 \ 342 pdnb3 \
343 scpu \ 343 scpu \
344 " 344 "
345 345
346 ######################################################################### 346 #########################################################################
347 ## ARM groups 347 ## ARM groups
348 ######################################################################### 348 #########################################################################
349 349
350 LIST_arm=" \ 350 LIST_arm=" \
351 ${LIST_SA} \ 351 ${LIST_SA} \
352 ${LIST_ARM9} \ 352 ${LIST_ARM9} \
353 ${LIST_ARM10} \ 353 ${LIST_ARM10} \
354 ${LIST_ARM11} \ 354 ${LIST_ARM11} \
355 ${LIST_ARMV7} \ 355 ${LIST_ARMV7} \
356 ${LIST_at91} \ 356 ${LIST_at91} \
357 ${LIST_pxa} \ 357 ${LIST_pxa} \
358 ${LIST_ixp} \ 358 ${LIST_ixp} \
359 " 359 "
360 360
361 ######################################################################### 361 #########################################################################
362 ## MIPS Systems (default = big endian) 362 ## MIPS Systems (default = big endian)
363 ######################################################################### 363 #########################################################################
364 364
365 LIST_mips4kc=" \ 365 LIST_mips4kc=" \
366 incaip \ 366 incaip \
367 qemu_mips \ 367 qemu_mips \
368 vct_platinum \ 368 vct_platinum \
369 vct_platinum_small \ 369 vct_platinum_small \
370 vct_platinum_onenand \ 370 vct_platinum_onenand \
371 vct_platinum_onenand_small \ 371 vct_platinum_onenand_small \
372 vct_platinumavc \ 372 vct_platinumavc \
373 vct_platinumavc_small \ 373 vct_platinumavc_small \
374 vct_platinumavc_onenand \ 374 vct_platinumavc_onenand \
375 vct_platinumavc_onenand_small \ 375 vct_platinumavc_onenand_small \
376 vct_premium \ 376 vct_premium \
377 vct_premium_small \ 377 vct_premium_small \
378 vct_premium_onenand \ 378 vct_premium_onenand \
379 vct_premium_onenand_small \ 379 vct_premium_onenand_small \
380 " 380 "
381 381
382 LIST_mips5kc="" 382 LIST_mips5kc=""
383 383
384 LIST_au1xx0=" \ 384 LIST_au1xx0=" \
385 dbau1000 \ 385 dbau1000 \
386 dbau1100 \ 386 dbau1100 \
387 dbau1500 \ 387 dbau1500 \
388 dbau1550 \ 388 dbau1550 \
389 dbau1550_el \ 389 dbau1550_el \
390 gth2 \ 390 gth2 \
391 " 391 "
392 392
393 LIST_mips=" \ 393 LIST_mips=" \
394 ${LIST_mips4kc} \ 394 ${LIST_mips4kc} \
395 ${LIST_mips5kc} \ 395 ${LIST_mips5kc} \
396 ${LIST_au1xx0} \ 396 ${LIST_au1xx0} \
397 " 397 "
398 398
399 ######################################################################### 399 #########################################################################
400 ## MIPS Systems (little endian) 400 ## MIPS Systems (little endian)
401 ######################################################################### 401 #########################################################################
402 402
403 LIST_mips4kc_el="" 403 LIST_mips4kc_el=" \
404 qi_lb60 \
405 "
404 406
405 LIST_mips5kc_el="" 407 LIST_mips5kc_el=""
406 408
407 LIST_au1xx0_el=" \ 409 LIST_au1xx0_el=" \
408 dbau1550_el \ 410 dbau1550_el \
409 pb1000 \ 411 pb1000 \
410 " 412 "
411 413
412 LIST_mips_el=" \ 414 LIST_mips_el=" \
413 ${LIST_mips4kc_el} \ 415 ${LIST_mips4kc_el} \
414 ${LIST_mips5kc_el} \ 416 ${LIST_mips5kc_el} \
415 ${LIST_au1xx0_el} \ 417 ${LIST_au1xx0_el} \
416 " 418 "
417 419
418 ######################################################################### 420 #########################################################################
419 ## x86 Systems 421 ## x86 Systems
420 ######################################################################### 422 #########################################################################
421 423
422 LIST_x86="$(boards_by_arch x86)" 424 LIST_x86="$(boards_by_arch x86)"
423 425
424 ######################################################################### 426 #########################################################################
425 ## Nios-II Systems 427 ## Nios-II Systems
426 ######################################################################### 428 #########################################################################
427 429
428 LIST_nios2="$(boards_by_arch nios2)" 430 LIST_nios2="$(boards_by_arch nios2)"
429 431
430 ######################################################################### 432 #########################################################################
431 ## MicroBlaze Systems 433 ## MicroBlaze Systems
432 ######################################################################### 434 #########################################################################
433 435
434 LIST_microblaze="$(boards_by_arch microblaze)" 436 LIST_microblaze="$(boards_by_arch microblaze)"
435 437
436 ######################################################################### 438 #########################################################################
437 ## ColdFire Systems 439 ## ColdFire Systems
438 ######################################################################### 440 #########################################################################
439 441
440 LIST_m68k="$(boards_by_arch m68k) 442 LIST_m68k="$(boards_by_arch m68k)
441 astro_mcf5373l \ 443 astro_mcf5373l \
442 cobra5272 \ 444 cobra5272 \
443 EB+MCF-EV123 \ 445 EB+MCF-EV123 \
444 EB+MCF-EV123_internal \ 446 EB+MCF-EV123_internal \
445 M52277EVB \ 447 M52277EVB \
446 M5235EVB \ 448 M5235EVB \
447 M5329AFEE \ 449 M5329AFEE \
448 M5373EVB \ 450 M5373EVB \
449 M54451EVB \ 451 M54451EVB \
450 M54455EVB \ 452 M54455EVB \
451 M5475AFE \ 453 M5475AFE \
452 M5485AFE \ 454 M5485AFE \
453 " 455 "
454 LIST_coldfire=${LIST_m68k} 456 LIST_coldfire=${LIST_m68k}
455 457
456 ######################################################################### 458 #########################################################################
457 ## AVR32 Systems 459 ## AVR32 Systems
458 ######################################################################### 460 #########################################################################
459 461
460 LIST_avr32="$(boards_by_arch avr32)" 462 LIST_avr32="$(boards_by_arch avr32)"
461 463
462 ######################################################################### 464 #########################################################################
463 ## Blackfin Systems 465 ## Blackfin Systems
464 ######################################################################### 466 #########################################################################
465 467
466 LIST_blackfin="$(boards_by_arch blackfin)" 468 LIST_blackfin="$(boards_by_arch blackfin)"
467 469
468 ######################################################################### 470 #########################################################################
469 ## SH Systems 471 ## SH Systems
470 ######################################################################### 472 #########################################################################
471 473
472 LIST_sh2="$(boards_by_cpu sh2)" 474 LIST_sh2="$(boards_by_cpu sh2)"
473 LIST_sh3="$(boards_by_cpu sh3)" 475 LIST_sh3="$(boards_by_cpu sh3)"
474 LIST_sh4="$(boards_by_cpu sh4)" 476 LIST_sh4="$(boards_by_cpu sh4)"
475 477
476 LIST_sh="$(boards_by_arch sh)" 478 LIST_sh="$(boards_by_arch sh)"
477 479
478 ######################################################################### 480 #########################################################################
479 ## SPARC Systems 481 ## SPARC Systems
480 ######################################################################### 482 #########################################################################
481 483
482 LIST_sparc="$(boards_by_arch sparc)" 484 LIST_sparc="$(boards_by_arch sparc)"
483 485
484 #----------------------------------------------------------------------- 486 #-----------------------------------------------------------------------
485 487
486 build_target() { 488 build_target() {
487 target=$1 489 target=$1
488 490
489 ${MAKE} distclean >/dev/null 491 ${MAKE} distclean >/dev/null
490 ${MAKE} -s ${target}_config 492 ${MAKE} -s ${target}_config
491 493
492 ${MAKE} ${JOBS} all 2>&1 >${LOG_DIR}/$target.MAKELOG \ 494 ${MAKE} ${JOBS} all 2>&1 >${LOG_DIR}/$target.MAKELOG \
493 | tee ${LOG_DIR}/$target.ERR 495 | tee ${LOG_DIR}/$target.ERR
494 496
495 # Check for 'make' errors 497 # Check for 'make' errors
496 if [ ${PIPESTATUS[0]} -ne 0 ] ; then 498 if [ ${PIPESTATUS[0]} -ne 0 ] ; then
497 RC=1 499 RC=1
498 fi 500 fi
499 501
500 if [ -s ${LOG_DIR}/$target.ERR ] ; then 502 if [ -s ${LOG_DIR}/$target.ERR ] ; then
501 ERR_CNT=$((ERR_CNT + 1)) 503 ERR_CNT=$((ERR_CNT + 1))
502 ERR_LIST="${ERR_LIST} $target" 504 ERR_LIST="${ERR_LIST} $target"
503 else 505 else
504 rm ${LOG_DIR}/$target.ERR 506 rm ${LOG_DIR}/$target.ERR
505 fi 507 fi
506 508
507 TOTAL_CNT=$((TOTAL_CNT + 1)) 509 TOTAL_CNT=$((TOTAL_CNT + 1))
508 510
509 ${CROSS_COMPILE}size ${BUILD_DIR}/u-boot \ 511 ${CROSS_COMPILE}size ${BUILD_DIR}/u-boot \
510 | tee -a ${LOG_DIR}/$target.MAKELOG 512 | tee -a ${LOG_DIR}/$target.MAKELOG
511 } 513 }
512 build_targets() { 514 build_targets() {
513 for t in "$@" ; do 515 for t in "$@" ; do
514 # If a LIST_xxx var exists, use it. But avoid variable 516 # If a LIST_xxx var exists, use it. But avoid variable
515 # expansion in the eval when a board name contains certain 517 # expansion in the eval when a board name contains certain
516 # characters that the shell interprets. 518 # characters that the shell interprets.
517 case ${t} in 519 case ${t} in
518 *[-+=]*) list= ;; 520 *[-+=]*) list= ;;
519 *) list=$(eval echo '${LIST_'$t'}') ;; 521 *) list=$(eval echo '${LIST_'$t'}') ;;
520 esac 522 esac
521 if [ -n "${list}" ] ; then 523 if [ -n "${list}" ] ; then
522 build_targets ${list} 524 build_targets ${list}
523 else 525 else
524 build_target ${t} 526 build_target ${t}
525 fi 527 fi
526 done 528 done
527 } 529 }
528 530
529 #----------------------------------------------------------------------- 531 #-----------------------------------------------------------------------
530 532
531 print_stats() { 533 print_stats() {
532 echo "" 534 echo ""
533 echo "--------------------- SUMMARY ----------------------------" 535 echo "--------------------- SUMMARY ----------------------------"
534 echo "Boards compiled: ${TOTAL_CNT}" 536 echo "Boards compiled: ${TOTAL_CNT}"
535 if [ ${ERR_CNT} -gt 0 ] ; then 537 if [ ${ERR_CNT} -gt 0 ] ; then
536 echo "Boards with warnings or errors: ${ERR_CNT} (${ERR_LIST} )" 538 echo "Boards with warnings or errors: ${ERR_CNT} (${ERR_LIST} )"
537 fi 539 fi
538 echo "----------------------------------------------------------" 540 echo "----------------------------------------------------------"
539 541
540 exit $RC 542 exit $RC
541 } 543 }
542 544
543 #----------------------------------------------------------------------- 545 #-----------------------------------------------------------------------
544 546
545 # Build target groups selected by options, plus any command line args 547 # Build target groups selected by options, plus any command line args
546 set -- ${SELECTED} "$@" 548 set -- ${SELECTED} "$@"
547 # run PowerPC by default 549 # run PowerPC by default
548 [ $# = 0 ] && set -- powerpc 550 [ $# = 0 ] && set -- powerpc
549 build_targets "$@" 551 build_targets "$@"
550 552
1 # 1 #
2 # (C) Copyright 2000 - 2011 2 # (C) Copyright 2000 - 2011
3 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. 3 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 # 4 #
5 # See file CREDITS for list of people who contributed to this 5 # See file CREDITS for list of people who contributed to this
6 # project. 6 # project.
7 # 7 #
8 # This program is free software; you can redistribute it and/or 8 # This program is free software; you can redistribute it and/or
9 # modify it under the terms of the GNU General Public License as 9 # modify it under the terms of the GNU General Public License as
10 # published by the Free Software Foundation; either version 2 of 10 # published by the Free Software Foundation; either version 2 of
11 # the License, or (at your option) any later version. 11 # the License, or (at your option) any later version.
12 # 12 #
13 # This program is distributed in the hope that it will be useful, 13 # This program is distributed in the hope that it will be useful,
14 # but WITHOUT ANY WARRANTY; without even the implied warranty of 14 # but WITHOUT ANY WARRANTY; without even the implied warranty of
15 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 # GNU General Public License for more details. 16 # GNU General Public License for more details.
17 # 17 #
18 # You should have received a copy of the GNU General Public License 18 # You should have received a copy of the GNU General Public License
19 # along with this program; if not, write to the Free Software 19 # along with this program; if not, write to the Free Software
20 # Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 # MA 02111-1307 USA 21 # MA 02111-1307 USA
22 # 22 #
23 23
24 Summary: 24 Summary:
25 ======== 25 ========
26 26
27 This directory contains the source code for U-Boot, a boot loader for 27 This directory contains the source code for U-Boot, a boot loader for
28 Embedded boards based on PowerPC, ARM, MIPS and several other 28 Embedded boards based on PowerPC, ARM, MIPS and several other
29 processors, which can be installed in a boot ROM and used to 29 processors, which can be installed in a boot ROM and used to
30 initialize and test the hardware or to download and run application 30 initialize and test the hardware or to download and run application
31 code. 31 code.
32 32
33 The development of U-Boot is closely related to Linux: some parts of 33 The development of U-Boot is closely related to Linux: some parts of
34 the source code originate in the Linux source tree, we have some 34 the source code originate in the Linux source tree, we have some
35 header files in common, and special provision has been made to 35 header files in common, and special provision has been made to
36 support booting of Linux images. 36 support booting of Linux images.
37 37
38 Some attention has been paid to make this software easily 38 Some attention has been paid to make this software easily
39 configurable and extendable. For instance, all monitor commands are 39 configurable and extendable. For instance, all monitor commands are
40 implemented with the same call interface, so that it's very easy to 40 implemented with the same call interface, so that it's very easy to
41 add new commands. Also, instead of permanently adding rarely used 41 add new commands. Also, instead of permanently adding rarely used
42 code (for instance hardware test utilities) to the monitor, you can 42 code (for instance hardware test utilities) to the monitor, you can
43 load and run it dynamically. 43 load and run it dynamically.
44 44
45 45
46 Status: 46 Status:
47 ======= 47 =======
48 48
49 In general, all boards for which a configuration option exists in the 49 In general, all boards for which a configuration option exists in the
50 Makefile have been tested to some extent and can be considered 50 Makefile have been tested to some extent and can be considered
51 "working". In fact, many of them are used in production systems. 51 "working". In fact, many of them are used in production systems.
52 52
53 In case of problems see the CHANGELOG and CREDITS files to find out 53 In case of problems see the CHANGELOG and CREDITS files to find out
54 who contributed the specific port. The MAINTAINERS file lists board 54 who contributed the specific port. The MAINTAINERS file lists board
55 maintainers. 55 maintainers.
56 56
57 57
58 Where to get help: 58 Where to get help:
59 ================== 59 ==================
60 60
61 In case you have questions about, problems with or contributions for 61 In case you have questions about, problems with or contributions for
62 U-Boot you should send a message to the U-Boot mailing list at 62 U-Boot you should send a message to the U-Boot mailing list at
63 <u-boot@lists.denx.de>. There is also an archive of previous traffic 63 <u-boot@lists.denx.de>. There is also an archive of previous traffic
64 on the mailing list - please search the archive before asking FAQ's. 64 on the mailing list - please search the archive before asking FAQ's.
65 Please see http://lists.denx.de/pipermail/u-boot and 65 Please see http://lists.denx.de/pipermail/u-boot and
66 http://dir.gmane.org/gmane.comp.boot-loaders.u-boot 66 http://dir.gmane.org/gmane.comp.boot-loaders.u-boot
67 67
68 68
69 Where to get source code: 69 Where to get source code:
70 ========================= 70 =========================
71 71
72 The U-Boot source code is maintained in the git repository at 72 The U-Boot source code is maintained in the git repository at
73 git://www.denx.de/git/u-boot.git ; you can browse it online at 73 git://www.denx.de/git/u-boot.git ; you can browse it online at
74 http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary 74 http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary
75 75
76 The "snapshot" links on this page allow you to download tarballs of 76 The "snapshot" links on this page allow you to download tarballs of
77 any version you might be interested in. Official releases are also 77 any version you might be interested in. Official releases are also
78 available for FTP download from the ftp://ftp.denx.de/pub/u-boot/ 78 available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
79 directory. 79 directory.
80 80
81 Pre-built (and tested) images are available from 81 Pre-built (and tested) images are available from
82 ftp://ftp.denx.de/pub/u-boot/images/ 82 ftp://ftp.denx.de/pub/u-boot/images/
83 83
84 84
85 Where we come from: 85 Where we come from:
86 =================== 86 ===================
87 87
88 - start from 8xxrom sources 88 - start from 8xxrom sources
89 - create PPCBoot project (http://sourceforge.net/projects/ppcboot) 89 - create PPCBoot project (http://sourceforge.net/projects/ppcboot)
90 - clean up code 90 - clean up code
91 - make it easier to add custom boards 91 - make it easier to add custom boards
92 - make it possible to add other [PowerPC] CPUs 92 - make it possible to add other [PowerPC] CPUs
93 - extend functions, especially: 93 - extend functions, especially:
94 * Provide extended interface to Linux boot loader 94 * Provide extended interface to Linux boot loader
95 * S-Record download 95 * S-Record download
96 * network boot 96 * network boot
97 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot 97 * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
98 - create ARMBoot project (http://sourceforge.net/projects/armboot) 98 - create ARMBoot project (http://sourceforge.net/projects/armboot)
99 - add other CPU families (starting with ARM) 99 - add other CPU families (starting with ARM)
100 - create U-Boot project (http://sourceforge.net/projects/u-boot) 100 - create U-Boot project (http://sourceforge.net/projects/u-boot)
101 - current project page: see http://www.denx.de/wiki/U-Boot 101 - current project page: see http://www.denx.de/wiki/U-Boot
102 102
103 103
104 Names and Spelling: 104 Names and Spelling:
105 =================== 105 ===================
106 106
107 The "official" name of this project is "Das U-Boot". The spelling 107 The "official" name of this project is "Das U-Boot". The spelling
108 "U-Boot" shall be used in all written text (documentation, comments 108 "U-Boot" shall be used in all written text (documentation, comments
109 in source files etc.). Example: 109 in source files etc.). Example:
110 110
111 This is the README file for the U-Boot project. 111 This is the README file for the U-Boot project.
112 112
113 File names etc. shall be based on the string "u-boot". Examples: 113 File names etc. shall be based on the string "u-boot". Examples:
114 114
115 include/asm-ppc/u-boot.h 115 include/asm-ppc/u-boot.h
116 116
117 #include <asm/u-boot.h> 117 #include <asm/u-boot.h>
118 118
119 Variable names, preprocessor constants etc. shall be either based on 119 Variable names, preprocessor constants etc. shall be either based on
120 the string "u_boot" or on "U_BOOT". Example: 120 the string "u_boot" or on "U_BOOT". Example:
121 121
122 U_BOOT_VERSION u_boot_logo 122 U_BOOT_VERSION u_boot_logo
123 IH_OS_U_BOOT u_boot_hush_start 123 IH_OS_U_BOOT u_boot_hush_start
124 124
125 125
126 Versioning: 126 Versioning:
127 =========== 127 ===========
128 128
129 Starting with the release in October 2008, the names of the releases 129 Starting with the release in October 2008, the names of the releases
130 were changed from numerical release numbers without deeper meaning 130 were changed from numerical release numbers without deeper meaning
131 into a time stamp based numbering. Regular releases are identified by 131 into a time stamp based numbering. Regular releases are identified by
132 names consisting of the calendar year and month of the release date. 132 names consisting of the calendar year and month of the release date.
133 Additional fields (if present) indicate release candidates or bug fix 133 Additional fields (if present) indicate release candidates or bug fix
134 releases in "stable" maintenance trees. 134 releases in "stable" maintenance trees.
135 135
136 Examples: 136 Examples:
137 U-Boot v2009.11 - Release November 2009 137 U-Boot v2009.11 - Release November 2009
138 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree 138 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
139 U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release 139 U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release
140 140
141 141
142 Directory Hierarchy: 142 Directory Hierarchy:
143 ==================== 143 ====================
144 144
145 /arch Architecture specific files 145 /arch Architecture specific files
146 /arm Files generic to ARM architecture 146 /arm Files generic to ARM architecture
147 /cpu CPU specific files 147 /cpu CPU specific files
148 /arm720t Files specific to ARM 720 CPUs 148 /arm720t Files specific to ARM 720 CPUs
149 /arm920t Files specific to ARM 920 CPUs 149 /arm920t Files specific to ARM 920 CPUs
150 /at91 Files specific to Atmel AT91RM9200 CPU 150 /at91 Files specific to Atmel AT91RM9200 CPU
151 /imx Files specific to Freescale MC9328 i.MX CPUs 151 /imx Files specific to Freescale MC9328 i.MX CPUs
152 /s3c24x0 Files specific to Samsung S3C24X0 CPUs 152 /s3c24x0 Files specific to Samsung S3C24X0 CPUs
153 /arm925t Files specific to ARM 925 CPUs 153 /arm925t Files specific to ARM 925 CPUs
154 /arm926ejs Files specific to ARM 926 CPUs 154 /arm926ejs Files specific to ARM 926 CPUs
155 /arm1136 Files specific to ARM 1136 CPUs 155 /arm1136 Files specific to ARM 1136 CPUs
156 /ixp Files specific to Intel XScale IXP CPUs 156 /ixp Files specific to Intel XScale IXP CPUs
157 /pxa Files specific to Intel XScale PXA CPUs 157 /pxa Files specific to Intel XScale PXA CPUs
158 /s3c44b0 Files specific to Samsung S3C44B0 CPUs 158 /s3c44b0 Files specific to Samsung S3C44B0 CPUs
159 /sa1100 Files specific to Intel StrongARM SA1100 CPUs 159 /sa1100 Files specific to Intel StrongARM SA1100 CPUs
160 /lib Architecture specific library files 160 /lib Architecture specific library files
161 /avr32 Files generic to AVR32 architecture 161 /avr32 Files generic to AVR32 architecture
162 /cpu CPU specific files 162 /cpu CPU specific files
163 /lib Architecture specific library files 163 /lib Architecture specific library files
164 /blackfin Files generic to Analog Devices Blackfin architecture 164 /blackfin Files generic to Analog Devices Blackfin architecture
165 /cpu CPU specific files 165 /cpu CPU specific files
166 /lib Architecture specific library files 166 /lib Architecture specific library files
167 /x86 Files generic to x86 architecture 167 /x86 Files generic to x86 architecture
168 /cpu CPU specific files 168 /cpu CPU specific files
169 /lib Architecture specific library files 169 /lib Architecture specific library files
170 /m68k Files generic to m68k architecture 170 /m68k Files generic to m68k architecture
171 /cpu CPU specific files 171 /cpu CPU specific files
172 /mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs 172 /mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
173 /mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs 173 /mcf5227x Files specific to Freescale ColdFire MCF5227x CPUs
174 /mcf532x Files specific to Freescale ColdFire MCF5329 CPUs 174 /mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
175 /mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs 175 /mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs
176 /mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs 176 /mcf547x_8x Files specific to Freescale ColdFire MCF547x_8x CPUs
177 /lib Architecture specific library files 177 /lib Architecture specific library files
178 /microblaze Files generic to microblaze architecture 178 /microblaze Files generic to microblaze architecture
179 /cpu CPU specific files 179 /cpu CPU specific files
180 /lib Architecture specific library files 180 /lib Architecture specific library files
181 /mips Files generic to MIPS architecture 181 /mips Files generic to MIPS architecture
182 /cpu CPU specific files 182 /cpu CPU specific files
183 /mips32 Files specific to MIPS32 CPUs 183 /mips32 Files specific to MIPS32 CPUs
184 /xburst Files specific to Ingenic XBurst CPUs
184 /lib Architecture specific library files 185 /lib Architecture specific library files
185 /nios2 Files generic to Altera NIOS2 architecture 186 /nios2 Files generic to Altera NIOS2 architecture
186 /cpu CPU specific files 187 /cpu CPU specific files
187 /lib Architecture specific library files 188 /lib Architecture specific library files
188 /powerpc Files generic to PowerPC architecture 189 /powerpc Files generic to PowerPC architecture
189 /cpu CPU specific files 190 /cpu CPU specific files
190 /74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs 191 /74xx_7xx Files specific to Freescale MPC74xx and 7xx CPUs
191 /mpc5xx Files specific to Freescale MPC5xx CPUs 192 /mpc5xx Files specific to Freescale MPC5xx CPUs
192 /mpc5xxx Files specific to Freescale MPC5xxx CPUs 193 /mpc5xxx Files specific to Freescale MPC5xxx CPUs
193 /mpc8xx Files specific to Freescale MPC8xx CPUs 194 /mpc8xx Files specific to Freescale MPC8xx CPUs
194 /mpc8220 Files specific to Freescale MPC8220 CPUs 195 /mpc8220 Files specific to Freescale MPC8220 CPUs
195 /mpc824x Files specific to Freescale MPC824x CPUs 196 /mpc824x Files specific to Freescale MPC824x CPUs
196 /mpc8260 Files specific to Freescale MPC8260 CPUs 197 /mpc8260 Files specific to Freescale MPC8260 CPUs
197 /mpc85xx Files specific to Freescale MPC85xx CPUs 198 /mpc85xx Files specific to Freescale MPC85xx CPUs
198 /ppc4xx Files specific to AMCC PowerPC 4xx CPUs 199 /ppc4xx Files specific to AMCC PowerPC 4xx CPUs
199 /lib Architecture specific library files 200 /lib Architecture specific library files
200 /sh Files generic to SH architecture 201 /sh Files generic to SH architecture
201 /cpu CPU specific files 202 /cpu CPU specific files
202 /sh2 Files specific to sh2 CPUs 203 /sh2 Files specific to sh2 CPUs
203 /sh3 Files specific to sh3 CPUs 204 /sh3 Files specific to sh3 CPUs
204 /sh4 Files specific to sh4 CPUs 205 /sh4 Files specific to sh4 CPUs
205 /lib Architecture specific library files 206 /lib Architecture specific library files
206 /sparc Files generic to SPARC architecture 207 /sparc Files generic to SPARC architecture
207 /cpu CPU specific files 208 /cpu CPU specific files
208 /leon2 Files specific to Gaisler LEON2 SPARC CPU 209 /leon2 Files specific to Gaisler LEON2 SPARC CPU
209 /leon3 Files specific to Gaisler LEON3 SPARC CPU 210 /leon3 Files specific to Gaisler LEON3 SPARC CPU
210 /lib Architecture specific library files 211 /lib Architecture specific library files
211 /api Machine/arch independent API for external apps 212 /api Machine/arch independent API for external apps
212 /board Board dependent files 213 /board Board dependent files
213 /common Misc architecture independent functions 214 /common Misc architecture independent functions
214 /disk Code for disk drive partition handling 215 /disk Code for disk drive partition handling
215 /doc Documentation (don't expect too much) 216 /doc Documentation (don't expect too much)
216 /drivers Commonly used device drivers 217 /drivers Commonly used device drivers
217 /examples Example code for standalone applications, etc. 218 /examples Example code for standalone applications, etc.
218 /fs Filesystem code (cramfs, ext2, jffs2, etc.) 219 /fs Filesystem code (cramfs, ext2, jffs2, etc.)
219 /include Header Files 220 /include Header Files
220 /lib Files generic to all architectures 221 /lib Files generic to all architectures
221 /libfdt Library files to support flattened device trees 222 /libfdt Library files to support flattened device trees
222 /lzma Library files to support LZMA decompression 223 /lzma Library files to support LZMA decompression
223 /lzo Library files to support LZO decompression 224 /lzo Library files to support LZO decompression
224 /net Networking code 225 /net Networking code
225 /post Power On Self Test 226 /post Power On Self Test
226 /rtc Real Time Clock drivers 227 /rtc Real Time Clock drivers
227 /tools Tools to build S-Record or U-Boot images, etc. 228 /tools Tools to build S-Record or U-Boot images, etc.
228 229
229 Software Configuration: 230 Software Configuration:
230 ======================= 231 =======================
231 232
232 Configuration is usually done using C preprocessor defines; the 233 Configuration is usually done using C preprocessor defines; the
233 rationale behind that is to avoid dead code whenever possible. 234 rationale behind that is to avoid dead code whenever possible.
234 235
235 There are two classes of configuration variables: 236 There are two classes of configuration variables:
236 237
237 * Configuration _OPTIONS_: 238 * Configuration _OPTIONS_:
238 These are selectable by the user and have names beginning with 239 These are selectable by the user and have names beginning with
239 "CONFIG_". 240 "CONFIG_".
240 241
241 * Configuration _SETTINGS_: 242 * Configuration _SETTINGS_:
242 These depend on the hardware etc. and should not be meddled with if 243 These depend on the hardware etc. and should not be meddled with if
243 you don't know what you're doing; they have names beginning with 244 you don't know what you're doing; they have names beginning with
244 "CONFIG_SYS_". 245 "CONFIG_SYS_".
245 246
246 Later we will add a configuration tool - probably similar to or even 247 Later we will add a configuration tool - probably similar to or even
247 identical to what's used for the Linux kernel. Right now, we have to 248 identical to what's used for the Linux kernel. Right now, we have to
248 do the configuration by hand, which means creating some symbolic 249 do the configuration by hand, which means creating some symbolic
249 links and editing some configuration files. We use the TQM8xxL boards 250 links and editing some configuration files. We use the TQM8xxL boards
250 as an example here. 251 as an example here.
251 252
252 253
253 Selection of Processor Architecture and Board Type: 254 Selection of Processor Architecture and Board Type:
254 --------------------------------------------------- 255 ---------------------------------------------------
255 256
256 For all supported boards there are ready-to-use default 257 For all supported boards there are ready-to-use default
257 configurations available; just type "make <board_name>_config". 258 configurations available; just type "make <board_name>_config".
258 259
259 Example: For a TQM823L module type: 260 Example: For a TQM823L module type:
260 261
261 cd u-boot 262 cd u-boot
262 make TQM823L_config 263 make TQM823L_config
263 264
264 For the Cogent platform, you need to specify the CPU type as well; 265 For the Cogent platform, you need to specify the CPU type as well;
265 e.g. "make cogent_mpc8xx_config". And also configure the cogent 266 e.g. "make cogent_mpc8xx_config". And also configure the cogent
266 directory according to the instructions in cogent/README. 267 directory according to the instructions in cogent/README.
267 268
268 269
269 Configuration Options: 270 Configuration Options:
270 ---------------------- 271 ----------------------
271 272
272 Configuration depends on the combination of board and CPU type; all 273 Configuration depends on the combination of board and CPU type; all
273 such information is kept in a configuration file 274 such information is kept in a configuration file
274 "include/configs/<board_name>.h". 275 "include/configs/<board_name>.h".
275 276
276 Example: For a TQM823L module, all configuration settings are in 277 Example: For a TQM823L module, all configuration settings are in
277 "include/configs/TQM823L.h". 278 "include/configs/TQM823L.h".
278 279
279 280
280 Many of the options are named exactly as the corresponding Linux 281 Many of the options are named exactly as the corresponding Linux
281 kernel configuration options. The intention is to make it easier to 282 kernel configuration options. The intention is to make it easier to
282 build a config tool - later. 283 build a config tool - later.
283 284
284 285
285 The following options need to be configured: 286 The following options need to be configured:
286 287
287 - CPU Type: Define exactly one, e.g. CONFIG_MPC85XX. 288 - CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
288 289
289 - Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS. 290 - Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
290 291
291 - CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined) 292 - CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
292 Define exactly one, e.g. CONFIG_ATSTK1002 293 Define exactly one, e.g. CONFIG_ATSTK1002
293 294
294 - CPU Module Type: (if CONFIG_COGENT is defined) 295 - CPU Module Type: (if CONFIG_COGENT is defined)
295 Define exactly one of 296 Define exactly one of
296 CONFIG_CMA286_60_OLD 297 CONFIG_CMA286_60_OLD
297 --- FIXME --- not tested yet: 298 --- FIXME --- not tested yet:
298 CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P, 299 CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P,
299 CONFIG_CMA287_23, CONFIG_CMA287_50 300 CONFIG_CMA287_23, CONFIG_CMA287_50
300 301
301 - Motherboard Type: (if CONFIG_COGENT is defined) 302 - Motherboard Type: (if CONFIG_COGENT is defined)
302 Define exactly one of 303 Define exactly one of
303 CONFIG_CMA101, CONFIG_CMA102 304 CONFIG_CMA101, CONFIG_CMA102
304 305
305 - Motherboard I/O Modules: (if CONFIG_COGENT is defined) 306 - Motherboard I/O Modules: (if CONFIG_COGENT is defined)
306 Define one or more of 307 Define one or more of
307 CONFIG_CMA302 308 CONFIG_CMA302
308 309
309 - Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined) 310 - Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined)
310 Define one or more of 311 Define one or more of
311 CONFIG_LCD_HEARTBEAT - update a character position on 312 CONFIG_LCD_HEARTBEAT - update a character position on
312 the LCD display every second with 313 the LCD display every second with
313 a "rotator" |\-/|\-/ 314 a "rotator" |\-/|\-/
314 315
315 - Board flavour: (if CONFIG_MPC8260ADS is defined) 316 - Board flavour: (if CONFIG_MPC8260ADS is defined)
316 CONFIG_ADSTYPE 317 CONFIG_ADSTYPE
317 Possible values are: 318 Possible values are:
318 CONFIG_SYS_8260ADS - original MPC8260ADS 319 CONFIG_SYS_8260ADS - original MPC8260ADS
319 CONFIG_SYS_8266ADS - MPC8266ADS 320 CONFIG_SYS_8266ADS - MPC8266ADS
320 CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR 321 CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR
321 CONFIG_SYS_8272ADS - MPC8272ADS 322 CONFIG_SYS_8272ADS - MPC8272ADS
322 323
323 - Marvell Family Member 324 - Marvell Family Member
324 CONFIG_SYS_MVFS - define it if you want to enable 325 CONFIG_SYS_MVFS - define it if you want to enable
325 multiple fs option at one time 326 multiple fs option at one time
326 for marvell soc family 327 for marvell soc family
327 328
328 - MPC824X Family Member (if CONFIG_MPC824X is defined) 329 - MPC824X Family Member (if CONFIG_MPC824X is defined)
329 Define exactly one of 330 Define exactly one of
330 CONFIG_MPC8240, CONFIG_MPC8245 331 CONFIG_MPC8240, CONFIG_MPC8245
331 332
332 - 8xx CPU Options: (if using an MPC8xx CPU) 333 - 8xx CPU Options: (if using an MPC8xx CPU)
333 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if 334 CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if
334 get_gclk_freq() cannot work 335 get_gclk_freq() cannot work
335 e.g. if there is no 32KHz 336 e.g. if there is no 32KHz
336 reference PIT/RTC clock 337 reference PIT/RTC clock
337 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK 338 CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK
338 or XTAL/EXTAL) 339 or XTAL/EXTAL)
339 340
340 - 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU): 341 - 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU):
341 CONFIG_SYS_8xx_CPUCLK_MIN 342 CONFIG_SYS_8xx_CPUCLK_MIN
342 CONFIG_SYS_8xx_CPUCLK_MAX 343 CONFIG_SYS_8xx_CPUCLK_MAX
343 CONFIG_8xx_CPUCLK_DEFAULT 344 CONFIG_8xx_CPUCLK_DEFAULT
344 See doc/README.MPC866 345 See doc/README.MPC866
345 346
346 CONFIG_SYS_MEASURE_CPUCLK 347 CONFIG_SYS_MEASURE_CPUCLK
347 348
348 Define this to measure the actual CPU clock instead 349 Define this to measure the actual CPU clock instead
349 of relying on the correctness of the configured 350 of relying on the correctness of the configured
350 values. Mostly useful for board bringup to make sure 351 values. Mostly useful for board bringup to make sure
351 the PLL is locked at the intended frequency. Note 352 the PLL is locked at the intended frequency. Note
352 that this requires a (stable) reference clock (32 kHz 353 that this requires a (stable) reference clock (32 kHz
353 RTC clock or CONFIG_SYS_8XX_XIN) 354 RTC clock or CONFIG_SYS_8XX_XIN)
354 355
355 CONFIG_SYS_DELAYED_ICACHE 356 CONFIG_SYS_DELAYED_ICACHE
356 357
357 Define this option if you want to enable the 358 Define this option if you want to enable the
358 ICache only when Code runs from RAM. 359 ICache only when Code runs from RAM.
359 360
360 - 85xx CPU Options: 361 - 85xx CPU Options:
361 CONFIG_SYS_FSL_TBCLK_DIV 362 CONFIG_SYS_FSL_TBCLK_DIV
362 363
363 Defines the core time base clock divider ratio compared to the 364 Defines the core time base clock divider ratio compared to the
364 system clock. On most PQ3 devices this is 8, on newer QorIQ 365 system clock. On most PQ3 devices this is 8, on newer QorIQ
365 devices it can be 16 or 32. The ratio varies from SoC to Soc. 366 devices it can be 16 or 32. The ratio varies from SoC to Soc.
366 367
367 CONFIG_SYS_FSL_PCIE_COMPAT 368 CONFIG_SYS_FSL_PCIE_COMPAT
368 369
369 Defines the string to utilize when trying to match PCIe device 370 Defines the string to utilize when trying to match PCIe device
370 tree nodes for the given platform. 371 tree nodes for the given platform.
371 372
372 - Intel Monahans options: 373 - Intel Monahans options:
373 CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO 374 CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
374 375
375 Defines the Monahans run mode to oscillator 376 Defines the Monahans run mode to oscillator
376 ratio. Valid values are 8, 16, 24, 31. The core 377 ratio. Valid values are 8, 16, 24, 31. The core
377 frequency is this value multiplied by 13 MHz. 378 frequency is this value multiplied by 13 MHz.
378 379
379 CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO 380 CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO
380 381
381 Defines the Monahans turbo mode to oscillator 382 Defines the Monahans turbo mode to oscillator
382 ratio. Valid values are 1 (default if undefined) and 383 ratio. Valid values are 1 (default if undefined) and
383 2. The core frequency as calculated above is multiplied 384 2. The core frequency as calculated above is multiplied
384 by this value. 385 by this value.
385 386
386 - MIPS CPU options: 387 - MIPS CPU options:
387 CONFIG_SYS_INIT_SP_OFFSET 388 CONFIG_SYS_INIT_SP_OFFSET
388 389
389 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack 390 Offset relative to CONFIG_SYS_SDRAM_BASE for initial stack
390 pointer. This is needed for the temporary stack before 391 pointer. This is needed for the temporary stack before
391 relocation. 392 relocation.
392 393
393 CONFIG_SYS_MIPS_CACHE_MODE 394 CONFIG_SYS_MIPS_CACHE_MODE
394 395
395 Cache operation mode for the MIPS CPU. 396 Cache operation mode for the MIPS CPU.
396 See also arch/mips/include/asm/mipsregs.h. 397 See also arch/mips/include/asm/mipsregs.h.
397 Possible values are: 398 Possible values are:
398 CONF_CM_CACHABLE_NO_WA 399 CONF_CM_CACHABLE_NO_WA
399 CONF_CM_CACHABLE_WA 400 CONF_CM_CACHABLE_WA
400 CONF_CM_UNCACHED 401 CONF_CM_UNCACHED
401 CONF_CM_CACHABLE_NONCOHERENT 402 CONF_CM_CACHABLE_NONCOHERENT
402 CONF_CM_CACHABLE_CE 403 CONF_CM_CACHABLE_CE
403 CONF_CM_CACHABLE_COW 404 CONF_CM_CACHABLE_COW
404 CONF_CM_CACHABLE_CUW 405 CONF_CM_CACHABLE_CUW
405 CONF_CM_CACHABLE_ACCELERATED 406 CONF_CM_CACHABLE_ACCELERATED
406 407
407 CONFIG_SYS_XWAY_EBU_BOOTCFG 408 CONFIG_SYS_XWAY_EBU_BOOTCFG
408 409
409 Special option for Lantiq XWAY SoCs for booting from NOR flash. 410 Special option for Lantiq XWAY SoCs for booting from NOR flash.
410 See also arch/mips/cpu/mips32/start.S. 411 See also arch/mips/cpu/mips32/start.S.
411 412
412 CONFIG_XWAY_SWAP_BYTES 413 CONFIG_XWAY_SWAP_BYTES
413 414
414 Enable compilation of tools/xway-swap-bytes needed for Lantiq 415 Enable compilation of tools/xway-swap-bytes needed for Lantiq
415 XWAY SoCs for booting from NOR flash. The U-Boot image needs to 416 XWAY SoCs for booting from NOR flash. The U-Boot image needs to
416 be swapped if a flash programmer is used. 417 be swapped if a flash programmer is used.
417 418
418 - Linux Kernel Interface: 419 - Linux Kernel Interface:
419 CONFIG_CLOCKS_IN_MHZ 420 CONFIG_CLOCKS_IN_MHZ
420 421
421 U-Boot stores all clock information in Hz 422 U-Boot stores all clock information in Hz
422 internally. For binary compatibility with older Linux 423 internally. For binary compatibility with older Linux
423 kernels (which expect the clocks passed in the 424 kernels (which expect the clocks passed in the
424 bd_info data to be in MHz) the environment variable 425 bd_info data to be in MHz) the environment variable
425 "clocks_in_mhz" can be defined so that U-Boot 426 "clocks_in_mhz" can be defined so that U-Boot
426 converts clock data to MHZ before passing it to the 427 converts clock data to MHZ before passing it to the
427 Linux kernel. 428 Linux kernel.
428 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of 429 When CONFIG_CLOCKS_IN_MHZ is defined, a definition of
429 "clocks_in_mhz=1" is automatically included in the 430 "clocks_in_mhz=1" is automatically included in the
430 default environment. 431 default environment.
431 432
432 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only] 433 CONFIG_MEMSIZE_IN_BYTES [relevant for MIPS only]
433 434
434 When transferring memsize parameter to linux, some versions 435 When transferring memsize parameter to linux, some versions
435 expect it to be in bytes, others in MB. 436 expect it to be in bytes, others in MB.
436 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes. 437 Define CONFIG_MEMSIZE_IN_BYTES to make it in bytes.
437 438
438 CONFIG_OF_LIBFDT 439 CONFIG_OF_LIBFDT
439 440
440 New kernel versions are expecting firmware settings to be 441 New kernel versions are expecting firmware settings to be
441 passed using flattened device trees (based on open firmware 442 passed using flattened device trees (based on open firmware
442 concepts). 443 concepts).
443 444
444 CONFIG_OF_LIBFDT 445 CONFIG_OF_LIBFDT
445 * New libfdt-based support 446 * New libfdt-based support
446 * Adds the "fdt" command 447 * Adds the "fdt" command
447 * The bootm command automatically updates the fdt 448 * The bootm command automatically updates the fdt
448 449
449 OF_CPU - The proper name of the cpus node (only required for 450 OF_CPU - The proper name of the cpus node (only required for
450 MPC512X and MPC5xxx based boards). 451 MPC512X and MPC5xxx based boards).
451 OF_SOC - The proper name of the soc node (only required for 452 OF_SOC - The proper name of the soc node (only required for
452 MPC512X and MPC5xxx based boards). 453 MPC512X and MPC5xxx based boards).
453 OF_TBCLK - The timebase frequency. 454 OF_TBCLK - The timebase frequency.
454 OF_STDOUT_PATH - The path to the console device 455 OF_STDOUT_PATH - The path to the console device
455 456
456 boards with QUICC Engines require OF_QE to set UCC MAC 457 boards with QUICC Engines require OF_QE to set UCC MAC
457 addresses 458 addresses
458 459
459 CONFIG_OF_BOARD_SETUP 460 CONFIG_OF_BOARD_SETUP
460 461
461 Board code has addition modification that it wants to make 462 Board code has addition modification that it wants to make
462 to the flat device tree before handing it off to the kernel 463 to the flat device tree before handing it off to the kernel
463 464
464 CONFIG_OF_BOOT_CPU 465 CONFIG_OF_BOOT_CPU
465 466
466 This define fills in the correct boot CPU in the boot 467 This define fills in the correct boot CPU in the boot
467 param header, the default value is zero if undefined. 468 param header, the default value is zero if undefined.
468 469
469 CONFIG_OF_IDE_FIXUP 470 CONFIG_OF_IDE_FIXUP
470 471
471 U-Boot can detect if an IDE device is present or not. 472 U-Boot can detect if an IDE device is present or not.
472 If not, and this new config option is activated, U-Boot 473 If not, and this new config option is activated, U-Boot
473 removes the ATA node from the DTS before booting Linux, 474 removes the ATA node from the DTS before booting Linux,
474 so the Linux IDE driver does not probe the device and 475 so the Linux IDE driver does not probe the device and
475 crash. This is needed for buggy hardware (uc101) where 476 crash. This is needed for buggy hardware (uc101) where
476 no pull down resistor is connected to the signal IDE5V_DD7. 477 no pull down resistor is connected to the signal IDE5V_DD7.
477 478
478 CONFIG_MACH_TYPE [relevant for ARM only][mandatory] 479 CONFIG_MACH_TYPE [relevant for ARM only][mandatory]
479 480
480 This setting is mandatory for all boards that have only one 481 This setting is mandatory for all boards that have only one
481 machine type and must be used to specify the machine type 482 machine type and must be used to specify the machine type
482 number as it appears in the ARM machine registry 483 number as it appears in the ARM machine registry
483 (see http://www.arm.linux.org.uk/developer/machines/). 484 (see http://www.arm.linux.org.uk/developer/machines/).
484 Only boards that have multiple machine types supported 485 Only boards that have multiple machine types supported
485 in a single configuration file and the machine type is 486 in a single configuration file and the machine type is
486 runtime discoverable, do not have to use this setting. 487 runtime discoverable, do not have to use this setting.
487 488
488 - vxWorks boot parameters: 489 - vxWorks boot parameters:
489 490
490 bootvx constructs a valid bootline using the following 491 bootvx constructs a valid bootline using the following
491 environments variables: bootfile, ipaddr, serverip, hostname. 492 environments variables: bootfile, ipaddr, serverip, hostname.
492 It loads the vxWorks image pointed bootfile. 493 It loads the vxWorks image pointed bootfile.
493 494
494 CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name 495 CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name
495 CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address 496 CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address
496 CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server 497 CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server
497 CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters 498 CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters
498 499
499 CONFIG_SYS_VXWORKS_ADD_PARAMS 500 CONFIG_SYS_VXWORKS_ADD_PARAMS
500 501
501 Add it at the end of the bootline. E.g "u=username pw=secret" 502 Add it at the end of the bootline. E.g "u=username pw=secret"
502 503
503 Note: If a "bootargs" environment is defined, it will overwride 504 Note: If a "bootargs" environment is defined, it will overwride
504 the defaults discussed just above. 505 the defaults discussed just above.
505 506
506 - Cache Configuration: 507 - Cache Configuration:
507 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot 508 CONFIG_SYS_ICACHE_OFF - Do not enable instruction cache in U-Boot
508 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot 509 CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot
509 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot 510 CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot
510 511
511 - Cache Configuration for ARM: 512 - Cache Configuration for ARM:
512 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache 513 CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache
513 controller 514 controller
514 CONFIG_SYS_PL310_BASE - Physical base address of PL310 515 CONFIG_SYS_PL310_BASE - Physical base address of PL310
515 controller register space 516 controller register space
516 517
517 - Serial Ports: 518 - Serial Ports:
518 CONFIG_PL010_SERIAL 519 CONFIG_PL010_SERIAL
519 520
520 Define this if you want support for Amba PrimeCell PL010 UARTs. 521 Define this if you want support for Amba PrimeCell PL010 UARTs.
521 522
522 CONFIG_PL011_SERIAL 523 CONFIG_PL011_SERIAL
523 524
524 Define this if you want support for Amba PrimeCell PL011 UARTs. 525 Define this if you want support for Amba PrimeCell PL011 UARTs.
525 526
526 CONFIG_PL011_CLOCK 527 CONFIG_PL011_CLOCK
527 528
528 If you have Amba PrimeCell PL011 UARTs, set this variable to 529 If you have Amba PrimeCell PL011 UARTs, set this variable to
529 the clock speed of the UARTs. 530 the clock speed of the UARTs.
530 531
531 CONFIG_PL01x_PORTS 532 CONFIG_PL01x_PORTS
532 533
533 If you have Amba PrimeCell PL010 or PL011 UARTs on your board, 534 If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
534 define this to a list of base addresses for each (supported) 535 define this to a list of base addresses for each (supported)
535 port. See e.g. include/configs/versatile.h 536 port. See e.g. include/configs/versatile.h
536 537
537 CONFIG_PL011_SERIAL_RLCR 538 CONFIG_PL011_SERIAL_RLCR
538 539
539 Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500) 540 Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
540 have separate receive and transmit line control registers. Set 541 have separate receive and transmit line control registers. Set
541 this variable to initialize the extra register. 542 this variable to initialize the extra register.
542 543
543 CONFIG_PL011_SERIAL_FLUSH_ON_INIT 544 CONFIG_PL011_SERIAL_FLUSH_ON_INIT
544 545
545 On some platforms (e.g. U8500) U-Boot is loaded by a second stage 546 On some platforms (e.g. U8500) U-Boot is loaded by a second stage
546 boot loader that has already initialized the UART. Define this 547 boot loader that has already initialized the UART. Define this
547 variable to flush the UART at init time. 548 variable to flush the UART at init time.
548 549
549 550
550 - Console Interface: 551 - Console Interface:
551 Depending on board, define exactly one serial port 552 Depending on board, define exactly one serial port
552 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2, 553 (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2,
553 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial 554 CONFIG_8xx_CONS_SCC1, ...), or switch off the serial
554 console by defining CONFIG_8xx_CONS_NONE 555 console by defining CONFIG_8xx_CONS_NONE
555 556
556 Note: if CONFIG_8xx_CONS_NONE is defined, the serial 557 Note: if CONFIG_8xx_CONS_NONE is defined, the serial
557 port routines must be defined elsewhere 558 port routines must be defined elsewhere
558 (i.e. serial_init(), serial_getc(), ...) 559 (i.e. serial_init(), serial_getc(), ...)
559 560
560 CONFIG_CFB_CONSOLE 561 CONFIG_CFB_CONSOLE
561 Enables console device for a color framebuffer. Needs following 562 Enables console device for a color framebuffer. Needs following
562 defines (cf. smiLynxEM, i8042, board/eltec/bab7xx) 563 defines (cf. smiLynxEM, i8042, board/eltec/bab7xx)
563 VIDEO_FB_LITTLE_ENDIAN graphic memory organisation 564 VIDEO_FB_LITTLE_ENDIAN graphic memory organisation
564 (default big endian) 565 (default big endian)
565 VIDEO_HW_RECTFILL graphic chip supports 566 VIDEO_HW_RECTFILL graphic chip supports
566 rectangle fill 567 rectangle fill
567 (cf. smiLynxEM) 568 (cf. smiLynxEM)
568 VIDEO_HW_BITBLT graphic chip supports 569 VIDEO_HW_BITBLT graphic chip supports
569 bit-blit (cf. smiLynxEM) 570 bit-blit (cf. smiLynxEM)
570 VIDEO_VISIBLE_COLS visible pixel columns 571 VIDEO_VISIBLE_COLS visible pixel columns
571 (cols=pitch) 572 (cols=pitch)
572 VIDEO_VISIBLE_ROWS visible pixel rows 573 VIDEO_VISIBLE_ROWS visible pixel rows
573 VIDEO_PIXEL_SIZE bytes per pixel 574 VIDEO_PIXEL_SIZE bytes per pixel
574 VIDEO_DATA_FORMAT graphic data format 575 VIDEO_DATA_FORMAT graphic data format
575 (0-5, cf. cfb_console.c) 576 (0-5, cf. cfb_console.c)
576 VIDEO_FB_ADRS framebuffer address 577 VIDEO_FB_ADRS framebuffer address
577 VIDEO_KBD_INIT_FCT keyboard int fct 578 VIDEO_KBD_INIT_FCT keyboard int fct
578 (i.e. i8042_kbd_init()) 579 (i.e. i8042_kbd_init())
579 VIDEO_TSTC_FCT test char fct 580 VIDEO_TSTC_FCT test char fct
580 (i.e. i8042_tstc) 581 (i.e. i8042_tstc)
581 VIDEO_GETC_FCT get char fct 582 VIDEO_GETC_FCT get char fct
582 (i.e. i8042_getc) 583 (i.e. i8042_getc)
583 CONFIG_CONSOLE_CURSOR cursor drawing on/off 584 CONFIG_CONSOLE_CURSOR cursor drawing on/off
584 (requires blink timer 585 (requires blink timer
585 cf. i8042.c) 586 cf. i8042.c)
586 CONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c) 587 CONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)
587 CONFIG_CONSOLE_TIME display time/date info in 588 CONFIG_CONSOLE_TIME display time/date info in
588 upper right corner 589 upper right corner
589 (requires CONFIG_CMD_DATE) 590 (requires CONFIG_CMD_DATE)
590 CONFIG_VIDEO_LOGO display Linux logo in 591 CONFIG_VIDEO_LOGO display Linux logo in
591 upper left corner 592 upper left corner
592 CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of 593 CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of
593 linux_logo.h for logo. 594 linux_logo.h for logo.
594 Requires CONFIG_VIDEO_LOGO 595 Requires CONFIG_VIDEO_LOGO
595 CONFIG_CONSOLE_EXTRA_INFO 596 CONFIG_CONSOLE_EXTRA_INFO
596 additional board info beside 597 additional board info beside
597 the logo 598 the logo
598 599
599 When CONFIG_CFB_CONSOLE is defined, video console is 600 When CONFIG_CFB_CONSOLE is defined, video console is
600 default i/o. Serial console can be forced with 601 default i/o. Serial console can be forced with
601 environment 'console=serial'. 602 environment 'console=serial'.
602 603
603 When CONFIG_SILENT_CONSOLE is defined, all console 604 When CONFIG_SILENT_CONSOLE is defined, all console
604 messages (by U-Boot and Linux!) can be silenced with 605 messages (by U-Boot and Linux!) can be silenced with
605 the "silent" environment variable. See 606 the "silent" environment variable. See
606 doc/README.silent for more information. 607 doc/README.silent for more information.
607 608
608 - Console Baudrate: 609 - Console Baudrate:
609 CONFIG_BAUDRATE - in bps 610 CONFIG_BAUDRATE - in bps
610 Select one of the baudrates listed in 611 Select one of the baudrates listed in
611 CONFIG_SYS_BAUDRATE_TABLE, see below. 612 CONFIG_SYS_BAUDRATE_TABLE, see below.
612 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale 613 CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale
613 614
614 - Console Rx buffer length 615 - Console Rx buffer length
615 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define 616 With CONFIG_SYS_SMC_RXBUFLEN it is possible to define
616 the maximum receive buffer length for the SMC. 617 the maximum receive buffer length for the SMC.
617 This option is actual only for 82xx and 8xx possible. 618 This option is actual only for 82xx and 8xx possible.
618 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE 619 If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE
619 must be defined, to setup the maximum idle timeout for 620 must be defined, to setup the maximum idle timeout for
620 the SMC. 621 the SMC.
621 622
622 - Pre-Console Buffer: 623 - Pre-Console Buffer:
623 Prior to the console being initialised (i.e. serial UART 624 Prior to the console being initialised (i.e. serial UART
624 initialised etc) all console output is silently discarded. 625 initialised etc) all console output is silently discarded.
625 Defining CONFIG_PRE_CONSOLE_BUFFER will cause U-Boot to 626 Defining CONFIG_PRE_CONSOLE_BUFFER will cause U-Boot to
626 buffer any console messages prior to the console being 627 buffer any console messages prior to the console being
627 initialised to a buffer of size CONFIG_PRE_CON_BUF_SZ 628 initialised to a buffer of size CONFIG_PRE_CON_BUF_SZ
628 bytes located at CONFIG_PRE_CON_BUF_ADDR. The buffer is 629 bytes located at CONFIG_PRE_CON_BUF_ADDR. The buffer is
629 a circular buffer, so if more than CONFIG_PRE_CON_BUF_SZ 630 a circular buffer, so if more than CONFIG_PRE_CON_BUF_SZ
630 bytes are output before the console is initialised, the 631 bytes are output before the console is initialised, the
631 earlier bytes are discarded. 632 earlier bytes are discarded.
632 633
633 'Sane' compilers will generate smaller code if 634 'Sane' compilers will generate smaller code if
634 CONFIG_PRE_CON_BUF_SZ is a power of 2 635 CONFIG_PRE_CON_BUF_SZ is a power of 2
635 636
636 - Boot Delay: CONFIG_BOOTDELAY - in seconds 637 - Boot Delay: CONFIG_BOOTDELAY - in seconds
637 Delay before automatically booting the default image; 638 Delay before automatically booting the default image;
638 set to -1 to disable autoboot. 639 set to -1 to disable autoboot.
639 640
640 See doc/README.autoboot for these options that 641 See doc/README.autoboot for these options that
641 work with CONFIG_BOOTDELAY. None are required. 642 work with CONFIG_BOOTDELAY. None are required.
642 CONFIG_BOOT_RETRY_TIME 643 CONFIG_BOOT_RETRY_TIME
643 CONFIG_BOOT_RETRY_MIN 644 CONFIG_BOOT_RETRY_MIN
644 CONFIG_AUTOBOOT_KEYED 645 CONFIG_AUTOBOOT_KEYED
645 CONFIG_AUTOBOOT_PROMPT 646 CONFIG_AUTOBOOT_PROMPT
646 CONFIG_AUTOBOOT_DELAY_STR 647 CONFIG_AUTOBOOT_DELAY_STR
647 CONFIG_AUTOBOOT_STOP_STR 648 CONFIG_AUTOBOOT_STOP_STR
648 CONFIG_AUTOBOOT_DELAY_STR2 649 CONFIG_AUTOBOOT_DELAY_STR2
649 CONFIG_AUTOBOOT_STOP_STR2 650 CONFIG_AUTOBOOT_STOP_STR2
650 CONFIG_ZERO_BOOTDELAY_CHECK 651 CONFIG_ZERO_BOOTDELAY_CHECK
651 CONFIG_RESET_TO_RETRY 652 CONFIG_RESET_TO_RETRY
652 653
653 - Autoboot Command: 654 - Autoboot Command:
654 CONFIG_BOOTCOMMAND 655 CONFIG_BOOTCOMMAND
655 Only needed when CONFIG_BOOTDELAY is enabled; 656 Only needed when CONFIG_BOOTDELAY is enabled;
656 define a command string that is automatically executed 657 define a command string that is automatically executed
657 when no character is read on the console interface 658 when no character is read on the console interface
658 within "Boot Delay" after reset. 659 within "Boot Delay" after reset.
659 660
660 CONFIG_BOOTARGS 661 CONFIG_BOOTARGS
661 This can be used to pass arguments to the bootm 662 This can be used to pass arguments to the bootm
662 command. The value of CONFIG_BOOTARGS goes into the 663 command. The value of CONFIG_BOOTARGS goes into the
663 environment value "bootargs". 664 environment value "bootargs".
664 665
665 CONFIG_RAMBOOT and CONFIG_NFSBOOT 666 CONFIG_RAMBOOT and CONFIG_NFSBOOT
666 The value of these goes into the environment as 667 The value of these goes into the environment as
667 "ramboot" and "nfsboot" respectively, and can be used 668 "ramboot" and "nfsboot" respectively, and can be used
668 as a convenience, when switching between booting from 669 as a convenience, when switching between booting from
669 RAM and NFS. 670 RAM and NFS.
670 671
671 - Pre-Boot Commands: 672 - Pre-Boot Commands:
672 CONFIG_PREBOOT 673 CONFIG_PREBOOT
673 674
674 When this option is #defined, the existence of the 675 When this option is #defined, the existence of the
675 environment variable "preboot" will be checked 676 environment variable "preboot" will be checked
676 immediately before starting the CONFIG_BOOTDELAY 677 immediately before starting the CONFIG_BOOTDELAY
677 countdown and/or running the auto-boot command resp. 678 countdown and/or running the auto-boot command resp.
678 entering interactive mode. 679 entering interactive mode.
679 680
680 This feature is especially useful when "preboot" is 681 This feature is especially useful when "preboot" is
681 automatically generated or modified. For an example 682 automatically generated or modified. For an example
682 see the LWMON board specific code: here "preboot" is 683 see the LWMON board specific code: here "preboot" is
683 modified when the user holds down a certain 684 modified when the user holds down a certain
684 combination of keys on the (special) keyboard when 685 combination of keys on the (special) keyboard when
685 booting the systems 686 booting the systems
686 687
687 - Serial Download Echo Mode: 688 - Serial Download Echo Mode:
688 CONFIG_LOADS_ECHO 689 CONFIG_LOADS_ECHO
689 If defined to 1, all characters received during a 690 If defined to 1, all characters received during a
690 serial download (using the "loads" command) are 691 serial download (using the "loads" command) are
691 echoed back. This might be needed by some terminal 692 echoed back. This might be needed by some terminal
692 emulations (like "cu"), but may as well just take 693 emulations (like "cu"), but may as well just take
693 time on others. This setting #define's the initial 694 time on others. This setting #define's the initial
694 value of the "loads_echo" environment variable. 695 value of the "loads_echo" environment variable.
695 696
696 - Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined) 697 - Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
697 CONFIG_KGDB_BAUDRATE 698 CONFIG_KGDB_BAUDRATE
698 Select one of the baudrates listed in 699 Select one of the baudrates listed in
699 CONFIG_SYS_BAUDRATE_TABLE, see below. 700 CONFIG_SYS_BAUDRATE_TABLE, see below.
700 701
701 - Monitor Functions: 702 - Monitor Functions:
702 Monitor commands can be included or excluded 703 Monitor commands can be included or excluded
703 from the build by using the #include files 704 from the build by using the #include files
704 "config_cmd_all.h" and #undef'ing unwanted 705 "config_cmd_all.h" and #undef'ing unwanted
705 commands, or using "config_cmd_default.h" 706 commands, or using "config_cmd_default.h"
706 and augmenting with additional #define's 707 and augmenting with additional #define's
707 for wanted commands. 708 for wanted commands.
708 709
709 The default command configuration includes all commands 710 The default command configuration includes all commands
710 except those marked below with a "*". 711 except those marked below with a "*".
711 712
712 CONFIG_CMD_ASKENV * ask for env variable 713 CONFIG_CMD_ASKENV * ask for env variable
713 CONFIG_CMD_BDI bdinfo 714 CONFIG_CMD_BDI bdinfo
714 CONFIG_CMD_BEDBUG * Include BedBug Debugger 715 CONFIG_CMD_BEDBUG * Include BedBug Debugger
715 CONFIG_CMD_BMP * BMP support 716 CONFIG_CMD_BMP * BMP support
716 CONFIG_CMD_BSP * Board specific commands 717 CONFIG_CMD_BSP * Board specific commands
717 CONFIG_CMD_BOOTD bootd 718 CONFIG_CMD_BOOTD bootd
718 CONFIG_CMD_CACHE * icache, dcache 719 CONFIG_CMD_CACHE * icache, dcache
719 CONFIG_CMD_CONSOLE coninfo 720 CONFIG_CMD_CONSOLE coninfo
720 CONFIG_CMD_CRC32 * crc32 721 CONFIG_CMD_CRC32 * crc32
721 CONFIG_CMD_DATE * support for RTC, date/time... 722 CONFIG_CMD_DATE * support for RTC, date/time...
722 CONFIG_CMD_DHCP * DHCP support 723 CONFIG_CMD_DHCP * DHCP support
723 CONFIG_CMD_DIAG * Diagnostics 724 CONFIG_CMD_DIAG * Diagnostics
724 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands 725 CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
725 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command 726 CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
726 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd 727 CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
727 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command 728 CONFIG_CMD_DS4510_RST * ds4510 I2C rst command
728 CONFIG_CMD_DTT * Digital Therm and Thermostat 729 CONFIG_CMD_DTT * Digital Therm and Thermostat
729 CONFIG_CMD_ECHO echo arguments 730 CONFIG_CMD_ECHO echo arguments
730 CONFIG_CMD_EDITENV edit env variable 731 CONFIG_CMD_EDITENV edit env variable
731 CONFIG_CMD_EEPROM * EEPROM read/write support 732 CONFIG_CMD_EEPROM * EEPROM read/write support
732 CONFIG_CMD_ELF * bootelf, bootvx 733 CONFIG_CMD_ELF * bootelf, bootvx
733 CONFIG_CMD_EXPORTENV * export the environment 734 CONFIG_CMD_EXPORTENV * export the environment
734 CONFIG_CMD_SAVEENV saveenv 735 CONFIG_CMD_SAVEENV saveenv
735 CONFIG_CMD_FDC * Floppy Disk Support 736 CONFIG_CMD_FDC * Floppy Disk Support
736 CONFIG_CMD_FAT * FAT partition support 737 CONFIG_CMD_FAT * FAT partition support
737 CONFIG_CMD_FDOS * Dos diskette Support 738 CONFIG_CMD_FDOS * Dos diskette Support
738 CONFIG_CMD_FLASH flinfo, erase, protect 739 CONFIG_CMD_FLASH flinfo, erase, protect
739 CONFIG_CMD_FPGA FPGA device initialization support 740 CONFIG_CMD_FPGA FPGA device initialization support
740 CONFIG_CMD_GO * the 'go' command (exec code) 741 CONFIG_CMD_GO * the 'go' command (exec code)
741 CONFIG_CMD_GREPENV * search environment 742 CONFIG_CMD_GREPENV * search environment
742 CONFIG_CMD_HWFLOW * RTS/CTS hw flow control 743 CONFIG_CMD_HWFLOW * RTS/CTS hw flow control
743 CONFIG_CMD_I2C * I2C serial bus support 744 CONFIG_CMD_I2C * I2C serial bus support
744 CONFIG_CMD_IDE * IDE harddisk support 745 CONFIG_CMD_IDE * IDE harddisk support
745 CONFIG_CMD_IMI iminfo 746 CONFIG_CMD_IMI iminfo
746 CONFIG_CMD_IMLS List all found images 747 CONFIG_CMD_IMLS List all found images
747 CONFIG_CMD_IMMAP * IMMR dump support 748 CONFIG_CMD_IMMAP * IMMR dump support
748 CONFIG_CMD_IMPORTENV * import an environment 749 CONFIG_CMD_IMPORTENV * import an environment
749 CONFIG_CMD_IRQ * irqinfo 750 CONFIG_CMD_IRQ * irqinfo
750 CONFIG_CMD_ITEST Integer/string test of 2 values 751 CONFIG_CMD_ITEST Integer/string test of 2 values
751 CONFIG_CMD_JFFS2 * JFFS2 Support 752 CONFIG_CMD_JFFS2 * JFFS2 Support
752 CONFIG_CMD_KGDB * kgdb 753 CONFIG_CMD_KGDB * kgdb
753 CONFIG_CMD_LDRINFO ldrinfo (display Blackfin loader) 754 CONFIG_CMD_LDRINFO ldrinfo (display Blackfin loader)
754 CONFIG_CMD_LOADB loadb 755 CONFIG_CMD_LOADB loadb
755 CONFIG_CMD_LOADS loads 756 CONFIG_CMD_LOADS loads
756 CONFIG_CMD_MD5SUM print md5 message digest 757 CONFIG_CMD_MD5SUM print md5 message digest
757 (requires CONFIG_CMD_MEMORY and CONFIG_MD5) 758 (requires CONFIG_CMD_MEMORY and CONFIG_MD5)
758 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base, 759 CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
759 loop, loopw, mtest 760 loop, loopw, mtest
760 CONFIG_CMD_MISC Misc functions like sleep etc 761 CONFIG_CMD_MISC Misc functions like sleep etc
761 CONFIG_CMD_MMC * MMC memory mapped support 762 CONFIG_CMD_MMC * MMC memory mapped support
762 CONFIG_CMD_MII * MII utility commands 763 CONFIG_CMD_MII * MII utility commands
763 CONFIG_CMD_MTDPARTS * MTD partition support 764 CONFIG_CMD_MTDPARTS * MTD partition support
764 CONFIG_CMD_NAND * NAND support 765 CONFIG_CMD_NAND * NAND support
765 CONFIG_CMD_NET bootp, tftpboot, rarpboot 766 CONFIG_CMD_NET bootp, tftpboot, rarpboot
766 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands 767 CONFIG_CMD_PCA953X * PCA953x I2C gpio commands
767 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command 768 CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command
768 CONFIG_CMD_PCI * pciinfo 769 CONFIG_CMD_PCI * pciinfo
769 CONFIG_CMD_PCMCIA * PCMCIA support 770 CONFIG_CMD_PCMCIA * PCMCIA support
770 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network 771 CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
771 host 772 host
772 CONFIG_CMD_PORTIO * Port I/O 773 CONFIG_CMD_PORTIO * Port I/O
773 CONFIG_CMD_REGINFO * Register dump 774 CONFIG_CMD_REGINFO * Register dump
774 CONFIG_CMD_RUN run command in env variable 775 CONFIG_CMD_RUN run command in env variable
775 CONFIG_CMD_SAVES * save S record dump 776 CONFIG_CMD_SAVES * save S record dump
776 CONFIG_CMD_SCSI * SCSI Support 777 CONFIG_CMD_SCSI * SCSI Support
777 CONFIG_CMD_SDRAM * print SDRAM configuration information 778 CONFIG_CMD_SDRAM * print SDRAM configuration information
778 (requires CONFIG_CMD_I2C) 779 (requires CONFIG_CMD_I2C)
779 CONFIG_CMD_SETGETDCR Support for DCR Register access 780 CONFIG_CMD_SETGETDCR Support for DCR Register access
780 (4xx only) 781 (4xx only)
781 CONFIG_CMD_SHA1SUM print sha1 memory digest 782 CONFIG_CMD_SHA1SUM print sha1 memory digest
782 (requires CONFIG_CMD_MEMORY) 783 (requires CONFIG_CMD_MEMORY)
783 CONFIG_CMD_SOURCE "source" command Support 784 CONFIG_CMD_SOURCE "source" command Support
784 CONFIG_CMD_SPI * SPI serial bus support 785 CONFIG_CMD_SPI * SPI serial bus support
785 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode 786 CONFIG_CMD_TFTPSRV * TFTP transfer in server mode
786 CONFIG_CMD_TIME * run command and report execution time 787 CONFIG_CMD_TIME * run command and report execution time
787 CONFIG_CMD_USB * USB support 788 CONFIG_CMD_USB * USB support
788 CONFIG_CMD_CDP * Cisco Discover Protocol support 789 CONFIG_CMD_CDP * Cisco Discover Protocol support
789 CONFIG_CMD_FSL * Microblaze FSL support 790 CONFIG_CMD_FSL * Microblaze FSL support
790 791
791 792
792 EXAMPLE: If you want all functions except of network 793 EXAMPLE: If you want all functions except of network
793 support you can write: 794 support you can write:
794 795
795 #include "config_cmd_all.h" 796 #include "config_cmd_all.h"
796 #undef CONFIG_CMD_NET 797 #undef CONFIG_CMD_NET
797 798
798 Other Commands: 799 Other Commands:
799 fdt (flattened device tree) command: CONFIG_OF_LIBFDT 800 fdt (flattened device tree) command: CONFIG_OF_LIBFDT
800 801
801 Note: Don't enable the "icache" and "dcache" commands 802 Note: Don't enable the "icache" and "dcache" commands
802 (configuration option CONFIG_CMD_CACHE) unless you know 803 (configuration option CONFIG_CMD_CACHE) unless you know
803 what you (and your U-Boot users) are doing. Data 804 what you (and your U-Boot users) are doing. Data
804 cache cannot be enabled on systems like the 8xx or 805 cache cannot be enabled on systems like the 8xx or
805 8260 (where accesses to the IMMR region must be 806 8260 (where accesses to the IMMR region must be
806 uncached), and it cannot be disabled on all other 807 uncached), and it cannot be disabled on all other
807 systems where we (mis-) use the data cache to hold an 808 systems where we (mis-) use the data cache to hold an
808 initial stack and some data. 809 initial stack and some data.
809 810
810 811
811 XXX - this list needs to get updated! 812 XXX - this list needs to get updated!
812 813
813 - Watchdog: 814 - Watchdog:
814 CONFIG_WATCHDOG 815 CONFIG_WATCHDOG
815 If this variable is defined, it enables watchdog 816 If this variable is defined, it enables watchdog
816 support for the SoC. There must be support in the SoC 817 support for the SoC. There must be support in the SoC
817 specific code for a watchdog. For the 8xx and 8260 818 specific code for a watchdog. For the 8xx and 8260
818 CPUs, the SIU Watchdog feature is enabled in the SYPCR 819 CPUs, the SIU Watchdog feature is enabled in the SYPCR
819 register. When supported for a specific SoC is 820 register. When supported for a specific SoC is
820 available, then no further board specific code should 821 available, then no further board specific code should
821 be needed to use it. 822 be needed to use it.
822 823
823 CONFIG_HW_WATCHDOG 824 CONFIG_HW_WATCHDOG
824 When using a watchdog circuitry external to the used 825 When using a watchdog circuitry external to the used
825 SoC, then define this variable and provide board 826 SoC, then define this variable and provide board
826 specific code for the "hw_watchdog_reset" function. 827 specific code for the "hw_watchdog_reset" function.
827 828
828 - U-Boot Version: 829 - U-Boot Version:
829 CONFIG_VERSION_VARIABLE 830 CONFIG_VERSION_VARIABLE
830 If this variable is defined, an environment variable 831 If this variable is defined, an environment variable
831 named "ver" is created by U-Boot showing the U-Boot 832 named "ver" is created by U-Boot showing the U-Boot
832 version as printed by the "version" command. 833 version as printed by the "version" command.
833 This variable is readonly. 834 This variable is readonly.
834 835
835 - Real-Time Clock: 836 - Real-Time Clock:
836 837
837 When CONFIG_CMD_DATE is selected, the type of the RTC 838 When CONFIG_CMD_DATE is selected, the type of the RTC
838 has to be selected, too. Define exactly one of the 839 has to be selected, too. Define exactly one of the
839 following options: 840 following options:
840 841
841 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx 842 CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx
842 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC 843 CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC
843 CONFIG_RTC_MC13783 - use MC13783 RTC 844 CONFIG_RTC_MC13783 - use MC13783 RTC
844 CONFIG_RTC_MC146818 - use MC146818 RTC 845 CONFIG_RTC_MC146818 - use MC146818 RTC
845 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC 846 CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC
846 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC 847 CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC
847 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC 848 CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC
848 CONFIG_RTC_DS164x - use Dallas DS164x RTC 849 CONFIG_RTC_DS164x - use Dallas DS164x RTC
849 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC 850 CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC
850 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC 851 CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC
851 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 852 CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337
852 CONFIG_SYS_RV3029_TCR - enable trickle charger on 853 CONFIG_SYS_RV3029_TCR - enable trickle charger on
853 RV3029 RTC. 854 RV3029 RTC.
854 855
855 Note that if the RTC uses I2C, then the I2C interface 856 Note that if the RTC uses I2C, then the I2C interface
856 must also be configured. See I2C Support, below. 857 must also be configured. See I2C Support, below.
857 858
858 - GPIO Support: 859 - GPIO Support:
859 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO 860 CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO
860 CONFIG_PCA953X_INFO - enable pca953x info command 861 CONFIG_PCA953X_INFO - enable pca953x info command
861 862
862 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of 863 The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of
863 chip-ngpio pairs that tell the PCA953X driver the number of 864 chip-ngpio pairs that tell the PCA953X driver the number of
864 pins supported by a particular chip. 865 pins supported by a particular chip.
865 866
866 Note that if the GPIO device uses I2C, then the I2C interface 867 Note that if the GPIO device uses I2C, then the I2C interface
867 must also be configured. See I2C Support, below. 868 must also be configured. See I2C Support, below.
868 869
869 - Timestamp Support: 870 - Timestamp Support:
870 871
871 When CONFIG_TIMESTAMP is selected, the timestamp 872 When CONFIG_TIMESTAMP is selected, the timestamp
872 (date and time) of an image is printed by image 873 (date and time) of an image is printed by image
873 commands like bootm or iminfo. This option is 874 commands like bootm or iminfo. This option is
874 automatically enabled when you select CONFIG_CMD_DATE . 875 automatically enabled when you select CONFIG_CMD_DATE .
875 876
876 - Partition Support: 877 - Partition Support:
877 CONFIG_MAC_PARTITION and/or CONFIG_DOS_PARTITION 878 CONFIG_MAC_PARTITION and/or CONFIG_DOS_PARTITION
878 and/or CONFIG_ISO_PARTITION and/or CONFIG_EFI_PARTITION 879 and/or CONFIG_ISO_PARTITION and/or CONFIG_EFI_PARTITION
879 880
880 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or 881 If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
881 CONFIG_CMD_SCSI) you must configure support for at 882 CONFIG_CMD_SCSI) you must configure support for at
882 least one partition type as well. 883 least one partition type as well.
883 884
884 - IDE Reset method: 885 - IDE Reset method:
885 CONFIG_IDE_RESET_ROUTINE - this is defined in several 886 CONFIG_IDE_RESET_ROUTINE - this is defined in several
886 board configurations files but used nowhere! 887 board configurations files but used nowhere!
887 888
888 CONFIG_IDE_RESET - is this is defined, IDE Reset will 889 CONFIG_IDE_RESET - is this is defined, IDE Reset will
889 be performed by calling the function 890 be performed by calling the function
890 ide_set_reset(int reset) 891 ide_set_reset(int reset)
891 which has to be defined in a board specific file 892 which has to be defined in a board specific file
892 893
893 - ATAPI Support: 894 - ATAPI Support:
894 CONFIG_ATAPI 895 CONFIG_ATAPI
895 896
896 Set this to enable ATAPI support. 897 Set this to enable ATAPI support.
897 898
898 - LBA48 Support 899 - LBA48 Support
899 CONFIG_LBA48 900 CONFIG_LBA48
900 901
901 Set this to enable support for disks larger than 137GB 902 Set this to enable support for disks larger than 137GB
902 Also look at CONFIG_SYS_64BIT_LBA. 903 Also look at CONFIG_SYS_64BIT_LBA.
903 Whithout these , LBA48 support uses 32bit variables and will 'only' 904 Whithout these , LBA48 support uses 32bit variables and will 'only'
904 support disks up to 2.1TB. 905 support disks up to 2.1TB.
905 906
906 CONFIG_SYS_64BIT_LBA: 907 CONFIG_SYS_64BIT_LBA:
907 When enabled, makes the IDE subsystem use 64bit sector addresses. 908 When enabled, makes the IDE subsystem use 64bit sector addresses.
908 Default is 32bit. 909 Default is 32bit.
909 910
910 - SCSI Support: 911 - SCSI Support:
911 At the moment only there is only support for the 912 At the moment only there is only support for the
912 SYM53C8XX SCSI controller; define 913 SYM53C8XX SCSI controller; define
913 CONFIG_SCSI_SYM53C8XX to enable it. 914 CONFIG_SCSI_SYM53C8XX to enable it.
914 915
915 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and 916 CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and
916 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID * 917 CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID *
917 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the 918 CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the
918 maximum numbers of LUNs, SCSI ID's and target 919 maximum numbers of LUNs, SCSI ID's and target
919 devices. 920 devices.
920 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz) 921 CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz)
921 922
922 - NETWORK Support (PCI): 923 - NETWORK Support (PCI):
923 CONFIG_E1000 924 CONFIG_E1000
924 Support for Intel 8254x gigabit chips. 925 Support for Intel 8254x gigabit chips.
925 926
926 CONFIG_E1000_FALLBACK_MAC 927 CONFIG_E1000_FALLBACK_MAC
927 default MAC for empty EEPROM after production. 928 default MAC for empty EEPROM after production.
928 929
929 CONFIG_EEPRO100 930 CONFIG_EEPRO100
930 Support for Intel 82557/82559/82559ER chips. 931 Support for Intel 82557/82559/82559ER chips.
931 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM 932 Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
932 write routine for first time initialisation. 933 write routine for first time initialisation.
933 934
934 CONFIG_TULIP 935 CONFIG_TULIP
935 Support for Digital 2114x chips. 936 Support for Digital 2114x chips.
936 Optional CONFIG_TULIP_SELECT_MEDIA for board specific 937 Optional CONFIG_TULIP_SELECT_MEDIA for board specific
937 modem chip initialisation (KS8761/QS6611). 938 modem chip initialisation (KS8761/QS6611).
938 939
939 CONFIG_NATSEMI 940 CONFIG_NATSEMI
940 Support for National dp83815 chips. 941 Support for National dp83815 chips.
941 942
942 CONFIG_NS8382X 943 CONFIG_NS8382X
943 Support for National dp8382[01] gigabit chips. 944 Support for National dp8382[01] gigabit chips.
944 945
945 - NETWORK Support (other): 946 - NETWORK Support (other):
946 947
947 CONFIG_DRIVER_AT91EMAC 948 CONFIG_DRIVER_AT91EMAC
948 Support for AT91RM9200 EMAC. 949 Support for AT91RM9200 EMAC.
949 950
950 CONFIG_RMII 951 CONFIG_RMII
951 Define this to use reduced MII inteface 952 Define this to use reduced MII inteface
952 953
953 CONFIG_DRIVER_AT91EMAC_QUIET 954 CONFIG_DRIVER_AT91EMAC_QUIET
954 If this defined, the driver is quiet. 955 If this defined, the driver is quiet.
955 The driver doen't show link status messages. 956 The driver doen't show link status messages.
956 957
957 CONFIG_DRIVER_LAN91C96 958 CONFIG_DRIVER_LAN91C96
958 Support for SMSC's LAN91C96 chips. 959 Support for SMSC's LAN91C96 chips.
959 960
960 CONFIG_LAN91C96_BASE 961 CONFIG_LAN91C96_BASE
961 Define this to hold the physical address 962 Define this to hold the physical address
962 of the LAN91C96's I/O space 963 of the LAN91C96's I/O space
963 964
964 CONFIG_LAN91C96_USE_32_BIT 965 CONFIG_LAN91C96_USE_32_BIT
965 Define this to enable 32 bit addressing 966 Define this to enable 32 bit addressing
966 967
967 CONFIG_DRIVER_SMC91111 968 CONFIG_DRIVER_SMC91111
968 Support for SMSC's LAN91C111 chip 969 Support for SMSC's LAN91C111 chip
969 970
970 CONFIG_SMC91111_BASE 971 CONFIG_SMC91111_BASE
971 Define this to hold the physical address 972 Define this to hold the physical address
972 of the device (I/O space) 973 of the device (I/O space)
973 974
974 CONFIG_SMC_USE_32_BIT 975 CONFIG_SMC_USE_32_BIT
975 Define this if data bus is 32 bits 976 Define this if data bus is 32 bits
976 977
977 CONFIG_SMC_USE_IOFUNCS 978 CONFIG_SMC_USE_IOFUNCS
978 Define this to use i/o functions instead of macros 979 Define this to use i/o functions instead of macros
979 (some hardware wont work with macros) 980 (some hardware wont work with macros)
980 981
981 CONFIG_FTGMAC100 982 CONFIG_FTGMAC100
982 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet 983 Support for Faraday's FTGMAC100 Gigabit SoC Ethernet
983 984
984 CONFIG_FTGMAC100_EGIGA 985 CONFIG_FTGMAC100_EGIGA
985 Define this to use GE link update with gigabit PHY. 986 Define this to use GE link update with gigabit PHY.
986 Define this if FTGMAC100 is connected to gigabit PHY. 987 Define this if FTGMAC100 is connected to gigabit PHY.
987 If your system has 10/100 PHY only, it might not occur 988 If your system has 10/100 PHY only, it might not occur
988 wrong behavior. Because PHY usually return timeout or 989 wrong behavior. Because PHY usually return timeout or
989 useless data when polling gigabit status and gigabit 990 useless data when polling gigabit status and gigabit
990 control registers. This behavior won't affect the 991 control registers. This behavior won't affect the
991 correctnessof 10/100 link speed update. 992 correctnessof 10/100 link speed update.
992 993
993 CONFIG_SMC911X 994 CONFIG_SMC911X
994 Support for SMSC's LAN911x and LAN921x chips 995 Support for SMSC's LAN911x and LAN921x chips
995 996
996 CONFIG_SMC911X_BASE 997 CONFIG_SMC911X_BASE
997 Define this to hold the physical address 998 Define this to hold the physical address
998 of the device (I/O space) 999 of the device (I/O space)
999 1000
1000 CONFIG_SMC911X_32_BIT 1001 CONFIG_SMC911X_32_BIT
1001 Define this if data bus is 32 bits 1002 Define this if data bus is 32 bits
1002 1003
1003 CONFIG_SMC911X_16_BIT 1004 CONFIG_SMC911X_16_BIT
1004 Define this if data bus is 16 bits. If your processor 1005 Define this if data bus is 16 bits. If your processor
1005 automatically converts one 32 bit word to two 16 bit 1006 automatically converts one 32 bit word to two 16 bit
1006 words you may also try CONFIG_SMC911X_32_BIT. 1007 words you may also try CONFIG_SMC911X_32_BIT.
1007 1008
1008 CONFIG_SH_ETHER 1009 CONFIG_SH_ETHER
1009 Support for Renesas on-chip Ethernet controller 1010 Support for Renesas on-chip Ethernet controller
1010 1011
1011 CONFIG_SH_ETHER_USE_PORT 1012 CONFIG_SH_ETHER_USE_PORT
1012 Define the number of ports to be used 1013 Define the number of ports to be used
1013 1014
1014 CONFIG_SH_ETHER_PHY_ADDR 1015 CONFIG_SH_ETHER_PHY_ADDR
1015 Define the ETH PHY's address 1016 Define the ETH PHY's address
1016 1017
1017 CONFIG_SH_ETHER_CACHE_WRITEBACK 1018 CONFIG_SH_ETHER_CACHE_WRITEBACK
1018 If this option is set, the driver enables cache flush. 1019 If this option is set, the driver enables cache flush.
1019 1020
1020 - USB Support: 1021 - USB Support:
1021 At the moment only the UHCI host controller is 1022 At the moment only the UHCI host controller is
1022 supported (PIP405, MIP405, MPC5200); define 1023 supported (PIP405, MIP405, MPC5200); define
1023 CONFIG_USB_UHCI to enable it. 1024 CONFIG_USB_UHCI to enable it.
1024 define CONFIG_USB_KEYBOARD to enable the USB Keyboard 1025 define CONFIG_USB_KEYBOARD to enable the USB Keyboard
1025 and define CONFIG_USB_STORAGE to enable the USB 1026 and define CONFIG_USB_STORAGE to enable the USB
1026 storage devices. 1027 storage devices.
1027 Note: 1028 Note:
1028 Supported are USB Keyboards and USB Floppy drives 1029 Supported are USB Keyboards and USB Floppy drives
1029 (TEAC FD-05PUB). 1030 (TEAC FD-05PUB).
1030 MPC5200 USB requires additional defines: 1031 MPC5200 USB requires additional defines:
1031 CONFIG_USB_CLOCK 1032 CONFIG_USB_CLOCK
1032 for 528 MHz Clock: 0x0001bbbb 1033 for 528 MHz Clock: 0x0001bbbb
1033 CONFIG_PSC3_USB 1034 CONFIG_PSC3_USB
1034 for USB on PSC3 1035 for USB on PSC3
1035 CONFIG_USB_CONFIG 1036 CONFIG_USB_CONFIG
1036 for differential drivers: 0x00001000 1037 for differential drivers: 0x00001000
1037 for single ended drivers: 0x00005000 1038 for single ended drivers: 0x00005000
1038 for differential drivers on PSC3: 0x00000100 1039 for differential drivers on PSC3: 0x00000100
1039 for single ended drivers on PSC3: 0x00004100 1040 for single ended drivers on PSC3: 0x00004100
1040 CONFIG_SYS_USB_EVENT_POLL 1041 CONFIG_SYS_USB_EVENT_POLL
1041 May be defined to allow interrupt polling 1042 May be defined to allow interrupt polling
1042 instead of using asynchronous interrupts 1043 instead of using asynchronous interrupts
1043 1044
1044 - USB Device: 1045 - USB Device:
1045 Define the below if you wish to use the USB console. 1046 Define the below if you wish to use the USB console.
1046 Once firmware is rebuilt from a serial console issue the 1047 Once firmware is rebuilt from a serial console issue the
1047 command "setenv stdin usbtty; setenv stdout usbtty" and 1048 command "setenv stdin usbtty; setenv stdout usbtty" and
1048 attach your USB cable. The Unix command "dmesg" should print 1049 attach your USB cable. The Unix command "dmesg" should print
1049 it has found a new device. The environment variable usbtty 1050 it has found a new device. The environment variable usbtty
1050 can be set to gserial or cdc_acm to enable your device to 1051 can be set to gserial or cdc_acm to enable your device to
1051 appear to a USB host as a Linux gserial device or a 1052 appear to a USB host as a Linux gserial device or a
1052 Common Device Class Abstract Control Model serial device. 1053 Common Device Class Abstract Control Model serial device.
1053 If you select usbtty = gserial you should be able to enumerate 1054 If you select usbtty = gserial you should be able to enumerate
1054 a Linux host by 1055 a Linux host by
1055 # modprobe usbserial vendor=0xVendorID product=0xProductID 1056 # modprobe usbserial vendor=0xVendorID product=0xProductID
1056 else if using cdc_acm, simply setting the environment 1057 else if using cdc_acm, simply setting the environment
1057 variable usbtty to be cdc_acm should suffice. The following 1058 variable usbtty to be cdc_acm should suffice. The following
1058 might be defined in YourBoardName.h 1059 might be defined in YourBoardName.h
1059 1060
1060 CONFIG_USB_DEVICE 1061 CONFIG_USB_DEVICE
1061 Define this to build a UDC device 1062 Define this to build a UDC device
1062 1063
1063 CONFIG_USB_TTY 1064 CONFIG_USB_TTY
1064 Define this to have a tty type of device available to 1065 Define this to have a tty type of device available to
1065 talk to the UDC device 1066 talk to the UDC device
1066 1067
1067 CONFIG_SYS_CONSOLE_IS_IN_ENV 1068 CONFIG_SYS_CONSOLE_IS_IN_ENV
1068 Define this if you want stdin, stdout &/or stderr to 1069 Define this if you want stdin, stdout &/or stderr to
1069 be set to usbtty. 1070 be set to usbtty.
1070 1071
1071 mpc8xx: 1072 mpc8xx:
1072 CONFIG_SYS_USB_EXTC_CLK 0xBLAH 1073 CONFIG_SYS_USB_EXTC_CLK 0xBLAH
1073 Derive USB clock from external clock "blah" 1074 Derive USB clock from external clock "blah"
1074 - CONFIG_SYS_USB_EXTC_CLK 0x02 1075 - CONFIG_SYS_USB_EXTC_CLK 0x02
1075 1076
1076 CONFIG_SYS_USB_BRG_CLK 0xBLAH 1077 CONFIG_SYS_USB_BRG_CLK 0xBLAH
1077 Derive USB clock from brgclk 1078 Derive USB clock from brgclk
1078 - CONFIG_SYS_USB_BRG_CLK 0x04 1079 - CONFIG_SYS_USB_BRG_CLK 0x04
1079 1080
1080 If you have a USB-IF assigned VendorID then you may wish to 1081 If you have a USB-IF assigned VendorID then you may wish to
1081 define your own vendor specific values either in BoardName.h 1082 define your own vendor specific values either in BoardName.h
1082 or directly in usbd_vendor_info.h. If you don't define 1083 or directly in usbd_vendor_info.h. If you don't define
1083 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME, 1084 CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
1084 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot 1085 CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
1085 should pretend to be a Linux device to it's target host. 1086 should pretend to be a Linux device to it's target host.
1086 1087
1087 CONFIG_USBD_MANUFACTURER 1088 CONFIG_USBD_MANUFACTURER
1088 Define this string as the name of your company for 1089 Define this string as the name of your company for
1089 - CONFIG_USBD_MANUFACTURER "my company" 1090 - CONFIG_USBD_MANUFACTURER "my company"
1090 1091
1091 CONFIG_USBD_PRODUCT_NAME 1092 CONFIG_USBD_PRODUCT_NAME
1092 Define this string as the name of your product 1093 Define this string as the name of your product
1093 - CONFIG_USBD_PRODUCT_NAME "acme usb device" 1094 - CONFIG_USBD_PRODUCT_NAME "acme usb device"
1094 1095
1095 CONFIG_USBD_VENDORID 1096 CONFIG_USBD_VENDORID
1096 Define this as your assigned Vendor ID from the USB 1097 Define this as your assigned Vendor ID from the USB
1097 Implementors Forum. This *must* be a genuine Vendor ID 1098 Implementors Forum. This *must* be a genuine Vendor ID
1098 to avoid polluting the USB namespace. 1099 to avoid polluting the USB namespace.
1099 - CONFIG_USBD_VENDORID 0xFFFF 1100 - CONFIG_USBD_VENDORID 0xFFFF
1100 1101
1101 CONFIG_USBD_PRODUCTID 1102 CONFIG_USBD_PRODUCTID
1102 Define this as the unique Product ID 1103 Define this as the unique Product ID
1103 for your device 1104 for your device
1104 - CONFIG_USBD_PRODUCTID 0xFFFF 1105 - CONFIG_USBD_PRODUCTID 0xFFFF
1105 1106
1106 1107
1107 - MMC Support: 1108 - MMC Support:
1108 The MMC controller on the Intel PXA is supported. To 1109 The MMC controller on the Intel PXA is supported. To
1109 enable this define CONFIG_MMC. The MMC can be 1110 enable this define CONFIG_MMC. The MMC can be
1110 accessed from the boot prompt by mapping the device 1111 accessed from the boot prompt by mapping the device
1111 to physical memory similar to flash. Command line is 1112 to physical memory similar to flash. Command line is
1112 enabled with CONFIG_CMD_MMC. The MMC driver also works with 1113 enabled with CONFIG_CMD_MMC. The MMC driver also works with
1113 the FAT fs. This is enabled with CONFIG_CMD_FAT. 1114 the FAT fs. This is enabled with CONFIG_CMD_FAT.
1114 1115
1115 CONFIG_SH_MMCIF 1116 CONFIG_SH_MMCIF
1116 Support for Renesas on-chip MMCIF controller 1117 Support for Renesas on-chip MMCIF controller
1117 1118
1118 CONFIG_SH_MMCIF_ADDR 1119 CONFIG_SH_MMCIF_ADDR
1119 Define the base address of MMCIF registers 1120 Define the base address of MMCIF registers
1120 1121
1121 CONFIG_SH_MMCIF_CLK 1122 CONFIG_SH_MMCIF_CLK
1122 Define the clock frequency for MMCIF 1123 Define the clock frequency for MMCIF
1123 1124
1124 - Journaling Flash filesystem support: 1125 - Journaling Flash filesystem support:
1125 CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE, 1126 CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
1126 CONFIG_JFFS2_NAND_DEV 1127 CONFIG_JFFS2_NAND_DEV
1127 Define these for a default partition on a NAND device 1128 Define these for a default partition on a NAND device
1128 1129
1129 CONFIG_SYS_JFFS2_FIRST_SECTOR, 1130 CONFIG_SYS_JFFS2_FIRST_SECTOR,
1130 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS 1131 CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS
1131 Define these for a default partition on a NOR device 1132 Define these for a default partition on a NOR device
1132 1133
1133 CONFIG_SYS_JFFS_CUSTOM_PART 1134 CONFIG_SYS_JFFS_CUSTOM_PART
1134 Define this to create an own partition. You have to provide a 1135 Define this to create an own partition. You have to provide a
1135 function struct part_info* jffs2_part_info(int part_num) 1136 function struct part_info* jffs2_part_info(int part_num)
1136 1137
1137 If you define only one JFFS2 partition you may also want to 1138 If you define only one JFFS2 partition you may also want to
1138 #define CONFIG_SYS_JFFS_SINGLE_PART 1 1139 #define CONFIG_SYS_JFFS_SINGLE_PART 1
1139 to disable the command chpart. This is the default when you 1140 to disable the command chpart. This is the default when you
1140 have not defined a custom partition 1141 have not defined a custom partition
1141 1142
1142 - Keyboard Support: 1143 - Keyboard Support:
1143 CONFIG_ISA_KEYBOARD 1144 CONFIG_ISA_KEYBOARD
1144 1145
1145 Define this to enable standard (PC-Style) keyboard 1146 Define this to enable standard (PC-Style) keyboard
1146 support 1147 support
1147 1148
1148 CONFIG_I8042_KBD 1149 CONFIG_I8042_KBD
1149 Standard PC keyboard driver with US (is default) and 1150 Standard PC keyboard driver with US (is default) and
1150 GERMAN key layout (switch via environment 'keymap=de') support. 1151 GERMAN key layout (switch via environment 'keymap=de') support.
1151 Export function i8042_kbd_init, i8042_tstc and i8042_getc 1152 Export function i8042_kbd_init, i8042_tstc and i8042_getc
1152 for cfb_console. Supports cursor blinking. 1153 for cfb_console. Supports cursor blinking.
1153 1154
1154 - Video support: 1155 - Video support:
1155 CONFIG_VIDEO 1156 CONFIG_VIDEO
1156 1157
1157 Define this to enable video support (for output to 1158 Define this to enable video support (for output to
1158 video). 1159 video).
1159 1160
1160 CONFIG_VIDEO_CT69000 1161 CONFIG_VIDEO_CT69000
1161 1162
1162 Enable Chips & Technologies 69000 Video chip 1163 Enable Chips & Technologies 69000 Video chip
1163 1164
1164 CONFIG_VIDEO_SMI_LYNXEM 1165 CONFIG_VIDEO_SMI_LYNXEM
1165 Enable Silicon Motion SMI 712/710/810 Video chip. The 1166 Enable Silicon Motion SMI 712/710/810 Video chip. The
1166 video output is selected via environment 'videoout' 1167 video output is selected via environment 'videoout'
1167 (1 = LCD and 2 = CRT). If videoout is undefined, CRT is 1168 (1 = LCD and 2 = CRT). If videoout is undefined, CRT is
1168 assumed. 1169 assumed.
1169 1170
1170 For the CT69000 and SMI_LYNXEM drivers, videomode is 1171 For the CT69000 and SMI_LYNXEM drivers, videomode is
1171 selected via environment 'videomode'. Two different ways 1172 selected via environment 'videomode'. Two different ways
1172 are possible: 1173 are possible:
1173 - "videomode=num" 'num' is a standard LiLo mode numbers. 1174 - "videomode=num" 'num' is a standard LiLo mode numbers.
1174 Following standard modes are supported (* is default): 1175 Following standard modes are supported (* is default):
1175 1176
1176 Colors 640x480 800x600 1024x768 1152x864 1280x1024 1177 Colors 640x480 800x600 1024x768 1152x864 1280x1024
1177 -------------+--------------------------------------------- 1178 -------------+---------------------------------------------
1178 8 bits | 0x301* 0x303 0x305 0x161 0x307 1179 8 bits | 0x301* 0x303 0x305 0x161 0x307
1179 15 bits | 0x310 0x313 0x316 0x162 0x319 1180 15 bits | 0x310 0x313 0x316 0x162 0x319
1180 16 bits | 0x311 0x314 0x317 0x163 0x31A 1181 16 bits | 0x311 0x314 0x317 0x163 0x31A
1181 24 bits | 0x312 0x315 0x318 ? 0x31B 1182 24 bits | 0x312 0x315 0x318 ? 0x31B
1182 -------------+--------------------------------------------- 1183 -------------+---------------------------------------------
1183 (i.e. setenv videomode 317; saveenv; reset;) 1184 (i.e. setenv videomode 317; saveenv; reset;)
1184 1185
1185 - "videomode=bootargs" all the video parameters are parsed 1186 - "videomode=bootargs" all the video parameters are parsed
1186 from the bootargs. (See drivers/video/videomodes.c) 1187 from the bootargs. (See drivers/video/videomodes.c)
1187 1188
1188 1189
1189 CONFIG_VIDEO_SED13806 1190 CONFIG_VIDEO_SED13806
1190 Enable Epson SED13806 driver. This driver supports 8bpp 1191 Enable Epson SED13806 driver. This driver supports 8bpp
1191 and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP 1192 and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
1192 or CONFIG_VIDEO_SED13806_16BPP 1193 or CONFIG_VIDEO_SED13806_16BPP
1193 1194
1194 CONFIG_FSL_DIU_FB 1195 CONFIG_FSL_DIU_FB
1195 Enable the Freescale DIU video driver. Reference boards for 1196 Enable the Freescale DIU video driver. Reference boards for
1196 SOCs that have a DIU should define this macro to enable DIU 1197 SOCs that have a DIU should define this macro to enable DIU
1197 support, and should also define these other macros: 1198 support, and should also define these other macros:
1198 1199
1199 CONFIG_SYS_DIU_ADDR 1200 CONFIG_SYS_DIU_ADDR
1200 CONFIG_VIDEO 1201 CONFIG_VIDEO
1201 CONFIG_CMD_BMP 1202 CONFIG_CMD_BMP
1202 CONFIG_CFB_CONSOLE 1203 CONFIG_CFB_CONSOLE
1203 CONFIG_VIDEO_SW_CURSOR 1204 CONFIG_VIDEO_SW_CURSOR
1204 CONFIG_VGA_AS_SINGLE_DEVICE 1205 CONFIG_VGA_AS_SINGLE_DEVICE
1205 CONFIG_VIDEO_LOGO 1206 CONFIG_VIDEO_LOGO
1206 CONFIG_VIDEO_BMP_LOGO 1207 CONFIG_VIDEO_BMP_LOGO
1207 1208
1208 The DIU driver will look for the 'video-mode' environment 1209 The DIU driver will look for the 'video-mode' environment
1209 variable, and if defined, enable the DIU as a console during 1210 variable, and if defined, enable the DIU as a console during
1210 boot. See the documentation file README.video for a 1211 boot. See the documentation file README.video for a
1211 description of this variable. 1212 description of this variable.
1212 1213
1213 - Keyboard Support: 1214 - Keyboard Support:
1214 CONFIG_KEYBOARD 1215 CONFIG_KEYBOARD
1215 1216
1216 Define this to enable a custom keyboard support. 1217 Define this to enable a custom keyboard support.
1217 This simply calls drv_keyboard_init() which must be 1218 This simply calls drv_keyboard_init() which must be
1218 defined in your board-specific files. 1219 defined in your board-specific files.
1219 The only board using this so far is RBC823. 1220 The only board using this so far is RBC823.
1220 1221
1221 - LCD Support: CONFIG_LCD 1222 - LCD Support: CONFIG_LCD
1222 1223
1223 Define this to enable LCD support (for output to LCD 1224 Define this to enable LCD support (for output to LCD
1224 display); also select one of the supported displays 1225 display); also select one of the supported displays
1225 by defining one of these: 1226 by defining one of these:
1226 1227
1227 CONFIG_ATMEL_LCD: 1228 CONFIG_ATMEL_LCD:
1228 1229
1229 HITACHI TX09D70VM1CCA, 3.5", 240x320. 1230 HITACHI TX09D70VM1CCA, 3.5", 240x320.
1230 1231
1231 CONFIG_NEC_NL6448AC33: 1232 CONFIG_NEC_NL6448AC33:
1232 1233
1233 NEC NL6448AC33-18. Active, color, single scan. 1234 NEC NL6448AC33-18. Active, color, single scan.
1234 1235
1235 CONFIG_NEC_NL6448BC20 1236 CONFIG_NEC_NL6448BC20
1236 1237
1237 NEC NL6448BC20-08. 6.5", 640x480. 1238 NEC NL6448BC20-08. 6.5", 640x480.
1238 Active, color, single scan. 1239 Active, color, single scan.
1239 1240
1240 CONFIG_NEC_NL6448BC33_54 1241 CONFIG_NEC_NL6448BC33_54
1241 1242
1242 NEC NL6448BC33-54. 10.4", 640x480. 1243 NEC NL6448BC33-54. 10.4", 640x480.
1243 Active, color, single scan. 1244 Active, color, single scan.
1244 1245
1245 CONFIG_SHARP_16x9 1246 CONFIG_SHARP_16x9
1246 1247
1247 Sharp 320x240. Active, color, single scan. 1248 Sharp 320x240. Active, color, single scan.
1248 It isn't 16x9, and I am not sure what it is. 1249 It isn't 16x9, and I am not sure what it is.
1249 1250
1250 CONFIG_SHARP_LQ64D341 1251 CONFIG_SHARP_LQ64D341
1251 1252
1252 Sharp LQ64D341 display, 640x480. 1253 Sharp LQ64D341 display, 640x480.
1253 Active, color, single scan. 1254 Active, color, single scan.
1254 1255
1255 CONFIG_HLD1045 1256 CONFIG_HLD1045
1256 1257
1257 HLD1045 display, 640x480. 1258 HLD1045 display, 640x480.
1258 Active, color, single scan. 1259 Active, color, single scan.
1259 1260
1260 CONFIG_OPTREX_BW 1261 CONFIG_OPTREX_BW
1261 1262
1262 Optrex CBL50840-2 NF-FW 99 22 M5 1263 Optrex CBL50840-2 NF-FW 99 22 M5
1263 or 1264 or
1264 Hitachi LMG6912RPFC-00T 1265 Hitachi LMG6912RPFC-00T
1265 or 1266 or
1266 Hitachi SP14Q002 1267 Hitachi SP14Q002
1267 1268
1268 320x240. Black & white. 1269 320x240. Black & white.
1269 1270
1270 Normally display is black on white background; define 1271 Normally display is black on white background; define
1271 CONFIG_SYS_WHITE_ON_BLACK to get it inverted. 1272 CONFIG_SYS_WHITE_ON_BLACK to get it inverted.
1272 1273
1273 - Splash Screen Support: CONFIG_SPLASH_SCREEN 1274 - Splash Screen Support: CONFIG_SPLASH_SCREEN
1274 1275
1275 If this option is set, the environment is checked for 1276 If this option is set, the environment is checked for
1276 a variable "splashimage". If found, the usual display 1277 a variable "splashimage". If found, the usual display
1277 of logo, copyright and system information on the LCD 1278 of logo, copyright and system information on the LCD
1278 is suppressed and the BMP image at the address 1279 is suppressed and the BMP image at the address
1279 specified in "splashimage" is loaded instead. The 1280 specified in "splashimage" is loaded instead. The
1280 console is redirected to the "nulldev", too. This 1281 console is redirected to the "nulldev", too. This
1281 allows for a "silent" boot where a splash screen is 1282 allows for a "silent" boot where a splash screen is
1282 loaded very quickly after power-on. 1283 loaded very quickly after power-on.
1283 1284
1284 CONFIG_SPLASH_SCREEN_ALIGN 1285 CONFIG_SPLASH_SCREEN_ALIGN
1285 1286
1286 If this option is set the splash image can be freely positioned 1287 If this option is set the splash image can be freely positioned
1287 on the screen. Environment variable "splashpos" specifies the 1288 on the screen. Environment variable "splashpos" specifies the
1288 position as "x,y". If a positive number is given it is used as 1289 position as "x,y". If a positive number is given it is used as
1289 number of pixel from left/top. If a negative number is given it 1290 number of pixel from left/top. If a negative number is given it
1290 is used as number of pixel from right/bottom. You can also 1291 is used as number of pixel from right/bottom. You can also
1291 specify 'm' for centering the image. 1292 specify 'm' for centering the image.
1292 1293
1293 Example: 1294 Example:
1294 setenv splashpos m,m 1295 setenv splashpos m,m
1295 => image at center of screen 1296 => image at center of screen
1296 1297
1297 setenv splashpos 30,20 1298 setenv splashpos 30,20
1298 => image at x = 30 and y = 20 1299 => image at x = 30 and y = 20
1299 1300
1300 setenv splashpos -10,m 1301 setenv splashpos -10,m
1301 => vertically centered image 1302 => vertically centered image
1302 at x = dspWidth - bmpWidth - 9 1303 at x = dspWidth - bmpWidth - 9
1303 1304
1304 - Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP 1305 - Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
1305 1306
1306 If this option is set, additionally to standard BMP 1307 If this option is set, additionally to standard BMP
1307 images, gzipped BMP images can be displayed via the 1308 images, gzipped BMP images can be displayed via the
1308 splashscreen support or the bmp command. 1309 splashscreen support or the bmp command.
1309 1310
1310 - Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8 1311 - Run length encoded BMP image (RLE8) support: CONFIG_VIDEO_BMP_RLE8
1311 1312
1312 If this option is set, 8-bit RLE compressed BMP images 1313 If this option is set, 8-bit RLE compressed BMP images
1313 can be displayed via the splashscreen support or the 1314 can be displayed via the splashscreen support or the
1314 bmp command. 1315 bmp command.
1315 1316
1316 - Compression support: 1317 - Compression support:
1317 CONFIG_BZIP2 1318 CONFIG_BZIP2
1318 1319
1319 If this option is set, support for bzip2 compressed 1320 If this option is set, support for bzip2 compressed
1320 images is included. If not, only uncompressed and gzip 1321 images is included. If not, only uncompressed and gzip
1321 compressed images are supported. 1322 compressed images are supported.
1322 1323
1323 NOTE: the bzip2 algorithm requires a lot of RAM, so 1324 NOTE: the bzip2 algorithm requires a lot of RAM, so
1324 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should 1325 the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should
1325 be at least 4MB. 1326 be at least 4MB.
1326 1327
1327 CONFIG_LZMA 1328 CONFIG_LZMA
1328 1329
1329 If this option is set, support for lzma compressed 1330 If this option is set, support for lzma compressed
1330 images is included. 1331 images is included.
1331 1332
1332 Note: The LZMA algorithm adds between 2 and 4KB of code and it 1333 Note: The LZMA algorithm adds between 2 and 4KB of code and it
1333 requires an amount of dynamic memory that is given by the 1334 requires an amount of dynamic memory that is given by the
1334 formula: 1335 formula:
1335 1336
1336 (1846 + 768 << (lc + lp)) * sizeof(uint16) 1337 (1846 + 768 << (lc + lp)) * sizeof(uint16)
1337 1338
1338 Where lc and lp stand for, respectively, Literal context bits 1339 Where lc and lp stand for, respectively, Literal context bits
1339 and Literal pos bits. 1340 and Literal pos bits.
1340 1341
1341 This value is upper-bounded by 14MB in the worst case. Anyway, 1342 This value is upper-bounded by 14MB in the worst case. Anyway,
1342 for a ~4MB large kernel image, we have lc=3 and lp=0 for a 1343 for a ~4MB large kernel image, we have lc=3 and lp=0 for a
1343 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is 1344 total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is
1344 a very small buffer. 1345 a very small buffer.
1345 1346
1346 Use the lzmainfo tool to determinate the lc and lp values and 1347 Use the lzmainfo tool to determinate the lc and lp values and
1347 then calculate the amount of needed dynamic memory (ensuring 1348 then calculate the amount of needed dynamic memory (ensuring
1348 the appropriate CONFIG_SYS_MALLOC_LEN value). 1349 the appropriate CONFIG_SYS_MALLOC_LEN value).
1349 1350
1350 - MII/PHY support: 1351 - MII/PHY support:
1351 CONFIG_PHY_ADDR 1352 CONFIG_PHY_ADDR
1352 1353
1353 The address of PHY on MII bus. 1354 The address of PHY on MII bus.
1354 1355
1355 CONFIG_PHY_CLOCK_FREQ (ppc4xx) 1356 CONFIG_PHY_CLOCK_FREQ (ppc4xx)
1356 1357
1357 The clock frequency of the MII bus 1358 The clock frequency of the MII bus
1358 1359
1359 CONFIG_PHY_GIGE 1360 CONFIG_PHY_GIGE
1360 1361
1361 If this option is set, support for speed/duplex 1362 If this option is set, support for speed/duplex
1362 detection of gigabit PHY is included. 1363 detection of gigabit PHY is included.
1363 1364
1364 CONFIG_PHY_RESET_DELAY 1365 CONFIG_PHY_RESET_DELAY
1365 1366
1366 Some PHY like Intel LXT971A need extra delay after 1367 Some PHY like Intel LXT971A need extra delay after
1367 reset before any MII register access is possible. 1368 reset before any MII register access is possible.
1368 For such PHY, set this option to the usec delay 1369 For such PHY, set this option to the usec delay
1369 required. (minimum 300usec for LXT971A) 1370 required. (minimum 300usec for LXT971A)
1370 1371
1371 CONFIG_PHY_CMD_DELAY (ppc4xx) 1372 CONFIG_PHY_CMD_DELAY (ppc4xx)
1372 1373
1373 Some PHY like Intel LXT971A need extra delay after 1374 Some PHY like Intel LXT971A need extra delay after
1374 command issued before MII status register can be read 1375 command issued before MII status register can be read
1375 1376
1376 - Ethernet address: 1377 - Ethernet address:
1377 CONFIG_ETHADDR 1378 CONFIG_ETHADDR
1378 CONFIG_ETH1ADDR 1379 CONFIG_ETH1ADDR
1379 CONFIG_ETH2ADDR 1380 CONFIG_ETH2ADDR
1380 CONFIG_ETH3ADDR 1381 CONFIG_ETH3ADDR
1381 CONFIG_ETH4ADDR 1382 CONFIG_ETH4ADDR
1382 CONFIG_ETH5ADDR 1383 CONFIG_ETH5ADDR
1383 1384
1384 Define a default value for Ethernet address to use 1385 Define a default value for Ethernet address to use
1385 for the respective Ethernet interface, in case this 1386 for the respective Ethernet interface, in case this
1386 is not determined automatically. 1387 is not determined automatically.
1387 1388
1388 - IP address: 1389 - IP address:
1389 CONFIG_IPADDR 1390 CONFIG_IPADDR
1390 1391
1391 Define a default value for the IP address to use for 1392 Define a default value for the IP address to use for
1392 the default Ethernet interface, in case this is not 1393 the default Ethernet interface, in case this is not
1393 determined through e.g. bootp. 1394 determined through e.g. bootp.
1394 1395
1395 - Server IP address: 1396 - Server IP address:
1396 CONFIG_SERVERIP 1397 CONFIG_SERVERIP
1397 1398
1398 Defines a default value for the IP address of a TFTP 1399 Defines a default value for the IP address of a TFTP
1399 server to contact when using the "tftboot" command. 1400 server to contact when using the "tftboot" command.
1400 1401
1401 CONFIG_KEEP_SERVERADDR 1402 CONFIG_KEEP_SERVERADDR
1402 1403
1403 Keeps the server's MAC address, in the env 'serveraddr' 1404 Keeps the server's MAC address, in the env 'serveraddr'
1404 for passing to bootargs (like Linux's netconsole option) 1405 for passing to bootargs (like Linux's netconsole option)
1405 1406
1406 - Multicast TFTP Mode: 1407 - Multicast TFTP Mode:
1407 CONFIG_MCAST_TFTP 1408 CONFIG_MCAST_TFTP
1408 1409
1409 Defines whether you want to support multicast TFTP as per 1410 Defines whether you want to support multicast TFTP as per
1410 rfc-2090; for example to work with atftp. Lets lots of targets 1411 rfc-2090; for example to work with atftp. Lets lots of targets
1411 tftp down the same boot image concurrently. Note: the Ethernet 1412 tftp down the same boot image concurrently. Note: the Ethernet
1412 driver in use must provide a function: mcast() to join/leave a 1413 driver in use must provide a function: mcast() to join/leave a
1413 multicast group. 1414 multicast group.
1414 1415
1415 - BOOTP Recovery Mode: 1416 - BOOTP Recovery Mode:
1416 CONFIG_BOOTP_RANDOM_DELAY 1417 CONFIG_BOOTP_RANDOM_DELAY
1417 1418
1418 If you have many targets in a network that try to 1419 If you have many targets in a network that try to
1419 boot using BOOTP, you may want to avoid that all 1420 boot using BOOTP, you may want to avoid that all
1420 systems send out BOOTP requests at precisely the same 1421 systems send out BOOTP requests at precisely the same
1421 moment (which would happen for instance at recovery 1422 moment (which would happen for instance at recovery
1422 from a power failure, when all systems will try to 1423 from a power failure, when all systems will try to
1423 boot, thus flooding the BOOTP server. Defining 1424 boot, thus flooding the BOOTP server. Defining
1424 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be 1425 CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
1425 inserted before sending out BOOTP requests. The 1426 inserted before sending out BOOTP requests. The
1426 following delays are inserted then: 1427 following delays are inserted then:
1427 1428
1428 1st BOOTP request: delay 0 ... 1 sec 1429 1st BOOTP request: delay 0 ... 1 sec
1429 2nd BOOTP request: delay 0 ... 2 sec 1430 2nd BOOTP request: delay 0 ... 2 sec
1430 3rd BOOTP request: delay 0 ... 4 sec 1431 3rd BOOTP request: delay 0 ... 4 sec
1431 4th and following 1432 4th and following
1432 BOOTP requests: delay 0 ... 8 sec 1433 BOOTP requests: delay 0 ... 8 sec
1433 1434
1434 - DHCP Advanced Options: 1435 - DHCP Advanced Options:
1435 You can fine tune the DHCP functionality by defining 1436 You can fine tune the DHCP functionality by defining
1436 CONFIG_BOOTP_* symbols: 1437 CONFIG_BOOTP_* symbols:
1437 1438
1438 CONFIG_BOOTP_SUBNETMASK 1439 CONFIG_BOOTP_SUBNETMASK
1439 CONFIG_BOOTP_GATEWAY 1440 CONFIG_BOOTP_GATEWAY
1440 CONFIG_BOOTP_HOSTNAME 1441 CONFIG_BOOTP_HOSTNAME
1441 CONFIG_BOOTP_NISDOMAIN 1442 CONFIG_BOOTP_NISDOMAIN
1442 CONFIG_BOOTP_BOOTPATH 1443 CONFIG_BOOTP_BOOTPATH
1443 CONFIG_BOOTP_BOOTFILESIZE 1444 CONFIG_BOOTP_BOOTFILESIZE
1444 CONFIG_BOOTP_DNS 1445 CONFIG_BOOTP_DNS
1445 CONFIG_BOOTP_DNS2 1446 CONFIG_BOOTP_DNS2
1446 CONFIG_BOOTP_SEND_HOSTNAME 1447 CONFIG_BOOTP_SEND_HOSTNAME
1447 CONFIG_BOOTP_NTPSERVER 1448 CONFIG_BOOTP_NTPSERVER
1448 CONFIG_BOOTP_TIMEOFFSET 1449 CONFIG_BOOTP_TIMEOFFSET
1449 CONFIG_BOOTP_VENDOREX 1450 CONFIG_BOOTP_VENDOREX
1450 1451
1451 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip 1452 CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
1452 environment variable, not the BOOTP server. 1453 environment variable, not the BOOTP server.
1453 1454
1454 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS 1455 CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
1455 serverip from a DHCP server, it is possible that more 1456 serverip from a DHCP server, it is possible that more
1456 than one DNS serverip is offered to the client. 1457 than one DNS serverip is offered to the client.
1457 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS 1458 If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
1458 serverip will be stored in the additional environment 1459 serverip will be stored in the additional environment
1459 variable "dnsip2". The first DNS serverip is always 1460 variable "dnsip2". The first DNS serverip is always
1460 stored in the variable "dnsip", when CONFIG_BOOTP_DNS 1461 stored in the variable "dnsip", when CONFIG_BOOTP_DNS
1461 is defined. 1462 is defined.
1462 1463
1463 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable 1464 CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
1464 to do a dynamic update of a DNS server. To do this, they 1465 to do a dynamic update of a DNS server. To do this, they
1465 need the hostname of the DHCP requester. 1466 need the hostname of the DHCP requester.
1466 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content 1467 If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
1467 of the "hostname" environment variable is passed as 1468 of the "hostname" environment variable is passed as
1468 option 12 to the DHCP server. 1469 option 12 to the DHCP server.
1469 1470
1470 CONFIG_BOOTP_DHCP_REQUEST_DELAY 1471 CONFIG_BOOTP_DHCP_REQUEST_DELAY
1471 1472
1472 A 32bit value in microseconds for a delay between 1473 A 32bit value in microseconds for a delay between
1473 receiving a "DHCP Offer" and sending the "DHCP Request". 1474 receiving a "DHCP Offer" and sending the "DHCP Request".
1474 This fixes a problem with certain DHCP servers that don't 1475 This fixes a problem with certain DHCP servers that don't
1475 respond 100% of the time to a "DHCP request". E.g. On an 1476 respond 100% of the time to a "DHCP request". E.g. On an
1476 AT91RM9200 processor running at 180MHz, this delay needed 1477 AT91RM9200 processor running at 180MHz, this delay needed
1477 to be *at least* 15,000 usec before a Windows Server 2003 1478 to be *at least* 15,000 usec before a Windows Server 2003
1478 DHCP server would reply 100% of the time. I recommend at 1479 DHCP server would reply 100% of the time. I recommend at
1479 least 50,000 usec to be safe. The alternative is to hope 1480 least 50,000 usec to be safe. The alternative is to hope
1480 that one of the retries will be successful but note that 1481 that one of the retries will be successful but note that
1481 the DHCP timeout and retry process takes a longer than 1482 the DHCP timeout and retry process takes a longer than
1482 this delay. 1483 this delay.
1483 1484
1484 - CDP Options: 1485 - CDP Options:
1485 CONFIG_CDP_DEVICE_ID 1486 CONFIG_CDP_DEVICE_ID
1486 1487
1487 The device id used in CDP trigger frames. 1488 The device id used in CDP trigger frames.
1488 1489
1489 CONFIG_CDP_DEVICE_ID_PREFIX 1490 CONFIG_CDP_DEVICE_ID_PREFIX
1490 1491
1491 A two character string which is prefixed to the MAC address 1492 A two character string which is prefixed to the MAC address
1492 of the device. 1493 of the device.
1493 1494
1494 CONFIG_CDP_PORT_ID 1495 CONFIG_CDP_PORT_ID
1495 1496
1496 A printf format string which contains the ascii name of 1497 A printf format string which contains the ascii name of
1497 the port. Normally is set to "eth%d" which sets 1498 the port. Normally is set to "eth%d" which sets
1498 eth0 for the first Ethernet, eth1 for the second etc. 1499 eth0 for the first Ethernet, eth1 for the second etc.
1499 1500
1500 CONFIG_CDP_CAPABILITIES 1501 CONFIG_CDP_CAPABILITIES
1501 1502
1502 A 32bit integer which indicates the device capabilities; 1503 A 32bit integer which indicates the device capabilities;
1503 0x00000010 for a normal host which does not forwards. 1504 0x00000010 for a normal host which does not forwards.
1504 1505
1505 CONFIG_CDP_VERSION 1506 CONFIG_CDP_VERSION
1506 1507
1507 An ascii string containing the version of the software. 1508 An ascii string containing the version of the software.
1508 1509
1509 CONFIG_CDP_PLATFORM 1510 CONFIG_CDP_PLATFORM
1510 1511
1511 An ascii string containing the name of the platform. 1512 An ascii string containing the name of the platform.
1512 1513
1513 CONFIG_CDP_TRIGGER 1514 CONFIG_CDP_TRIGGER
1514 1515
1515 A 32bit integer sent on the trigger. 1516 A 32bit integer sent on the trigger.
1516 1517
1517 CONFIG_CDP_POWER_CONSUMPTION 1518 CONFIG_CDP_POWER_CONSUMPTION
1518 1519
1519 A 16bit integer containing the power consumption of the 1520 A 16bit integer containing the power consumption of the
1520 device in .1 of milliwatts. 1521 device in .1 of milliwatts.
1521 1522
1522 CONFIG_CDP_APPLIANCE_VLAN_TYPE 1523 CONFIG_CDP_APPLIANCE_VLAN_TYPE
1523 1524
1524 A byte containing the id of the VLAN. 1525 A byte containing the id of the VLAN.
1525 1526
1526 - Status LED: CONFIG_STATUS_LED 1527 - Status LED: CONFIG_STATUS_LED
1527 1528
1528 Several configurations allow to display the current 1529 Several configurations allow to display the current
1529 status using a LED. For instance, the LED will blink 1530 status using a LED. For instance, the LED will blink
1530 fast while running U-Boot code, stop blinking as 1531 fast while running U-Boot code, stop blinking as
1531 soon as a reply to a BOOTP request was received, and 1532 soon as a reply to a BOOTP request was received, and
1532 start blinking slow once the Linux kernel is running 1533 start blinking slow once the Linux kernel is running
1533 (supported by a status LED driver in the Linux 1534 (supported by a status LED driver in the Linux
1534 kernel). Defining CONFIG_STATUS_LED enables this 1535 kernel). Defining CONFIG_STATUS_LED enables this
1535 feature in U-Boot. 1536 feature in U-Boot.
1536 1537
1537 - CAN Support: CONFIG_CAN_DRIVER 1538 - CAN Support: CONFIG_CAN_DRIVER
1538 1539
1539 Defining CONFIG_CAN_DRIVER enables CAN driver support 1540 Defining CONFIG_CAN_DRIVER enables CAN driver support
1540 on those systems that support this (optional) 1541 on those systems that support this (optional)
1541 feature, like the TQM8xxL modules. 1542 feature, like the TQM8xxL modules.
1542 1543
1543 - I2C Support: CONFIG_HARD_I2C | CONFIG_SOFT_I2C 1544 - I2C Support: CONFIG_HARD_I2C | CONFIG_SOFT_I2C
1544 1545
1545 These enable I2C serial bus commands. Defining either of 1546 These enable I2C serial bus commands. Defining either of
1546 (but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will 1547 (but not both of) CONFIG_HARD_I2C or CONFIG_SOFT_I2C will
1547 include the appropriate I2C driver for the selected CPU. 1548 include the appropriate I2C driver for the selected CPU.
1548 1549
1549 This will allow you to use i2c commands at the u-boot 1550 This will allow you to use i2c commands at the u-boot
1550 command line (as long as you set CONFIG_CMD_I2C in 1551 command line (as long as you set CONFIG_CMD_I2C in
1551 CONFIG_COMMANDS) and communicate with i2c based realtime 1552 CONFIG_COMMANDS) and communicate with i2c based realtime
1552 clock chips. See common/cmd_i2c.c for a description of the 1553 clock chips. See common/cmd_i2c.c for a description of the
1553 command line interface. 1554 command line interface.
1554 1555
1555 CONFIG_HARD_I2C selects a hardware I2C controller. 1556 CONFIG_HARD_I2C selects a hardware I2C controller.
1556 1557
1557 CONFIG_SOFT_I2C configures u-boot to use a software (aka 1558 CONFIG_SOFT_I2C configures u-boot to use a software (aka
1558 bit-banging) driver instead of CPM or similar hardware 1559 bit-banging) driver instead of CPM or similar hardware
1559 support for I2C. 1560 support for I2C.
1560 1561
1561 There are several other quantities that must also be 1562 There are several other quantities that must also be
1562 defined when you define CONFIG_HARD_I2C or CONFIG_SOFT_I2C. 1563 defined when you define CONFIG_HARD_I2C or CONFIG_SOFT_I2C.
1563 1564
1564 In both cases you will need to define CONFIG_SYS_I2C_SPEED 1565 In both cases you will need to define CONFIG_SYS_I2C_SPEED
1565 to be the frequency (in Hz) at which you wish your i2c bus 1566 to be the frequency (in Hz) at which you wish your i2c bus
1566 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie 1567 to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie
1567 the CPU's i2c node address). 1568 the CPU's i2c node address).
1568 1569
1569 Now, the u-boot i2c code for the mpc8xx 1570 Now, the u-boot i2c code for the mpc8xx
1570 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node 1571 (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node
1571 and so its address should therefore be cleared to 0 (See, 1572 and so its address should therefore be cleared to 0 (See,
1572 eg, MPC823e User's Manual p.16-473). So, set 1573 eg, MPC823e User's Manual p.16-473). So, set
1573 CONFIG_SYS_I2C_SLAVE to 0. 1574 CONFIG_SYS_I2C_SLAVE to 0.
1574 1575
1575 CONFIG_SYS_I2C_INIT_MPC5XXX 1576 CONFIG_SYS_I2C_INIT_MPC5XXX
1576 1577
1577 When a board is reset during an i2c bus transfer 1578 When a board is reset during an i2c bus transfer
1578 chips might think that the current transfer is still 1579 chips might think that the current transfer is still
1579 in progress. Reset the slave devices by sending start 1580 in progress. Reset the slave devices by sending start
1580 commands until the slave device responds. 1581 commands until the slave device responds.
1581 1582
1582 That's all that's required for CONFIG_HARD_I2C. 1583 That's all that's required for CONFIG_HARD_I2C.
1583 1584
1584 If you use the software i2c interface (CONFIG_SOFT_I2C) 1585 If you use the software i2c interface (CONFIG_SOFT_I2C)
1585 then the following macros need to be defined (examples are 1586 then the following macros need to be defined (examples are
1586 from include/configs/lwmon.h): 1587 from include/configs/lwmon.h):
1587 1588
1588 I2C_INIT 1589 I2C_INIT
1589 1590
1590 (Optional). Any commands necessary to enable the I2C 1591 (Optional). Any commands necessary to enable the I2C
1591 controller or configure ports. 1592 controller or configure ports.
1592 1593
1593 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) 1594 eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL)
1594 1595
1595 I2C_PORT 1596 I2C_PORT
1596 1597
1597 (Only for MPC8260 CPU). The I/O port to use (the code 1598 (Only for MPC8260 CPU). The I/O port to use (the code
1598 assumes both bits are on the same port). Valid values 1599 assumes both bits are on the same port). Valid values
1599 are 0..3 for ports A..D. 1600 are 0..3 for ports A..D.
1600 1601
1601 I2C_ACTIVE 1602 I2C_ACTIVE
1602 1603
1603 The code necessary to make the I2C data line active 1604 The code necessary to make the I2C data line active
1604 (driven). If the data line is open collector, this 1605 (driven). If the data line is open collector, this
1605 define can be null. 1606 define can be null.
1606 1607
1607 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA) 1608 eg: #define I2C_ACTIVE (immr->im_cpm.cp_pbdir |= PB_SDA)
1608 1609
1609 I2C_TRISTATE 1610 I2C_TRISTATE
1610 1611
1611 The code necessary to make the I2C data line tri-stated 1612 The code necessary to make the I2C data line tri-stated
1612 (inactive). If the data line is open collector, this 1613 (inactive). If the data line is open collector, this
1613 define can be null. 1614 define can be null.
1614 1615
1615 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA) 1616 eg: #define I2C_TRISTATE (immr->im_cpm.cp_pbdir &= ~PB_SDA)
1616 1617
1617 I2C_READ 1618 I2C_READ
1618 1619
1619 Code that returns TRUE if the I2C data line is high, 1620 Code that returns TRUE if the I2C data line is high,
1620 FALSE if it is low. 1621 FALSE if it is low.
1621 1622
1622 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0) 1623 eg: #define I2C_READ ((immr->im_cpm.cp_pbdat & PB_SDA) != 0)
1623 1624
1624 I2C_SDA(bit) 1625 I2C_SDA(bit)
1625 1626
1626 If <bit> is TRUE, sets the I2C data line high. If it 1627 If <bit> is TRUE, sets the I2C data line high. If it
1627 is FALSE, it clears it (low). 1628 is FALSE, it clears it (low).
1628 1629
1629 eg: #define I2C_SDA(bit) \ 1630 eg: #define I2C_SDA(bit) \
1630 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \ 1631 if(bit) immr->im_cpm.cp_pbdat |= PB_SDA; \
1631 else immr->im_cpm.cp_pbdat &= ~PB_SDA 1632 else immr->im_cpm.cp_pbdat &= ~PB_SDA
1632 1633
1633 I2C_SCL(bit) 1634 I2C_SCL(bit)
1634 1635
1635 If <bit> is TRUE, sets the I2C clock line high. If it 1636 If <bit> is TRUE, sets the I2C clock line high. If it
1636 is FALSE, it clears it (low). 1637 is FALSE, it clears it (low).
1637 1638
1638 eg: #define I2C_SCL(bit) \ 1639 eg: #define I2C_SCL(bit) \
1639 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \ 1640 if(bit) immr->im_cpm.cp_pbdat |= PB_SCL; \
1640 else immr->im_cpm.cp_pbdat &= ~PB_SCL 1641 else immr->im_cpm.cp_pbdat &= ~PB_SCL
1641 1642
1642 I2C_DELAY 1643 I2C_DELAY
1643 1644
1644 This delay is invoked four times per clock cycle so this 1645 This delay is invoked four times per clock cycle so this
1645 controls the rate of data transfer. The data rate thus 1646 controls the rate of data transfer. The data rate thus
1646 is 1 / (I2C_DELAY * 4). Often defined to be something 1647 is 1 / (I2C_DELAY * 4). Often defined to be something
1647 like: 1648 like:
1648 1649
1649 #define I2C_DELAY udelay(2) 1650 #define I2C_DELAY udelay(2)
1650 1651
1651 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA 1652 CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
1652 1653
1653 If your arch supports the generic GPIO framework (asm/gpio.h), 1654 If your arch supports the generic GPIO framework (asm/gpio.h),
1654 then you may alternatively define the two GPIOs that are to be 1655 then you may alternatively define the two GPIOs that are to be
1655 used as SCL / SDA. Any of the previous I2C_xxx macros will 1656 used as SCL / SDA. Any of the previous I2C_xxx macros will
1656 have GPIO-based defaults assigned to them as appropriate. 1657 have GPIO-based defaults assigned to them as appropriate.
1657 1658
1658 You should define these to the GPIO value as given directly to 1659 You should define these to the GPIO value as given directly to
1659 the generic GPIO functions. 1660 the generic GPIO functions.
1660 1661
1661 CONFIG_SYS_I2C_INIT_BOARD 1662 CONFIG_SYS_I2C_INIT_BOARD
1662 1663
1663 When a board is reset during an i2c bus transfer 1664 When a board is reset during an i2c bus transfer
1664 chips might think that the current transfer is still 1665 chips might think that the current transfer is still
1665 in progress. On some boards it is possible to access 1666 in progress. On some boards it is possible to access
1666 the i2c SCLK line directly, either by using the 1667 the i2c SCLK line directly, either by using the
1667 processor pin as a GPIO or by having a second pin 1668 processor pin as a GPIO or by having a second pin
1668 connected to the bus. If this option is defined a 1669 connected to the bus. If this option is defined a
1669 custom i2c_init_board() routine in boards/xxx/board.c 1670 custom i2c_init_board() routine in boards/xxx/board.c
1670 is run early in the boot sequence. 1671 is run early in the boot sequence.
1671 1672
1672 CONFIG_SYS_I2C_BOARD_LATE_INIT 1673 CONFIG_SYS_I2C_BOARD_LATE_INIT
1673 1674
1674 An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is 1675 An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is
1675 defined a custom i2c_board_late_init() routine in 1676 defined a custom i2c_board_late_init() routine in
1676 boards/xxx/board.c is run AFTER the operations in i2c_init() 1677 boards/xxx/board.c is run AFTER the operations in i2c_init()
1677 is completed. This callpoint can be used to unreset i2c bus 1678 is completed. This callpoint can be used to unreset i2c bus
1678 using CPU i2c controller register accesses for CPUs whose i2c 1679 using CPU i2c controller register accesses for CPUs whose i2c
1679 controller provide such a method. It is called at the end of 1680 controller provide such a method. It is called at the end of
1680 i2c_init() to allow i2c_init operations to setup the i2c bus 1681 i2c_init() to allow i2c_init operations to setup the i2c bus
1681 controller on the CPU (e.g. setting bus speed & slave address). 1682 controller on the CPU (e.g. setting bus speed & slave address).
1682 1683
1683 CONFIG_I2CFAST (PPC405GP|PPC405EP only) 1684 CONFIG_I2CFAST (PPC405GP|PPC405EP only)
1684 1685
1685 This option enables configuration of bi_iic_fast[] flags 1686 This option enables configuration of bi_iic_fast[] flags
1686 in u-boot bd_info structure based on u-boot environment 1687 in u-boot bd_info structure based on u-boot environment
1687 variable "i2cfast". (see also i2cfast) 1688 variable "i2cfast". (see also i2cfast)
1688 1689
1689 CONFIG_I2C_MULTI_BUS 1690 CONFIG_I2C_MULTI_BUS
1690 1691
1691 This option allows the use of multiple I2C buses, each of which 1692 This option allows the use of multiple I2C buses, each of which
1692 must have a controller. At any point in time, only one bus is 1693 must have a controller. At any point in time, only one bus is
1693 active. To switch to a different bus, use the 'i2c dev' command. 1694 active. To switch to a different bus, use the 'i2c dev' command.
1694 Note that bus numbering is zero-based. 1695 Note that bus numbering is zero-based.
1695 1696
1696 CONFIG_SYS_I2C_NOPROBES 1697 CONFIG_SYS_I2C_NOPROBES
1697 1698
1698 This option specifies a list of I2C devices that will be skipped 1699 This option specifies a list of I2C devices that will be skipped
1699 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS 1700 when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
1700 is set, specify a list of bus-device pairs. Otherwise, specify 1701 is set, specify a list of bus-device pairs. Otherwise, specify
1701 a 1D array of device addresses 1702 a 1D array of device addresses
1702 1703
1703 e.g. 1704 e.g.
1704 #undef CONFIG_I2C_MULTI_BUS 1705 #undef CONFIG_I2C_MULTI_BUS
1705 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68} 1706 #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68}
1706 1707
1707 will skip addresses 0x50 and 0x68 on a board with one I2C bus 1708 will skip addresses 0x50 and 0x68 on a board with one I2C bus
1708 1709
1709 #define CONFIG_I2C_MULTI_BUS 1710 #define CONFIG_I2C_MULTI_BUS
1710 #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} 1711 #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}}
1711 1712
1712 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 1713 will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1
1713 1714
1714 CONFIG_SYS_SPD_BUS_NUM 1715 CONFIG_SYS_SPD_BUS_NUM
1715 1716
1716 If defined, then this indicates the I2C bus number for DDR SPD. 1717 If defined, then this indicates the I2C bus number for DDR SPD.
1717 If not defined, then U-Boot assumes that SPD is on I2C bus 0. 1718 If not defined, then U-Boot assumes that SPD is on I2C bus 0.
1718 1719
1719 CONFIG_SYS_RTC_BUS_NUM 1720 CONFIG_SYS_RTC_BUS_NUM
1720 1721
1721 If defined, then this indicates the I2C bus number for the RTC. 1722 If defined, then this indicates the I2C bus number for the RTC.
1722 If not defined, then U-Boot assumes that RTC is on I2C bus 0. 1723 If not defined, then U-Boot assumes that RTC is on I2C bus 0.
1723 1724
1724 CONFIG_SYS_DTT_BUS_NUM 1725 CONFIG_SYS_DTT_BUS_NUM
1725 1726
1726 If defined, then this indicates the I2C bus number for the DTT. 1727 If defined, then this indicates the I2C bus number for the DTT.
1727 If not defined, then U-Boot assumes that DTT is on I2C bus 0. 1728 If not defined, then U-Boot assumes that DTT is on I2C bus 0.
1728 1729
1729 CONFIG_SYS_I2C_DTT_ADDR: 1730 CONFIG_SYS_I2C_DTT_ADDR:
1730 1731
1731 If defined, specifies the I2C address of the DTT device. 1732 If defined, specifies the I2C address of the DTT device.
1732 If not defined, then U-Boot uses predefined value for 1733 If not defined, then U-Boot uses predefined value for
1733 specified DTT device. 1734 specified DTT device.
1734 1735
1735 CONFIG_FSL_I2C 1736 CONFIG_FSL_I2C
1736 1737
1737 Define this option if you want to use Freescale's I2C driver in 1738 Define this option if you want to use Freescale's I2C driver in
1738 drivers/i2c/fsl_i2c.c. 1739 drivers/i2c/fsl_i2c.c.
1739 1740
1740 CONFIG_I2C_MUX 1741 CONFIG_I2C_MUX
1741 1742
1742 Define this option if you have I2C devices reached over 1 .. n 1743 Define this option if you have I2C devices reached over 1 .. n
1743 I2C Muxes like the pca9544a. This option addes a new I2C 1744 I2C Muxes like the pca9544a. This option addes a new I2C
1744 Command "i2c bus [muxtype:muxaddr:muxchannel]" which adds a 1745 Command "i2c bus [muxtype:muxaddr:muxchannel]" which adds a
1745 new I2C Bus to the existing I2C Busses. If you select the 1746 new I2C Bus to the existing I2C Busses. If you select the
1746 new Bus with "i2c dev", u-bbot sends first the commandos for 1747 new Bus with "i2c dev", u-bbot sends first the commandos for
1747 the muxes to activate this new "bus". 1748 the muxes to activate this new "bus".
1748 1749
1749 CONFIG_I2C_MULTI_BUS must be also defined, to use this 1750 CONFIG_I2C_MULTI_BUS must be also defined, to use this
1750 feature! 1751 feature!
1751 1752
1752 Example: 1753 Example:
1753 Adding a new I2C Bus reached over 2 pca9544a muxes 1754 Adding a new I2C Bus reached over 2 pca9544a muxes
1754 The First mux with address 70 and channel 6 1755 The First mux with address 70 and channel 6
1755 The Second mux with address 71 and channel 4 1756 The Second mux with address 71 and channel 4
1756 1757
1757 => i2c bus pca9544a:70:6:pca9544a:71:4 1758 => i2c bus pca9544a:70:6:pca9544a:71:4
1758 1759
1759 Use the "i2c bus" command without parameter, to get a list 1760 Use the "i2c bus" command without parameter, to get a list
1760 of I2C Busses with muxes: 1761 of I2C Busses with muxes:
1761 1762
1762 => i2c bus 1763 => i2c bus
1763 Busses reached over muxes: 1764 Busses reached over muxes:
1764 Bus ID: 2 1765 Bus ID: 2
1765 reached over Mux(es): 1766 reached over Mux(es):
1766 pca9544a@70 ch: 4 1767 pca9544a@70 ch: 4
1767 Bus ID: 3 1768 Bus ID: 3
1768 reached over Mux(es): 1769 reached over Mux(es):
1769 pca9544a@70 ch: 6 1770 pca9544a@70 ch: 6
1770 pca9544a@71 ch: 4 1771 pca9544a@71 ch: 4
1771 => 1772 =>
1772 1773
1773 If you now switch to the new I2C Bus 3 with "i2c dev 3" 1774 If you now switch to the new I2C Bus 3 with "i2c dev 3"
1774 u-boot first sends the command to the mux@70 to enable 1775 u-boot first sends the command to the mux@70 to enable
1775 channel 6, and then the command to the mux@71 to enable 1776 channel 6, and then the command to the mux@71 to enable
1776 the channel 4. 1777 the channel 4.
1777 1778
1778 After that, you can use the "normal" i2c commands as 1779 After that, you can use the "normal" i2c commands as
1779 usual to communicate with your I2C devices behind 1780 usual to communicate with your I2C devices behind
1780 the 2 muxes. 1781 the 2 muxes.
1781 1782
1782 This option is actually implemented for the bitbanging 1783 This option is actually implemented for the bitbanging
1783 algorithm in common/soft_i2c.c and for the Hardware I2C 1784 algorithm in common/soft_i2c.c and for the Hardware I2C
1784 Bus on the MPC8260. But it should be not so difficult 1785 Bus on the MPC8260. But it should be not so difficult
1785 to add this option to other architectures. 1786 to add this option to other architectures.
1786 1787
1787 CONFIG_SOFT_I2C_READ_REPEATED_START 1788 CONFIG_SOFT_I2C_READ_REPEATED_START
1788 1789
1789 defining this will force the i2c_read() function in 1790 defining this will force the i2c_read() function in
1790 the soft_i2c driver to perform an I2C repeated start 1791 the soft_i2c driver to perform an I2C repeated start
1791 between writing the address pointer and reading the 1792 between writing the address pointer and reading the
1792 data. If this define is omitted the default behaviour 1793 data. If this define is omitted the default behaviour
1793 of doing a stop-start sequence will be used. Most I2C 1794 of doing a stop-start sequence will be used. Most I2C
1794 devices can use either method, but some require one or 1795 devices can use either method, but some require one or
1795 the other. 1796 the other.
1796 1797
1797 - SPI Support: CONFIG_SPI 1798 - SPI Support: CONFIG_SPI
1798 1799
1799 Enables SPI driver (so far only tested with 1800 Enables SPI driver (so far only tested with
1800 SPI EEPROM, also an instance works with Crystal A/D and 1801 SPI EEPROM, also an instance works with Crystal A/D and
1801 D/As on the SACSng board) 1802 D/As on the SACSng board)
1802 1803
1803 CONFIG_SH_SPI 1804 CONFIG_SH_SPI
1804 1805
1805 Enables the driver for SPI controller on SuperH. Currently 1806 Enables the driver for SPI controller on SuperH. Currently
1806 only SH7757 is supported. 1807 only SH7757 is supported.
1807 1808
1808 CONFIG_SPI_X 1809 CONFIG_SPI_X
1809 1810
1810 Enables extended (16-bit) SPI EEPROM addressing. 1811 Enables extended (16-bit) SPI EEPROM addressing.
1811 (symmetrical to CONFIG_I2C_X) 1812 (symmetrical to CONFIG_I2C_X)
1812 1813
1813 CONFIG_SOFT_SPI 1814 CONFIG_SOFT_SPI
1814 1815
1815 Enables a software (bit-bang) SPI driver rather than 1816 Enables a software (bit-bang) SPI driver rather than
1816 using hardware support. This is a general purpose 1817 using hardware support. This is a general purpose
1817 driver that only requires three general I/O port pins 1818 driver that only requires three general I/O port pins
1818 (two outputs, one input) to function. If this is 1819 (two outputs, one input) to function. If this is
1819 defined, the board configuration must define several 1820 defined, the board configuration must define several
1820 SPI configuration items (port pins to use, etc). For 1821 SPI configuration items (port pins to use, etc). For
1821 an example, see include/configs/sacsng.h. 1822 an example, see include/configs/sacsng.h.
1822 1823
1823 CONFIG_HARD_SPI 1824 CONFIG_HARD_SPI
1824 1825
1825 Enables a hardware SPI driver for general-purpose reads 1826 Enables a hardware SPI driver for general-purpose reads
1826 and writes. As with CONFIG_SOFT_SPI, the board configuration 1827 and writes. As with CONFIG_SOFT_SPI, the board configuration
1827 must define a list of chip-select function pointers. 1828 must define a list of chip-select function pointers.
1828 Currently supported on some MPC8xxx processors. For an 1829 Currently supported on some MPC8xxx processors. For an
1829 example, see include/configs/mpc8349emds.h. 1830 example, see include/configs/mpc8349emds.h.
1830 1831
1831 CONFIG_MXC_SPI 1832 CONFIG_MXC_SPI
1832 1833
1833 Enables the driver for the SPI controllers on i.MX and MXC 1834 Enables the driver for the SPI controllers on i.MX and MXC
1834 SoCs. Currently only i.MX31 is supported. 1835 SoCs. Currently only i.MX31 is supported.
1835 1836
1836 - FPGA Support: CONFIG_FPGA 1837 - FPGA Support: CONFIG_FPGA
1837 1838
1838 Enables FPGA subsystem. 1839 Enables FPGA subsystem.
1839 1840
1840 CONFIG_FPGA_<vendor> 1841 CONFIG_FPGA_<vendor>
1841 1842
1842 Enables support for specific chip vendors. 1843 Enables support for specific chip vendors.
1843 (ALTERA, XILINX) 1844 (ALTERA, XILINX)
1844 1845
1845 CONFIG_FPGA_<family> 1846 CONFIG_FPGA_<family>
1846 1847
1847 Enables support for FPGA family. 1848 Enables support for FPGA family.
1848 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX) 1849 (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
1849 1850
1850 CONFIG_FPGA_COUNT 1851 CONFIG_FPGA_COUNT
1851 1852
1852 Specify the number of FPGA devices to support. 1853 Specify the number of FPGA devices to support.
1853 1854
1854 CONFIG_SYS_FPGA_PROG_FEEDBACK 1855 CONFIG_SYS_FPGA_PROG_FEEDBACK
1855 1856
1856 Enable printing of hash marks during FPGA configuration. 1857 Enable printing of hash marks during FPGA configuration.
1857 1858
1858 CONFIG_SYS_FPGA_CHECK_BUSY 1859 CONFIG_SYS_FPGA_CHECK_BUSY
1859 1860
1860 Enable checks on FPGA configuration interface busy 1861 Enable checks on FPGA configuration interface busy
1861 status by the configuration function. This option 1862 status by the configuration function. This option
1862 will require a board or device specific function to 1863 will require a board or device specific function to
1863 be written. 1864 be written.
1864 1865
1865 CONFIG_FPGA_DELAY 1866 CONFIG_FPGA_DELAY
1866 1867
1867 If defined, a function that provides delays in the FPGA 1868 If defined, a function that provides delays in the FPGA
1868 configuration driver. 1869 configuration driver.
1869 1870
1870 CONFIG_SYS_FPGA_CHECK_CTRLC 1871 CONFIG_SYS_FPGA_CHECK_CTRLC
1871 Allow Control-C to interrupt FPGA configuration 1872 Allow Control-C to interrupt FPGA configuration
1872 1873
1873 CONFIG_SYS_FPGA_CHECK_ERROR 1874 CONFIG_SYS_FPGA_CHECK_ERROR
1874 1875
1875 Check for configuration errors during FPGA bitfile 1876 Check for configuration errors during FPGA bitfile
1876 loading. For example, abort during Virtex II 1877 loading. For example, abort during Virtex II
1877 configuration if the INIT_B line goes low (which 1878 configuration if the INIT_B line goes low (which
1878 indicated a CRC error). 1879 indicated a CRC error).
1879 1880
1880 CONFIG_SYS_FPGA_WAIT_INIT 1881 CONFIG_SYS_FPGA_WAIT_INIT
1881 1882
1882 Maximum time to wait for the INIT_B line to deassert 1883 Maximum time to wait for the INIT_B line to deassert
1883 after PROB_B has been deasserted during a Virtex II 1884 after PROB_B has been deasserted during a Virtex II
1884 FPGA configuration sequence. The default time is 500 1885 FPGA configuration sequence. The default time is 500
1885 ms. 1886 ms.
1886 1887
1887 CONFIG_SYS_FPGA_WAIT_BUSY 1888 CONFIG_SYS_FPGA_WAIT_BUSY
1888 1889
1889 Maximum time to wait for BUSY to deassert during 1890 Maximum time to wait for BUSY to deassert during
1890 Virtex II FPGA configuration. The default is 5 ms. 1891 Virtex II FPGA configuration. The default is 5 ms.
1891 1892
1892 CONFIG_SYS_FPGA_WAIT_CONFIG 1893 CONFIG_SYS_FPGA_WAIT_CONFIG
1893 1894
1894 Time to wait after FPGA configuration. The default is 1895 Time to wait after FPGA configuration. The default is
1895 200 ms. 1896 200 ms.
1896 1897
1897 - Configuration Management: 1898 - Configuration Management:
1898 CONFIG_IDENT_STRING 1899 CONFIG_IDENT_STRING
1899 1900
1900 If defined, this string will be added to the U-Boot 1901 If defined, this string will be added to the U-Boot
1901 version information (U_BOOT_VERSION) 1902 version information (U_BOOT_VERSION)
1902 1903
1903 - Vendor Parameter Protection: 1904 - Vendor Parameter Protection:
1904 1905
1905 U-Boot considers the values of the environment 1906 U-Boot considers the values of the environment
1906 variables "serial#" (Board Serial Number) and 1907 variables "serial#" (Board Serial Number) and
1907 "ethaddr" (Ethernet Address) to be parameters that 1908 "ethaddr" (Ethernet Address) to be parameters that
1908 are set once by the board vendor / manufacturer, and 1909 are set once by the board vendor / manufacturer, and
1909 protects these variables from casual modification by 1910 protects these variables from casual modification by
1910 the user. Once set, these variables are read-only, 1911 the user. Once set, these variables are read-only,
1911 and write or delete attempts are rejected. You can 1912 and write or delete attempts are rejected. You can
1912 change this behaviour: 1913 change this behaviour:
1913 1914
1914 If CONFIG_ENV_OVERWRITE is #defined in your config 1915 If CONFIG_ENV_OVERWRITE is #defined in your config
1915 file, the write protection for vendor parameters is 1916 file, the write protection for vendor parameters is
1916 completely disabled. Anybody can change or delete 1917 completely disabled. Anybody can change or delete
1917 these parameters. 1918 these parameters.
1918 1919
1919 Alternatively, if you #define _both_ CONFIG_ETHADDR 1920 Alternatively, if you #define _both_ CONFIG_ETHADDR
1920 _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default 1921 _and_ CONFIG_OVERWRITE_ETHADDR_ONCE, a default
1921 Ethernet address is installed in the environment, 1922 Ethernet address is installed in the environment,
1922 which can be changed exactly ONCE by the user. [The 1923 which can be changed exactly ONCE by the user. [The
1923 serial# is unaffected by this, i. e. it remains 1924 serial# is unaffected by this, i. e. it remains
1924 read-only.] 1925 read-only.]
1925 1926
1926 - Protected RAM: 1927 - Protected RAM:
1927 CONFIG_PRAM 1928 CONFIG_PRAM
1928 1929
1929 Define this variable to enable the reservation of 1930 Define this variable to enable the reservation of
1930 "protected RAM", i. e. RAM which is not overwritten 1931 "protected RAM", i. e. RAM which is not overwritten
1931 by U-Boot. Define CONFIG_PRAM to hold the number of 1932 by U-Boot. Define CONFIG_PRAM to hold the number of
1932 kB you want to reserve for pRAM. You can overwrite 1933 kB you want to reserve for pRAM. You can overwrite
1933 this default value by defining an environment 1934 this default value by defining an environment
1934 variable "pram" to the number of kB you want to 1935 variable "pram" to the number of kB you want to
1935 reserve. Note that the board info structure will 1936 reserve. Note that the board info structure will
1936 still show the full amount of RAM. If pRAM is 1937 still show the full amount of RAM. If pRAM is
1937 reserved, a new environment variable "mem" will 1938 reserved, a new environment variable "mem" will
1938 automatically be defined to hold the amount of 1939 automatically be defined to hold the amount of
1939 remaining RAM in a form that can be passed as boot 1940 remaining RAM in a form that can be passed as boot
1940 argument to Linux, for instance like that: 1941 argument to Linux, for instance like that:
1941 1942
1942 setenv bootargs ... mem=\${mem} 1943 setenv bootargs ... mem=\${mem}
1943 saveenv 1944 saveenv
1944 1945
1945 This way you can tell Linux not to use this memory, 1946 This way you can tell Linux not to use this memory,
1946 either, which results in a memory region that will 1947 either, which results in a memory region that will
1947 not be affected by reboots. 1948 not be affected by reboots.
1948 1949
1949 *WARNING* If your board configuration uses automatic 1950 *WARNING* If your board configuration uses automatic
1950 detection of the RAM size, you must make sure that 1951 detection of the RAM size, you must make sure that
1951 this memory test is non-destructive. So far, the 1952 this memory test is non-destructive. So far, the
1952 following board configurations are known to be 1953 following board configurations are known to be
1953 "pRAM-clean": 1954 "pRAM-clean":
1954 1955
1955 ETX094, IVMS8, IVML24, SPD8xx, TQM8xxL, 1956 ETX094, IVMS8, IVML24, SPD8xx, TQM8xxL,
1956 HERMES, IP860, RPXlite, LWMON, LANTEC, 1957 HERMES, IP860, RPXlite, LWMON, LANTEC,
1957 FLAGADM, TQM8260 1958 FLAGADM, TQM8260
1958 1959
1959 - Error Recovery: 1960 - Error Recovery:
1960 CONFIG_PANIC_HANG 1961 CONFIG_PANIC_HANG
1961 1962
1962 Define this variable to stop the system in case of a 1963 Define this variable to stop the system in case of a
1963 fatal error, so that you have to reset it manually. 1964 fatal error, so that you have to reset it manually.
1964 This is probably NOT a good idea for an embedded 1965 This is probably NOT a good idea for an embedded
1965 system where you want the system to reboot 1966 system where you want the system to reboot
1966 automatically as fast as possible, but it may be 1967 automatically as fast as possible, but it may be
1967 useful during development since you can try to debug 1968 useful during development since you can try to debug
1968 the conditions that lead to the situation. 1969 the conditions that lead to the situation.
1969 1970
1970 CONFIG_NET_RETRY_COUNT 1971 CONFIG_NET_RETRY_COUNT
1971 1972
1972 This variable defines the number of retries for 1973 This variable defines the number of retries for
1973 network operations like ARP, RARP, TFTP, or BOOTP 1974 network operations like ARP, RARP, TFTP, or BOOTP
1974 before giving up the operation. If not defined, a 1975 before giving up the operation. If not defined, a
1975 default value of 5 is used. 1976 default value of 5 is used.
1976 1977
1977 CONFIG_ARP_TIMEOUT 1978 CONFIG_ARP_TIMEOUT
1978 1979
1979 Timeout waiting for an ARP reply in milliseconds. 1980 Timeout waiting for an ARP reply in milliseconds.
1980 1981
1981 - Command Interpreter: 1982 - Command Interpreter:
1982 CONFIG_AUTO_COMPLETE 1983 CONFIG_AUTO_COMPLETE
1983 1984
1984 Enable auto completion of commands using TAB. 1985 Enable auto completion of commands using TAB.
1985 1986
1986 Note that this feature has NOT been implemented yet 1987 Note that this feature has NOT been implemented yet
1987 for the "hush" shell. 1988 for the "hush" shell.
1988 1989
1989 1990
1990 CONFIG_SYS_HUSH_PARSER 1991 CONFIG_SYS_HUSH_PARSER
1991 1992
1992 Define this variable to enable the "hush" shell (from 1993 Define this variable to enable the "hush" shell (from
1993 Busybox) as command line interpreter, thus enabling 1994 Busybox) as command line interpreter, thus enabling
1994 powerful command line syntax like 1995 powerful command line syntax like
1995 if...then...else...fi conditionals or `&&' and '||' 1996 if...then...else...fi conditionals or `&&' and '||'
1996 constructs ("shell scripts"). 1997 constructs ("shell scripts").
1997 1998
1998 If undefined, you get the old, much simpler behaviour 1999 If undefined, you get the old, much simpler behaviour
1999 with a somewhat smaller memory footprint. 2000 with a somewhat smaller memory footprint.
2000 2001
2001 2002
2002 CONFIG_SYS_PROMPT_HUSH_PS2 2003 CONFIG_SYS_PROMPT_HUSH_PS2
2003 2004
2004 This defines the secondary prompt string, which is 2005 This defines the secondary prompt string, which is
2005 printed when the command interpreter needs more input 2006 printed when the command interpreter needs more input
2006 to complete a command. Usually "> ". 2007 to complete a command. Usually "> ".
2007 2008
2008 Note: 2009 Note:
2009 2010
2010 In the current implementation, the local variables 2011 In the current implementation, the local variables
2011 space and global environment variables space are 2012 space and global environment variables space are
2012 separated. Local variables are those you define by 2013 separated. Local variables are those you define by
2013 simply typing `name=value'. To access a local 2014 simply typing `name=value'. To access a local
2014 variable later on, you have write `$name' or 2015 variable later on, you have write `$name' or
2015 `${name}'; to execute the contents of a variable 2016 `${name}'; to execute the contents of a variable
2016 directly type `$name' at the command prompt. 2017 directly type `$name' at the command prompt.
2017 2018
2018 Global environment variables are those you use 2019 Global environment variables are those you use
2019 setenv/printenv to work with. To run a command stored 2020 setenv/printenv to work with. To run a command stored
2020 in such a variable, you need to use the run command, 2021 in such a variable, you need to use the run command,
2021 and you must not use the '$' sign to access them. 2022 and you must not use the '$' sign to access them.
2022 2023
2023 To store commands and special characters in a 2024 To store commands and special characters in a
2024 variable, please use double quotation marks 2025 variable, please use double quotation marks
2025 surrounding the whole text of the variable, instead 2026 surrounding the whole text of the variable, instead
2026 of the backslashes before semicolons and special 2027 of the backslashes before semicolons and special
2027 symbols. 2028 symbols.
2028 2029
2029 - Commandline Editing and History: 2030 - Commandline Editing and History:
2030 CONFIG_CMDLINE_EDITING 2031 CONFIG_CMDLINE_EDITING
2031 2032
2032 Enable editing and History functions for interactive 2033 Enable editing and History functions for interactive
2033 commandline input operations 2034 commandline input operations
2034 2035
2035 - Default Environment: 2036 - Default Environment:
2036 CONFIG_EXTRA_ENV_SETTINGS 2037 CONFIG_EXTRA_ENV_SETTINGS
2037 2038
2038 Define this to contain any number of null terminated 2039 Define this to contain any number of null terminated
2039 strings (variable = value pairs) that will be part of 2040 strings (variable = value pairs) that will be part of
2040 the default environment compiled into the boot image. 2041 the default environment compiled into the boot image.
2041 2042
2042 For example, place something like this in your 2043 For example, place something like this in your
2043 board's config file: 2044 board's config file:
2044 2045
2045 #define CONFIG_EXTRA_ENV_SETTINGS \ 2046 #define CONFIG_EXTRA_ENV_SETTINGS \
2046 "myvar1=value1\0" \ 2047 "myvar1=value1\0" \
2047 "myvar2=value2\0" 2048 "myvar2=value2\0"
2048 2049
2049 Warning: This method is based on knowledge about the 2050 Warning: This method is based on knowledge about the
2050 internal format how the environment is stored by the 2051 internal format how the environment is stored by the
2051 U-Boot code. This is NOT an official, exported 2052 U-Boot code. This is NOT an official, exported
2052 interface! Although it is unlikely that this format 2053 interface! Although it is unlikely that this format
2053 will change soon, there is no guarantee either. 2054 will change soon, there is no guarantee either.
2054 You better know what you are doing here. 2055 You better know what you are doing here.
2055 2056
2056 Note: overly (ab)use of the default environment is 2057 Note: overly (ab)use of the default environment is
2057 discouraged. Make sure to check other ways to preset 2058 discouraged. Make sure to check other ways to preset
2058 the environment like the "source" command or the 2059 the environment like the "source" command or the
2059 boot command first. 2060 boot command first.
2060 2061
2061 - DataFlash Support: 2062 - DataFlash Support:
2062 CONFIG_HAS_DATAFLASH 2063 CONFIG_HAS_DATAFLASH
2063 2064
2064 Defining this option enables DataFlash features and 2065 Defining this option enables DataFlash features and
2065 allows to read/write in Dataflash via the standard 2066 allows to read/write in Dataflash via the standard
2066 commands cp, md... 2067 commands cp, md...
2067 2068
2068 - SystemACE Support: 2069 - SystemACE Support:
2069 CONFIG_SYSTEMACE 2070 CONFIG_SYSTEMACE
2070 2071
2071 Adding this option adds support for Xilinx SystemACE 2072 Adding this option adds support for Xilinx SystemACE
2072 chips attached via some sort of local bus. The address 2073 chips attached via some sort of local bus. The address
2073 of the chip must also be defined in the 2074 of the chip must also be defined in the
2074 CONFIG_SYS_SYSTEMACE_BASE macro. For example: 2075 CONFIG_SYS_SYSTEMACE_BASE macro. For example:
2075 2076
2076 #define CONFIG_SYSTEMACE 2077 #define CONFIG_SYSTEMACE
2077 #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000 2078 #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000
2078 2079
2079 When SystemACE support is added, the "ace" device type 2080 When SystemACE support is added, the "ace" device type
2080 becomes available to the fat commands, i.e. fatls. 2081 becomes available to the fat commands, i.e. fatls.
2081 2082
2082 - TFTP Fixed UDP Port: 2083 - TFTP Fixed UDP Port:
2083 CONFIG_TFTP_PORT 2084 CONFIG_TFTP_PORT
2084 2085
2085 If this is defined, the environment variable tftpsrcp 2086 If this is defined, the environment variable tftpsrcp
2086 is used to supply the TFTP UDP source port value. 2087 is used to supply the TFTP UDP source port value.
2087 If tftpsrcp isn't defined, the normal pseudo-random port 2088 If tftpsrcp isn't defined, the normal pseudo-random port
2088 number generator is used. 2089 number generator is used.
2089 2090
2090 Also, the environment variable tftpdstp is used to supply 2091 Also, the environment variable tftpdstp is used to supply
2091 the TFTP UDP destination port value. If tftpdstp isn't 2092 the TFTP UDP destination port value. If tftpdstp isn't
2092 defined, the normal port 69 is used. 2093 defined, the normal port 69 is used.
2093 2094
2094 The purpose for tftpsrcp is to allow a TFTP server to 2095 The purpose for tftpsrcp is to allow a TFTP server to
2095 blindly start the TFTP transfer using the pre-configured 2096 blindly start the TFTP transfer using the pre-configured
2096 target IP address and UDP port. This has the effect of 2097 target IP address and UDP port. This has the effect of
2097 "punching through" the (Windows XP) firewall, allowing 2098 "punching through" the (Windows XP) firewall, allowing
2098 the remainder of the TFTP transfer to proceed normally. 2099 the remainder of the TFTP transfer to proceed normally.
2099 A better solution is to properly configure the firewall, 2100 A better solution is to properly configure the firewall,
2100 but sometimes that is not allowed. 2101 but sometimes that is not allowed.
2101 2102
2102 - Show boot progress: 2103 - Show boot progress:
2103 CONFIG_SHOW_BOOT_PROGRESS 2104 CONFIG_SHOW_BOOT_PROGRESS
2104 2105
2105 Defining this option allows to add some board- 2106 Defining this option allows to add some board-
2106 specific code (calling a user-provided function 2107 specific code (calling a user-provided function
2107 "show_boot_progress(int)") that enables you to show 2108 "show_boot_progress(int)") that enables you to show
2108 the system's boot progress on some display (for 2109 the system's boot progress on some display (for
2109 example, some LED's) on your board. At the moment, 2110 example, some LED's) on your board. At the moment,
2110 the following checkpoints are implemented: 2111 the following checkpoints are implemented:
2111 2112
2112 Legacy uImage format: 2113 Legacy uImage format:
2113 2114
2114 Arg Where When 2115 Arg Where When
2115 1 common/cmd_bootm.c before attempting to boot an image 2116 1 common/cmd_bootm.c before attempting to boot an image
2116 -1 common/cmd_bootm.c Image header has bad magic number 2117 -1 common/cmd_bootm.c Image header has bad magic number
2117 2 common/cmd_bootm.c Image header has correct magic number 2118 2 common/cmd_bootm.c Image header has correct magic number
2118 -2 common/cmd_bootm.c Image header has bad checksum 2119 -2 common/cmd_bootm.c Image header has bad checksum
2119 3 common/cmd_bootm.c Image header has correct checksum 2120 3 common/cmd_bootm.c Image header has correct checksum
2120 -3 common/cmd_bootm.c Image data has bad checksum 2121 -3 common/cmd_bootm.c Image data has bad checksum
2121 4 common/cmd_bootm.c Image data has correct checksum 2122 4 common/cmd_bootm.c Image data has correct checksum
2122 -4 common/cmd_bootm.c Image is for unsupported architecture 2123 -4 common/cmd_bootm.c Image is for unsupported architecture
2123 5 common/cmd_bootm.c Architecture check OK 2124 5 common/cmd_bootm.c Architecture check OK
2124 -5 common/cmd_bootm.c Wrong Image Type (not kernel, multi) 2125 -5 common/cmd_bootm.c Wrong Image Type (not kernel, multi)
2125 6 common/cmd_bootm.c Image Type check OK 2126 6 common/cmd_bootm.c Image Type check OK
2126 -6 common/cmd_bootm.c gunzip uncompression error 2127 -6 common/cmd_bootm.c gunzip uncompression error
2127 -7 common/cmd_bootm.c Unimplemented compression type 2128 -7 common/cmd_bootm.c Unimplemented compression type
2128 7 common/cmd_bootm.c Uncompression OK 2129 7 common/cmd_bootm.c Uncompression OK
2129 8 common/cmd_bootm.c No uncompress/copy overwrite error 2130 8 common/cmd_bootm.c No uncompress/copy overwrite error
2130 -9 common/cmd_bootm.c Unsupported OS (not Linux, BSD, VxWorks, QNX) 2131 -9 common/cmd_bootm.c Unsupported OS (not Linux, BSD, VxWorks, QNX)
2131 2132
2132 9 common/image.c Start initial ramdisk verification 2133 9 common/image.c Start initial ramdisk verification
2133 -10 common/image.c Ramdisk header has bad magic number 2134 -10 common/image.c Ramdisk header has bad magic number
2134 -11 common/image.c Ramdisk header has bad checksum 2135 -11 common/image.c Ramdisk header has bad checksum
2135 10 common/image.c Ramdisk header is OK 2136 10 common/image.c Ramdisk header is OK
2136 -12 common/image.c Ramdisk data has bad checksum 2137 -12 common/image.c Ramdisk data has bad checksum
2137 11 common/image.c Ramdisk data has correct checksum 2138 11 common/image.c Ramdisk data has correct checksum
2138 12 common/image.c Ramdisk verification complete, start loading 2139 12 common/image.c Ramdisk verification complete, start loading
2139 -13 common/image.c Wrong Image Type (not PPC Linux ramdisk) 2140 -13 common/image.c Wrong Image Type (not PPC Linux ramdisk)
2140 13 common/image.c Start multifile image verification 2141 13 common/image.c Start multifile image verification
2141 14 common/image.c No initial ramdisk, no multifile, continue. 2142 14 common/image.c No initial ramdisk, no multifile, continue.
2142 2143
2143 15 arch/<arch>/lib/bootm.c All preparation done, transferring control to OS 2144 15 arch/<arch>/lib/bootm.c All preparation done, transferring control to OS
2144 2145
2145 -30 arch/powerpc/lib/board.c Fatal error, hang the system 2146 -30 arch/powerpc/lib/board.c Fatal error, hang the system
2146 -31 post/post.c POST test failed, detected by post_output_backlog() 2147 -31 post/post.c POST test failed, detected by post_output_backlog()
2147 -32 post/post.c POST test failed, detected by post_run_single() 2148 -32 post/post.c POST test failed, detected by post_run_single()
2148 2149
2149 34 common/cmd_doc.c before loading a Image from a DOC device 2150 34 common/cmd_doc.c before loading a Image from a DOC device
2150 -35 common/cmd_doc.c Bad usage of "doc" command 2151 -35 common/cmd_doc.c Bad usage of "doc" command
2151 35 common/cmd_doc.c correct usage of "doc" command 2152 35 common/cmd_doc.c correct usage of "doc" command
2152 -36 common/cmd_doc.c No boot device 2153 -36 common/cmd_doc.c No boot device
2153 36 common/cmd_doc.c correct boot device 2154 36 common/cmd_doc.c correct boot device
2154 -37 common/cmd_doc.c Unknown Chip ID on boot device 2155 -37 common/cmd_doc.c Unknown Chip ID on boot device
2155 37 common/cmd_doc.c correct chip ID found, device available 2156 37 common/cmd_doc.c correct chip ID found, device available
2156 -38 common/cmd_doc.c Read Error on boot device 2157 -38 common/cmd_doc.c Read Error on boot device
2157 38 common/cmd_doc.c reading Image header from DOC device OK 2158 38 common/cmd_doc.c reading Image header from DOC device OK
2158 -39 common/cmd_doc.c Image header has bad magic number 2159 -39 common/cmd_doc.c Image header has bad magic number
2159 39 common/cmd_doc.c Image header has correct magic number 2160 39 common/cmd_doc.c Image header has correct magic number
2160 -40 common/cmd_doc.c Error reading Image from DOC device 2161 -40 common/cmd_doc.c Error reading Image from DOC device
2161 40 common/cmd_doc.c Image header has correct magic number 2162 40 common/cmd_doc.c Image header has correct magic number
2162 41 common/cmd_ide.c before loading a Image from a IDE device 2163 41 common/cmd_ide.c before loading a Image from a IDE device
2163 -42 common/cmd_ide.c Bad usage of "ide" command 2164 -42 common/cmd_ide.c Bad usage of "ide" command
2164 42 common/cmd_ide.c correct usage of "ide" command 2165 42 common/cmd_ide.c correct usage of "ide" command
2165 -43 common/cmd_ide.c No boot device 2166 -43 common/cmd_ide.c No boot device
2166 43 common/cmd_ide.c boot device found 2167 43 common/cmd_ide.c boot device found
2167 -44 common/cmd_ide.c Device not available 2168 -44 common/cmd_ide.c Device not available
2168 44 common/cmd_ide.c Device available 2169 44 common/cmd_ide.c Device available
2169 -45 common/cmd_ide.c wrong partition selected 2170 -45 common/cmd_ide.c wrong partition selected
2170 45 common/cmd_ide.c partition selected 2171 45 common/cmd_ide.c partition selected
2171 -46 common/cmd_ide.c Unknown partition table 2172 -46 common/cmd_ide.c Unknown partition table
2172 46 common/cmd_ide.c valid partition table found 2173 46 common/cmd_ide.c valid partition table found
2173 -47 common/cmd_ide.c Invalid partition type 2174 -47 common/cmd_ide.c Invalid partition type
2174 47 common/cmd_ide.c correct partition type 2175 47 common/cmd_ide.c correct partition type
2175 -48 common/cmd_ide.c Error reading Image Header on boot device 2176 -48 common/cmd_ide.c Error reading Image Header on boot device
2176 48 common/cmd_ide.c reading Image Header from IDE device OK 2177 48 common/cmd_ide.c reading Image Header from IDE device OK
2177 -49 common/cmd_ide.c Image header has bad magic number 2178 -49 common/cmd_ide.c Image header has bad magic number
2178 49 common/cmd_ide.c Image header has correct magic number 2179 49 common/cmd_ide.c Image header has correct magic number
2179 -50 common/cmd_ide.c Image header has bad checksum 2180 -50 common/cmd_ide.c Image header has bad checksum
2180 50 common/cmd_ide.c Image header has correct checksum 2181 50 common/cmd_ide.c Image header has correct checksum
2181 -51 common/cmd_ide.c Error reading Image from IDE device 2182 -51 common/cmd_ide.c Error reading Image from IDE device
2182 51 common/cmd_ide.c reading Image from IDE device OK 2183 51 common/cmd_ide.c reading Image from IDE device OK
2183 52 common/cmd_nand.c before loading a Image from a NAND device 2184 52 common/cmd_nand.c before loading a Image from a NAND device
2184 -53 common/cmd_nand.c Bad usage of "nand" command 2185 -53 common/cmd_nand.c Bad usage of "nand" command
2185 53 common/cmd_nand.c correct usage of "nand" command 2186 53 common/cmd_nand.c correct usage of "nand" command
2186 -54 common/cmd_nand.c No boot device 2187 -54 common/cmd_nand.c No boot device
2187 54 common/cmd_nand.c boot device found 2188 54 common/cmd_nand.c boot device found
2188 -55 common/cmd_nand.c Unknown Chip ID on boot device 2189 -55 common/cmd_nand.c Unknown Chip ID on boot device
2189 55 common/cmd_nand.c correct chip ID found, device available 2190 55 common/cmd_nand.c correct chip ID found, device available
2190 -56 common/cmd_nand.c Error reading Image Header on boot device 2191 -56 common/cmd_nand.c Error reading Image Header on boot device
2191 56 common/cmd_nand.c reading Image Header from NAND device OK 2192 56 common/cmd_nand.c reading Image Header from NAND device OK
2192 -57 common/cmd_nand.c Image header has bad magic number 2193 -57 common/cmd_nand.c Image header has bad magic number
2193 57 common/cmd_nand.c Image header has correct magic number 2194 57 common/cmd_nand.c Image header has correct magic number
2194 -58 common/cmd_nand.c Error reading Image from NAND device 2195 -58 common/cmd_nand.c Error reading Image from NAND device
2195 58 common/cmd_nand.c reading Image from NAND device OK 2196 58 common/cmd_nand.c reading Image from NAND device OK
2196 2197
2197 -60 common/env_common.c Environment has a bad CRC, using default 2198 -60 common/env_common.c Environment has a bad CRC, using default
2198 2199
2199 64 net/eth.c starting with Ethernet configuration. 2200 64 net/eth.c starting with Ethernet configuration.
2200 -64 net/eth.c no Ethernet found. 2201 -64 net/eth.c no Ethernet found.
2201 65 net/eth.c Ethernet found. 2202 65 net/eth.c Ethernet found.
2202 2203
2203 -80 common/cmd_net.c usage wrong 2204 -80 common/cmd_net.c usage wrong
2204 80 common/cmd_net.c before calling NetLoop() 2205 80 common/cmd_net.c before calling NetLoop()
2205 -81 common/cmd_net.c some error in NetLoop() occurred 2206 -81 common/cmd_net.c some error in NetLoop() occurred
2206 81 common/cmd_net.c NetLoop() back without error 2207 81 common/cmd_net.c NetLoop() back without error
2207 -82 common/cmd_net.c size == 0 (File with size 0 loaded) 2208 -82 common/cmd_net.c size == 0 (File with size 0 loaded)
2208 82 common/cmd_net.c trying automatic boot 2209 82 common/cmd_net.c trying automatic boot
2209 83 common/cmd_net.c running "source" command 2210 83 common/cmd_net.c running "source" command
2210 -83 common/cmd_net.c some error in automatic boot or "source" command 2211 -83 common/cmd_net.c some error in automatic boot or "source" command
2211 84 common/cmd_net.c end without errors 2212 84 common/cmd_net.c end without errors
2212 2213
2213 FIT uImage format: 2214 FIT uImage format:
2214 2215
2215 Arg Where When 2216 Arg Where When
2216 100 common/cmd_bootm.c Kernel FIT Image has correct format 2217 100 common/cmd_bootm.c Kernel FIT Image has correct format
2217 -100 common/cmd_bootm.c Kernel FIT Image has incorrect format 2218 -100 common/cmd_bootm.c Kernel FIT Image has incorrect format
2218 101 common/cmd_bootm.c No Kernel subimage unit name, using configuration 2219 101 common/cmd_bootm.c No Kernel subimage unit name, using configuration
2219 -101 common/cmd_bootm.c Can't get configuration for kernel subimage 2220 -101 common/cmd_bootm.c Can't get configuration for kernel subimage
2220 102 common/cmd_bootm.c Kernel unit name specified 2221 102 common/cmd_bootm.c Kernel unit name specified
2221 -103 common/cmd_bootm.c Can't get kernel subimage node offset 2222 -103 common/cmd_bootm.c Can't get kernel subimage node offset
2222 103 common/cmd_bootm.c Found configuration node 2223 103 common/cmd_bootm.c Found configuration node
2223 104 common/cmd_bootm.c Got kernel subimage node offset 2224 104 common/cmd_bootm.c Got kernel subimage node offset
2224 -104 common/cmd_bootm.c Kernel subimage hash verification failed 2225 -104 common/cmd_bootm.c Kernel subimage hash verification failed
2225 105 common/cmd_bootm.c Kernel subimage hash verification OK 2226 105 common/cmd_bootm.c Kernel subimage hash verification OK
2226 -105 common/cmd_bootm.c Kernel subimage is for unsupported architecture 2227 -105 common/cmd_bootm.c Kernel subimage is for unsupported architecture
2227 106 common/cmd_bootm.c Architecture check OK 2228 106 common/cmd_bootm.c Architecture check OK
2228 -106 common/cmd_bootm.c Kernel subimage has wrong type 2229 -106 common/cmd_bootm.c Kernel subimage has wrong type
2229 107 common/cmd_bootm.c Kernel subimage type OK 2230 107 common/cmd_bootm.c Kernel subimage type OK
2230 -107 common/cmd_bootm.c Can't get kernel subimage data/size 2231 -107 common/cmd_bootm.c Can't get kernel subimage data/size
2231 108 common/cmd_bootm.c Got kernel subimage data/size 2232 108 common/cmd_bootm.c Got kernel subimage data/size
2232 -108 common/cmd_bootm.c Wrong image type (not legacy, FIT) 2233 -108 common/cmd_bootm.c Wrong image type (not legacy, FIT)
2233 -109 common/cmd_bootm.c Can't get kernel subimage type 2234 -109 common/cmd_bootm.c Can't get kernel subimage type
2234 -110 common/cmd_bootm.c Can't get kernel subimage comp 2235 -110 common/cmd_bootm.c Can't get kernel subimage comp
2235 -111 common/cmd_bootm.c Can't get kernel subimage os 2236 -111 common/cmd_bootm.c Can't get kernel subimage os
2236 -112 common/cmd_bootm.c Can't get kernel subimage load address 2237 -112 common/cmd_bootm.c Can't get kernel subimage load address
2237 -113 common/cmd_bootm.c Image uncompress/copy overwrite error 2238 -113 common/cmd_bootm.c Image uncompress/copy overwrite error
2238 2239
2239 120 common/image.c Start initial ramdisk verification 2240 120 common/image.c Start initial ramdisk verification
2240 -120 common/image.c Ramdisk FIT image has incorrect format 2241 -120 common/image.c Ramdisk FIT image has incorrect format
2241 121 common/image.c Ramdisk FIT image has correct format 2242 121 common/image.c Ramdisk FIT image has correct format
2242 122 common/image.c No ramdisk subimage unit name, using configuration 2243 122 common/image.c No ramdisk subimage unit name, using configuration
2243 -122 common/image.c Can't get configuration for ramdisk subimage 2244 -122 common/image.c Can't get configuration for ramdisk subimage
2244 123 common/image.c Ramdisk unit name specified 2245 123 common/image.c Ramdisk unit name specified
2245 -124 common/image.c Can't get ramdisk subimage node offset 2246 -124 common/image.c Can't get ramdisk subimage node offset
2246 125 common/image.c Got ramdisk subimage node offset 2247 125 common/image.c Got ramdisk subimage node offset
2247 -125 common/image.c Ramdisk subimage hash verification failed 2248 -125 common/image.c Ramdisk subimage hash verification failed
2248 126 common/image.c Ramdisk subimage hash verification OK 2249 126 common/image.c Ramdisk subimage hash verification OK
2249 -126 common/image.c Ramdisk subimage for unsupported architecture 2250 -126 common/image.c Ramdisk subimage for unsupported architecture
2250 127 common/image.c Architecture check OK 2251 127 common/image.c Architecture check OK
2251 -127 common/image.c Can't get ramdisk subimage data/size 2252 -127 common/image.c Can't get ramdisk subimage data/size
2252 128 common/image.c Got ramdisk subimage data/size 2253 128 common/image.c Got ramdisk subimage data/size
2253 129 common/image.c Can't get ramdisk load address 2254 129 common/image.c Can't get ramdisk load address
2254 -129 common/image.c Got ramdisk load address 2255 -129 common/image.c Got ramdisk load address
2255 2256
2256 -130 common/cmd_doc.c Incorrect FIT image format 2257 -130 common/cmd_doc.c Incorrect FIT image format
2257 131 common/cmd_doc.c FIT image format OK 2258 131 common/cmd_doc.c FIT image format OK
2258 2259
2259 -140 common/cmd_ide.c Incorrect FIT image format 2260 -140 common/cmd_ide.c Incorrect FIT image format
2260 141 common/cmd_ide.c FIT image format OK 2261 141 common/cmd_ide.c FIT image format OK
2261 2262
2262 -150 common/cmd_nand.c Incorrect FIT image format 2263 -150 common/cmd_nand.c Incorrect FIT image format
2263 151 common/cmd_nand.c FIT image format OK 2264 151 common/cmd_nand.c FIT image format OK
2264 2265
2265 - Standalone program support: 2266 - Standalone program support:
2266 CONFIG_STANDALONE_LOAD_ADDR 2267 CONFIG_STANDALONE_LOAD_ADDR
2267 2268
2268 This option defines a board specific value for the 2269 This option defines a board specific value for the
2269 address where standalone program gets loaded, thus 2270 address where standalone program gets loaded, thus
2270 overwriting the architecture dependent default 2271 overwriting the architecture dependent default
2271 settings. 2272 settings.
2272 2273
2273 - Frame Buffer Address: 2274 - Frame Buffer Address:
2274 CONFIG_FB_ADDR 2275 CONFIG_FB_ADDR
2275 2276
2276 Define CONFIG_FB_ADDR if you want to use specific 2277 Define CONFIG_FB_ADDR if you want to use specific
2277 address for frame buffer. 2278 address for frame buffer.
2278 Then system will reserve the frame buffer address to 2279 Then system will reserve the frame buffer address to
2279 defined address instead of lcd_setmem (this function 2280 defined address instead of lcd_setmem (this function
2280 grabs the memory for frame buffer by panel's size). 2281 grabs the memory for frame buffer by panel's size).
2281 2282
2282 Please see board_init_f function. 2283 Please see board_init_f function.
2283 2284
2284 - Automatic software updates via TFTP server 2285 - Automatic software updates via TFTP server
2285 CONFIG_UPDATE_TFTP 2286 CONFIG_UPDATE_TFTP
2286 CONFIG_UPDATE_TFTP_CNT_MAX 2287 CONFIG_UPDATE_TFTP_CNT_MAX
2287 CONFIG_UPDATE_TFTP_MSEC_MAX 2288 CONFIG_UPDATE_TFTP_MSEC_MAX
2288 2289
2289 These options enable and control the auto-update feature; 2290 These options enable and control the auto-update feature;
2290 for a more detailed description refer to doc/README.update. 2291 for a more detailed description refer to doc/README.update.
2291 2292
2292 - MTD Support (mtdparts command, UBI support) 2293 - MTD Support (mtdparts command, UBI support)
2293 CONFIG_MTD_DEVICE 2294 CONFIG_MTD_DEVICE
2294 2295
2295 Adds the MTD device infrastructure from the Linux kernel. 2296 Adds the MTD device infrastructure from the Linux kernel.
2296 Needed for mtdparts command support. 2297 Needed for mtdparts command support.
2297 2298
2298 CONFIG_MTD_PARTITIONS 2299 CONFIG_MTD_PARTITIONS
2299 2300
2300 Adds the MTD partitioning infrastructure from the Linux 2301 Adds the MTD partitioning infrastructure from the Linux
2301 kernel. Needed for UBI support. 2302 kernel. Needed for UBI support.
2302 2303
2303 - SPL framework 2304 - SPL framework
2304 CONFIG_SPL 2305 CONFIG_SPL
2305 Enable building of SPL globally. 2306 Enable building of SPL globally.
2306 2307
2307 CONFIG_SPL_TEXT_BASE 2308 CONFIG_SPL_TEXT_BASE
2308 TEXT_BASE for linking the SPL binary. 2309 TEXT_BASE for linking the SPL binary.
2309 2310
2310 CONFIG_SPL_LDSCRIPT 2311 CONFIG_SPL_LDSCRIPT
2311 LDSCRIPT for linking the SPL binary. 2312 LDSCRIPT for linking the SPL binary.
2312 2313
2313 CONFIG_SPL_LIBCOMMON_SUPPORT 2314 CONFIG_SPL_LIBCOMMON_SUPPORT
2314 Support for common/libcommon.o in SPL binary 2315 Support for common/libcommon.o in SPL binary
2315 2316
2316 CONFIG_SPL_LIBDISK_SUPPORT 2317 CONFIG_SPL_LIBDISK_SUPPORT
2317 Support for disk/libdisk.o in SPL binary 2318 Support for disk/libdisk.o in SPL binary
2318 2319
2319 CONFIG_SPL_I2C_SUPPORT 2320 CONFIG_SPL_I2C_SUPPORT
2320 Support for drivers/i2c/libi2c.o in SPL binary 2321 Support for drivers/i2c/libi2c.o in SPL binary
2321 2322
2322 CONFIG_SPL_GPIO_SUPPORT 2323 CONFIG_SPL_GPIO_SUPPORT
2323 Support for drivers/gpio/libgpio.o in SPL binary 2324 Support for drivers/gpio/libgpio.o in SPL binary
2324 2325
2325 CONFIG_SPL_MMC_SUPPORT 2326 CONFIG_SPL_MMC_SUPPORT
2326 Support for drivers/mmc/libmmc.o in SPL binary 2327 Support for drivers/mmc/libmmc.o in SPL binary
2327 2328
2328 CONFIG_SPL_SERIAL_SUPPORT 2329 CONFIG_SPL_SERIAL_SUPPORT
2329 Support for drivers/serial/libserial.o in SPL binary 2330 Support for drivers/serial/libserial.o in SPL binary
2330 2331
2331 CONFIG_SPL_SPI_FLASH_SUPPORT 2332 CONFIG_SPL_SPI_FLASH_SUPPORT
2332 Support for drivers/mtd/spi/libspi_flash.o in SPL binary 2333 Support for drivers/mtd/spi/libspi_flash.o in SPL binary
2333 2334
2334 CONFIG_SPL_SPI_SUPPORT 2335 CONFIG_SPL_SPI_SUPPORT
2335 Support for drivers/spi/libspi.o in SPL binary 2336 Support for drivers/spi/libspi.o in SPL binary
2336 2337
2337 CONFIG_SPL_FAT_SUPPORT 2338 CONFIG_SPL_FAT_SUPPORT
2338 Support for fs/fat/libfat.o in SPL binary 2339 Support for fs/fat/libfat.o in SPL binary
2339 2340
2340 CONFIG_SPL_LIBGENERIC_SUPPORT 2341 CONFIG_SPL_LIBGENERIC_SUPPORT
2341 Support for lib/libgeneric.o in SPL binary 2342 Support for lib/libgeneric.o in SPL binary
2342 2343
2343 Modem Support: 2344 Modem Support:
2344 -------------- 2345 --------------
2345 2346
2346 [so far only for SMDK2400 boards] 2347 [so far only for SMDK2400 boards]
2347 2348
2348 - Modem support enable: 2349 - Modem support enable:
2349 CONFIG_MODEM_SUPPORT 2350 CONFIG_MODEM_SUPPORT
2350 2351
2351 - RTS/CTS Flow control enable: 2352 - RTS/CTS Flow control enable:
2352 CONFIG_HWFLOW 2353 CONFIG_HWFLOW
2353 2354
2354 - Modem debug support: 2355 - Modem debug support:
2355 CONFIG_MODEM_SUPPORT_DEBUG 2356 CONFIG_MODEM_SUPPORT_DEBUG
2356 2357
2357 Enables debugging stuff (char screen[1024], dbg()) 2358 Enables debugging stuff (char screen[1024], dbg())
2358 for modem support. Useful only with BDI2000. 2359 for modem support. Useful only with BDI2000.
2359 2360
2360 - Interrupt support (PPC): 2361 - Interrupt support (PPC):
2361 2362
2362 There are common interrupt_init() and timer_interrupt() 2363 There are common interrupt_init() and timer_interrupt()
2363 for all PPC archs. interrupt_init() calls interrupt_init_cpu() 2364 for all PPC archs. interrupt_init() calls interrupt_init_cpu()
2364 for CPU specific initialization. interrupt_init_cpu() 2365 for CPU specific initialization. interrupt_init_cpu()
2365 should set decrementer_count to appropriate value. If 2366 should set decrementer_count to appropriate value. If
2366 CPU resets decrementer automatically after interrupt 2367 CPU resets decrementer automatically after interrupt
2367 (ppc4xx) it should set decrementer_count to zero. 2368 (ppc4xx) it should set decrementer_count to zero.
2368 timer_interrupt() calls timer_interrupt_cpu() for CPU 2369 timer_interrupt() calls timer_interrupt_cpu() for CPU
2369 specific handling. If board has watchdog / status_led 2370 specific handling. If board has watchdog / status_led
2370 / other_activity_monitor it works automatically from 2371 / other_activity_monitor it works automatically from
2371 general timer_interrupt(). 2372 general timer_interrupt().
2372 2373
2373 - General: 2374 - General:
2374 2375
2375 In the target system modem support is enabled when a 2376 In the target system modem support is enabled when a
2376 specific key (key combination) is pressed during 2377 specific key (key combination) is pressed during
2377 power-on. Otherwise U-Boot will boot normally 2378 power-on. Otherwise U-Boot will boot normally
2378 (autoboot). The key_pressed() function is called from 2379 (autoboot). The key_pressed() function is called from
2379 board_init(). Currently key_pressed() is a dummy 2380 board_init(). Currently key_pressed() is a dummy
2380 function, returning 1 and thus enabling modem 2381 function, returning 1 and thus enabling modem
2381 initialization. 2382 initialization.
2382 2383
2383 If there are no modem init strings in the 2384 If there are no modem init strings in the
2384 environment, U-Boot proceed to autoboot; the 2385 environment, U-Boot proceed to autoboot; the
2385 previous output (banner, info printfs) will be 2386 previous output (banner, info printfs) will be
2386 suppressed, though. 2387 suppressed, though.
2387 2388
2388 See also: doc/README.Modem 2389 See also: doc/README.Modem
2389 2390
2390 2391
2391 Configuration Settings: 2392 Configuration Settings:
2392 ----------------------- 2393 -----------------------
2393 2394
2394 - CONFIG_SYS_LONGHELP: Defined when you want long help messages included; 2395 - CONFIG_SYS_LONGHELP: Defined when you want long help messages included;
2395 undefine this when you're short of memory. 2396 undefine this when you're short of memory.
2396 2397
2397 - CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default 2398 - CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default
2398 width of the commands listed in the 'help' command output. 2399 width of the commands listed in the 'help' command output.
2399 2400
2400 - CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to 2401 - CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to
2401 prompt for user input. 2402 prompt for user input.
2402 2403
2403 - CONFIG_SYS_CBSIZE: Buffer size for input from the Console 2404 - CONFIG_SYS_CBSIZE: Buffer size for input from the Console
2404 2405
2405 - CONFIG_SYS_PBSIZE: Buffer size for Console output 2406 - CONFIG_SYS_PBSIZE: Buffer size for Console output
2406 2407
2407 - CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands 2408 - CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands
2408 2409
2409 - CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to 2410 - CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to
2410 the application (usually a Linux kernel) when it is 2411 the application (usually a Linux kernel) when it is
2411 booted 2412 booted
2412 2413
2413 - CONFIG_SYS_BAUDRATE_TABLE: 2414 - CONFIG_SYS_BAUDRATE_TABLE:
2414 List of legal baudrate settings for this board. 2415 List of legal baudrate settings for this board.
2415 2416
2416 - CONFIG_SYS_CONSOLE_INFO_QUIET 2417 - CONFIG_SYS_CONSOLE_INFO_QUIET
2417 Suppress display of console information at boot. 2418 Suppress display of console information at boot.
2418 2419
2419 - CONFIG_SYS_CONSOLE_IS_IN_ENV 2420 - CONFIG_SYS_CONSOLE_IS_IN_ENV
2420 If the board specific function 2421 If the board specific function
2421 extern int overwrite_console (void); 2422 extern int overwrite_console (void);
2422 returns 1, the stdin, stderr and stdout are switched to the 2423 returns 1, the stdin, stderr and stdout are switched to the
2423 serial port, else the settings in the environment are used. 2424 serial port, else the settings in the environment are used.
2424 2425
2425 - CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 2426 - CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
2426 Enable the call to overwrite_console(). 2427 Enable the call to overwrite_console().
2427 2428
2428 - CONFIG_SYS_CONSOLE_ENV_OVERWRITE 2429 - CONFIG_SYS_CONSOLE_ENV_OVERWRITE
2429 Enable overwrite of previous console environment settings. 2430 Enable overwrite of previous console environment settings.
2430 2431
2431 - CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END: 2432 - CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END:
2432 Begin and End addresses of the area used by the 2433 Begin and End addresses of the area used by the
2433 simple memory test. 2434 simple memory test.
2434 2435
2435 - CONFIG_SYS_ALT_MEMTEST: 2436 - CONFIG_SYS_ALT_MEMTEST:
2436 Enable an alternate, more extensive memory test. 2437 Enable an alternate, more extensive memory test.
2437 2438
2438 - CONFIG_SYS_MEMTEST_SCRATCH: 2439 - CONFIG_SYS_MEMTEST_SCRATCH:
2439 Scratch address used by the alternate memory test 2440 Scratch address used by the alternate memory test
2440 You only need to set this if address zero isn't writeable 2441 You only need to set this if address zero isn't writeable
2441 2442
2442 - CONFIG_SYS_MEM_TOP_HIDE (PPC only): 2443 - CONFIG_SYS_MEM_TOP_HIDE (PPC only):
2443 If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header, 2444 If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header,
2444 this specified memory area will get subtracted from the top 2445 this specified memory area will get subtracted from the top
2445 (end) of RAM and won't get "touched" at all by U-Boot. By 2446 (end) of RAM and won't get "touched" at all by U-Boot. By
2446 fixing up gd->ram_size the Linux kernel should gets passed 2447 fixing up gd->ram_size the Linux kernel should gets passed
2447 the now "corrected" memory size and won't touch it either. 2448 the now "corrected" memory size and won't touch it either.
2448 This should work for arch/ppc and arch/powerpc. Only Linux 2449 This should work for arch/ppc and arch/powerpc. Only Linux
2449 board ports in arch/powerpc with bootwrapper support that 2450 board ports in arch/powerpc with bootwrapper support that
2450 recalculate the memory size from the SDRAM controller setup 2451 recalculate the memory size from the SDRAM controller setup
2451 will have to get fixed in Linux additionally. 2452 will have to get fixed in Linux additionally.
2452 2453
2453 This option can be used as a workaround for the 440EPx/GRx 2454 This option can be used as a workaround for the 440EPx/GRx
2454 CHIP 11 errata where the last 256 bytes in SDRAM shouldn't 2455 CHIP 11 errata where the last 256 bytes in SDRAM shouldn't
2455 be touched. 2456 be touched.
2456 2457
2457 WARNING: Please make sure that this value is a multiple of 2458 WARNING: Please make sure that this value is a multiple of
2458 the Linux page size (normally 4k). If this is not the case, 2459 the Linux page size (normally 4k). If this is not the case,
2459 then the end address of the Linux memory will be located at a 2460 then the end address of the Linux memory will be located at a
2460 non page size aligned address and this could cause major 2461 non page size aligned address and this could cause major
2461 problems. 2462 problems.
2462 2463
2463 - CONFIG_SYS_TFTP_LOADADDR: 2464 - CONFIG_SYS_TFTP_LOADADDR:
2464 Default load address for network file downloads 2465 Default load address for network file downloads
2465 2466
2466 - CONFIG_SYS_LOADS_BAUD_CHANGE: 2467 - CONFIG_SYS_LOADS_BAUD_CHANGE:
2467 Enable temporary baudrate change while serial download 2468 Enable temporary baudrate change while serial download
2468 2469
2469 - CONFIG_SYS_SDRAM_BASE: 2470 - CONFIG_SYS_SDRAM_BASE:
2470 Physical start address of SDRAM. _Must_ be 0 here. 2471 Physical start address of SDRAM. _Must_ be 0 here.
2471 2472
2472 - CONFIG_SYS_MBIO_BASE: 2473 - CONFIG_SYS_MBIO_BASE:
2473 Physical start address of Motherboard I/O (if using a 2474 Physical start address of Motherboard I/O (if using a
2474 Cogent motherboard) 2475 Cogent motherboard)
2475 2476
2476 - CONFIG_SYS_FLASH_BASE: 2477 - CONFIG_SYS_FLASH_BASE:
2477 Physical start address of Flash memory. 2478 Physical start address of Flash memory.
2478 2479
2479 - CONFIG_SYS_MONITOR_BASE: 2480 - CONFIG_SYS_MONITOR_BASE:
2480 Physical start address of boot monitor code (set by 2481 Physical start address of boot monitor code (set by
2481 make config files to be same as the text base address 2482 make config files to be same as the text base address
2482 (CONFIG_SYS_TEXT_BASE) used when linking) - same as 2483 (CONFIG_SYS_TEXT_BASE) used when linking) - same as
2483 CONFIG_SYS_FLASH_BASE when booting from flash. 2484 CONFIG_SYS_FLASH_BASE when booting from flash.
2484 2485
2485 - CONFIG_SYS_MONITOR_LEN: 2486 - CONFIG_SYS_MONITOR_LEN:
2486 Size of memory reserved for monitor code, used to 2487 Size of memory reserved for monitor code, used to
2487 determine _at_compile_time_ (!) if the environment is 2488 determine _at_compile_time_ (!) if the environment is
2488 embedded within the U-Boot image, or in a separate 2489 embedded within the U-Boot image, or in a separate
2489 flash sector. 2490 flash sector.
2490 2491
2491 - CONFIG_SYS_MALLOC_LEN: 2492 - CONFIG_SYS_MALLOC_LEN:
2492 Size of DRAM reserved for malloc() use. 2493 Size of DRAM reserved for malloc() use.
2493 2494
2494 - CONFIG_SYS_BOOTM_LEN: 2495 - CONFIG_SYS_BOOTM_LEN:
2495 Normally compressed uImages are limited to an 2496 Normally compressed uImages are limited to an
2496 uncompressed size of 8 MBytes. If this is not enough, 2497 uncompressed size of 8 MBytes. If this is not enough,
2497 you can define CONFIG_SYS_BOOTM_LEN in your board config file 2498 you can define CONFIG_SYS_BOOTM_LEN in your board config file
2498 to adjust this setting to your needs. 2499 to adjust this setting to your needs.
2499 2500
2500 - CONFIG_SYS_BOOTMAPSZ: 2501 - CONFIG_SYS_BOOTMAPSZ:
2501 Maximum size of memory mapped by the startup code of 2502 Maximum size of memory mapped by the startup code of
2502 the Linux kernel; all data that must be processed by 2503 the Linux kernel; all data that must be processed by
2503 the Linux kernel (bd_info, boot arguments, FDT blob if 2504 the Linux kernel (bd_info, boot arguments, FDT blob if
2504 used) must be put below this limit, unless "bootm_low" 2505 used) must be put below this limit, unless "bootm_low"
2505 enviroment variable is defined and non-zero. In such case 2506 enviroment variable is defined and non-zero. In such case
2506 all data for the Linux kernel must be between "bootm_low" 2507 all data for the Linux kernel must be between "bootm_low"
2507 and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment 2508 and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. The environment
2508 variable "bootm_mapsize" will override the value of 2509 variable "bootm_mapsize" will override the value of
2509 CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined, 2510 CONFIG_SYS_BOOTMAPSZ. If CONFIG_SYS_BOOTMAPSZ is undefined,
2510 then the value in "bootm_size" will be used instead. 2511 then the value in "bootm_size" will be used instead.
2511 2512
2512 - CONFIG_SYS_BOOT_RAMDISK_HIGH: 2513 - CONFIG_SYS_BOOT_RAMDISK_HIGH:
2513 Enable initrd_high functionality. If defined then the 2514 Enable initrd_high functionality. If defined then the
2514 initrd_high feature is enabled and the bootm ramdisk subcommand 2515 initrd_high feature is enabled and the bootm ramdisk subcommand
2515 is enabled. 2516 is enabled.
2516 2517
2517 - CONFIG_SYS_BOOT_GET_CMDLINE: 2518 - CONFIG_SYS_BOOT_GET_CMDLINE:
2518 Enables allocating and saving kernel cmdline in space between 2519 Enables allocating and saving kernel cmdline in space between
2519 "bootm_low" and "bootm_low" + BOOTMAPSZ. 2520 "bootm_low" and "bootm_low" + BOOTMAPSZ.
2520 2521
2521 - CONFIG_SYS_BOOT_GET_KBD: 2522 - CONFIG_SYS_BOOT_GET_KBD:
2522 Enables allocating and saving a kernel copy of the bd_info in 2523 Enables allocating and saving a kernel copy of the bd_info in
2523 space between "bootm_low" and "bootm_low" + BOOTMAPSZ. 2524 space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
2524 2525
2525 - CONFIG_SYS_MAX_FLASH_BANKS: 2526 - CONFIG_SYS_MAX_FLASH_BANKS:
2526 Max number of Flash memory banks 2527 Max number of Flash memory banks
2527 2528
2528 - CONFIG_SYS_MAX_FLASH_SECT: 2529 - CONFIG_SYS_MAX_FLASH_SECT:
2529 Max number of sectors on a Flash chip 2530 Max number of sectors on a Flash chip
2530 2531
2531 - CONFIG_SYS_FLASH_ERASE_TOUT: 2532 - CONFIG_SYS_FLASH_ERASE_TOUT:
2532 Timeout for Flash erase operations (in ms) 2533 Timeout for Flash erase operations (in ms)
2533 2534
2534 - CONFIG_SYS_FLASH_WRITE_TOUT: 2535 - CONFIG_SYS_FLASH_WRITE_TOUT:
2535 Timeout for Flash write operations (in ms) 2536 Timeout for Flash write operations (in ms)
2536 2537
2537 - CONFIG_SYS_FLASH_LOCK_TOUT 2538 - CONFIG_SYS_FLASH_LOCK_TOUT
2538 Timeout for Flash set sector lock bit operation (in ms) 2539 Timeout for Flash set sector lock bit operation (in ms)
2539 2540
2540 - CONFIG_SYS_FLASH_UNLOCK_TOUT 2541 - CONFIG_SYS_FLASH_UNLOCK_TOUT
2541 Timeout for Flash clear lock bits operation (in ms) 2542 Timeout for Flash clear lock bits operation (in ms)
2542 2543
2543 - CONFIG_SYS_FLASH_PROTECTION 2544 - CONFIG_SYS_FLASH_PROTECTION
2544 If defined, hardware flash sectors protection is used 2545 If defined, hardware flash sectors protection is used
2545 instead of U-Boot software protection. 2546 instead of U-Boot software protection.
2546 2547
2547 - CONFIG_SYS_DIRECT_FLASH_TFTP: 2548 - CONFIG_SYS_DIRECT_FLASH_TFTP:
2548 2549
2549 Enable TFTP transfers directly to flash memory; 2550 Enable TFTP transfers directly to flash memory;
2550 without this option such a download has to be 2551 without this option such a download has to be
2551 performed in two steps: (1) download to RAM, and (2) 2552 performed in two steps: (1) download to RAM, and (2)
2552 copy from RAM to flash. 2553 copy from RAM to flash.
2553 2554
2554 The two-step approach is usually more reliable, since 2555 The two-step approach is usually more reliable, since
2555 you can check if the download worked before you erase 2556 you can check if the download worked before you erase
2556 the flash, but in some situations (when system RAM is 2557 the flash, but in some situations (when system RAM is
2557 too limited to allow for a temporary copy of the 2558 too limited to allow for a temporary copy of the
2558 downloaded image) this option may be very useful. 2559 downloaded image) this option may be very useful.
2559 2560
2560 - CONFIG_SYS_FLASH_CFI: 2561 - CONFIG_SYS_FLASH_CFI:
2561 Define if the flash driver uses extra elements in the 2562 Define if the flash driver uses extra elements in the
2562 common flash structure for storing flash geometry. 2563 common flash structure for storing flash geometry.
2563 2564
2564 - CONFIG_FLASH_CFI_DRIVER 2565 - CONFIG_FLASH_CFI_DRIVER
2565 This option also enables the building of the cfi_flash driver 2566 This option also enables the building of the cfi_flash driver
2566 in the drivers directory 2567 in the drivers directory
2567 2568
2568 - CONFIG_FLASH_CFI_MTD 2569 - CONFIG_FLASH_CFI_MTD
2569 This option enables the building of the cfi_mtd driver 2570 This option enables the building of the cfi_mtd driver
2570 in the drivers directory. The driver exports CFI flash 2571 in the drivers directory. The driver exports CFI flash
2571 to the MTD layer. 2572 to the MTD layer.
2572 2573
2573 - CONFIG_SYS_FLASH_USE_BUFFER_WRITE 2574 - CONFIG_SYS_FLASH_USE_BUFFER_WRITE
2574 Use buffered writes to flash. 2575 Use buffered writes to flash.
2575 2576
2576 - CONFIG_FLASH_SPANSION_S29WS_N 2577 - CONFIG_FLASH_SPANSION_S29WS_N
2577 s29ws-n MirrorBit flash has non-standard addresses for buffered 2578 s29ws-n MirrorBit flash has non-standard addresses for buffered
2578 write commands. 2579 write commands.
2579 2580
2580 - CONFIG_SYS_FLASH_QUIET_TEST 2581 - CONFIG_SYS_FLASH_QUIET_TEST
2581 If this option is defined, the common CFI flash doesn't 2582 If this option is defined, the common CFI flash doesn't
2582 print it's warning upon not recognized FLASH banks. This 2583 print it's warning upon not recognized FLASH banks. This
2583 is useful, if some of the configured banks are only 2584 is useful, if some of the configured banks are only
2584 optionally available. 2585 optionally available.
2585 2586
2586 - CONFIG_FLASH_SHOW_PROGRESS 2587 - CONFIG_FLASH_SHOW_PROGRESS
2587 If defined (must be an integer), print out countdown 2588 If defined (must be an integer), print out countdown
2588 digits and dots. Recommended value: 45 (9..1) for 80 2589 digits and dots. Recommended value: 45 (9..1) for 80
2589 column displays, 15 (3..1) for 40 column displays. 2590 column displays, 15 (3..1) for 40 column displays.
2590 2591
2591 - CONFIG_SYS_RX_ETH_BUFFER: 2592 - CONFIG_SYS_RX_ETH_BUFFER:
2592 Defines the number of Ethernet receive buffers. On some 2593 Defines the number of Ethernet receive buffers. On some
2593 Ethernet controllers it is recommended to set this value 2594 Ethernet controllers it is recommended to set this value
2594 to 8 or even higher (EEPRO100 or 405 EMAC), since all 2595 to 8 or even higher (EEPRO100 or 405 EMAC), since all
2595 buffers can be full shortly after enabling the interface 2596 buffers can be full shortly after enabling the interface
2596 on high Ethernet traffic. 2597 on high Ethernet traffic.
2597 Defaults to 4 if not defined. 2598 Defaults to 4 if not defined.
2598 2599
2599 - CONFIG_ENV_MAX_ENTRIES 2600 - CONFIG_ENV_MAX_ENTRIES
2600 2601
2601 Maximum number of entries in the hash table that is used 2602 Maximum number of entries in the hash table that is used
2602 internally to store the environment settings. The default 2603 internally to store the environment settings. The default
2603 setting is supposed to be generous and should work in most 2604 setting is supposed to be generous and should work in most
2604 cases. This setting can be used to tune behaviour; see 2605 cases. This setting can be used to tune behaviour; see
2605 lib/hashtable.c for details. 2606 lib/hashtable.c for details.
2606 2607
2607 The following definitions that deal with the placement and management 2608 The following definitions that deal with the placement and management
2608 of environment data (variable area); in general, we support the 2609 of environment data (variable area); in general, we support the
2609 following configurations: 2610 following configurations:
2610 2611
2611 - CONFIG_BUILD_ENVCRC: 2612 - CONFIG_BUILD_ENVCRC:
2612 2613
2613 Builds up envcrc with the target environment so that external utils 2614 Builds up envcrc with the target environment so that external utils
2614 may easily extract it and embed it in final U-Boot images. 2615 may easily extract it and embed it in final U-Boot images.
2615 2616
2616 - CONFIG_ENV_IS_IN_FLASH: 2617 - CONFIG_ENV_IS_IN_FLASH:
2617 2618
2618 Define this if the environment is in flash memory. 2619 Define this if the environment is in flash memory.
2619 2620
2620 a) The environment occupies one whole flash sector, which is 2621 a) The environment occupies one whole flash sector, which is
2621 "embedded" in the text segment with the U-Boot code. This 2622 "embedded" in the text segment with the U-Boot code. This
2622 happens usually with "bottom boot sector" or "top boot 2623 happens usually with "bottom boot sector" or "top boot
2623 sector" type flash chips, which have several smaller 2624 sector" type flash chips, which have several smaller
2624 sectors at the start or the end. For instance, such a 2625 sectors at the start or the end. For instance, such a
2625 layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In 2626 layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In
2626 such a case you would place the environment in one of the 2627 such a case you would place the environment in one of the
2627 4 kB sectors - with U-Boot code before and after it. With 2628 4 kB sectors - with U-Boot code before and after it. With
2628 "top boot sector" type flash chips, you would put the 2629 "top boot sector" type flash chips, you would put the
2629 environment in one of the last sectors, leaving a gap 2630 environment in one of the last sectors, leaving a gap
2630 between U-Boot and the environment. 2631 between U-Boot and the environment.
2631 2632
2632 - CONFIG_ENV_OFFSET: 2633 - CONFIG_ENV_OFFSET:
2633 2634
2634 Offset of environment data (variable area) to the 2635 Offset of environment data (variable area) to the
2635 beginning of flash memory; for instance, with bottom boot 2636 beginning of flash memory; for instance, with bottom boot
2636 type flash chips the second sector can be used: the offset 2637 type flash chips the second sector can be used: the offset
2637 for this sector is given here. 2638 for this sector is given here.
2638 2639
2639 CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE. 2640 CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE.
2640 2641
2641 - CONFIG_ENV_ADDR: 2642 - CONFIG_ENV_ADDR:
2642 2643
2643 This is just another way to specify the start address of 2644 This is just another way to specify the start address of
2644 the flash sector containing the environment (instead of 2645 the flash sector containing the environment (instead of
2645 CONFIG_ENV_OFFSET). 2646 CONFIG_ENV_OFFSET).
2646 2647
2647 - CONFIG_ENV_SECT_SIZE: 2648 - CONFIG_ENV_SECT_SIZE:
2648 2649
2649 Size of the sector containing the environment. 2650 Size of the sector containing the environment.
2650 2651
2651 2652
2652 b) Sometimes flash chips have few, equal sized, BIG sectors. 2653 b) Sometimes flash chips have few, equal sized, BIG sectors.
2653 In such a case you don't want to spend a whole sector for 2654 In such a case you don't want to spend a whole sector for
2654 the environment. 2655 the environment.
2655 2656
2656 - CONFIG_ENV_SIZE: 2657 - CONFIG_ENV_SIZE:
2657 2658
2658 If you use this in combination with CONFIG_ENV_IS_IN_FLASH 2659 If you use this in combination with CONFIG_ENV_IS_IN_FLASH
2659 and CONFIG_ENV_SECT_SIZE, you can specify to use only a part 2660 and CONFIG_ENV_SECT_SIZE, you can specify to use only a part
2660 of this flash sector for the environment. This saves 2661 of this flash sector for the environment. This saves
2661 memory for the RAM copy of the environment. 2662 memory for the RAM copy of the environment.
2662 2663
2663 It may also save flash memory if you decide to use this 2664 It may also save flash memory if you decide to use this
2664 when your environment is "embedded" within U-Boot code, 2665 when your environment is "embedded" within U-Boot code,
2665 since then the remainder of the flash sector could be used 2666 since then the remainder of the flash sector could be used
2666 for U-Boot code. It should be pointed out that this is 2667 for U-Boot code. It should be pointed out that this is
2667 STRONGLY DISCOURAGED from a robustness point of view: 2668 STRONGLY DISCOURAGED from a robustness point of view:
2668 updating the environment in flash makes it always 2669 updating the environment in flash makes it always
2669 necessary to erase the WHOLE sector. If something goes 2670 necessary to erase the WHOLE sector. If something goes
2670 wrong before the contents has been restored from a copy in 2671 wrong before the contents has been restored from a copy in
2671 RAM, your target system will be dead. 2672 RAM, your target system will be dead.
2672 2673
2673 - CONFIG_ENV_ADDR_REDUND 2674 - CONFIG_ENV_ADDR_REDUND
2674 CONFIG_ENV_SIZE_REDUND 2675 CONFIG_ENV_SIZE_REDUND
2675 2676
2676 These settings describe a second storage area used to hold 2677 These settings describe a second storage area used to hold
2677 a redundant copy of the environment data, so that there is 2678 a redundant copy of the environment data, so that there is
2678 a valid backup copy in case there is a power failure during 2679 a valid backup copy in case there is a power failure during
2679 a "saveenv" operation. 2680 a "saveenv" operation.
2680 2681
2681 BE CAREFUL! Any changes to the flash layout, and some changes to the 2682 BE CAREFUL! Any changes to the flash layout, and some changes to the
2682 source code will make it necessary to adapt <board>/u-boot.lds* 2683 source code will make it necessary to adapt <board>/u-boot.lds*
2683 accordingly! 2684 accordingly!
2684 2685
2685 2686
2686 - CONFIG_ENV_IS_IN_NVRAM: 2687 - CONFIG_ENV_IS_IN_NVRAM:
2687 2688
2688 Define this if you have some non-volatile memory device 2689 Define this if you have some non-volatile memory device
2689 (NVRAM, battery buffered SRAM) which you want to use for the 2690 (NVRAM, battery buffered SRAM) which you want to use for the
2690 environment. 2691 environment.
2691 2692
2692 - CONFIG_ENV_ADDR: 2693 - CONFIG_ENV_ADDR:
2693 - CONFIG_ENV_SIZE: 2694 - CONFIG_ENV_SIZE:
2694 2695
2695 These two #defines are used to determine the memory area you 2696 These two #defines are used to determine the memory area you
2696 want to use for environment. It is assumed that this memory 2697 want to use for environment. It is assumed that this memory
2697 can just be read and written to, without any special 2698 can just be read and written to, without any special
2698 provision. 2699 provision.
2699 2700
2700 BE CAREFUL! The first access to the environment happens quite early 2701 BE CAREFUL! The first access to the environment happens quite early
2701 in U-Boot initalization (when we try to get the setting of for the 2702 in U-Boot initalization (when we try to get the setting of for the
2702 console baudrate). You *MUST* have mapped your NVRAM area then, or 2703 console baudrate). You *MUST* have mapped your NVRAM area then, or
2703 U-Boot will hang. 2704 U-Boot will hang.
2704 2705
2705 Please note that even with NVRAM we still use a copy of the 2706 Please note that even with NVRAM we still use a copy of the
2706 environment in RAM: we could work on NVRAM directly, but we want to 2707 environment in RAM: we could work on NVRAM directly, but we want to
2707 keep settings there always unmodified except somebody uses "saveenv" 2708 keep settings there always unmodified except somebody uses "saveenv"
2708 to save the current settings. 2709 to save the current settings.
2709 2710
2710 2711
2711 - CONFIG_ENV_IS_IN_EEPROM: 2712 - CONFIG_ENV_IS_IN_EEPROM:
2712 2713
2713 Use this if you have an EEPROM or similar serial access 2714 Use this if you have an EEPROM or similar serial access
2714 device and a driver for it. 2715 device and a driver for it.
2715 2716
2716 - CONFIG_ENV_OFFSET: 2717 - CONFIG_ENV_OFFSET:
2717 - CONFIG_ENV_SIZE: 2718 - CONFIG_ENV_SIZE:
2718 2719
2719 These two #defines specify the offset and size of the 2720 These two #defines specify the offset and size of the
2720 environment area within the total memory of your EEPROM. 2721 environment area within the total memory of your EEPROM.
2721 2722
2722 - CONFIG_SYS_I2C_EEPROM_ADDR: 2723 - CONFIG_SYS_I2C_EEPROM_ADDR:
2723 If defined, specified the chip address of the EEPROM device. 2724 If defined, specified the chip address of the EEPROM device.
2724 The default address is zero. 2725 The default address is zero.
2725 2726
2726 - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS: 2727 - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS:
2727 If defined, the number of bits used to address bytes in a 2728 If defined, the number of bits used to address bytes in a
2728 single page in the EEPROM device. A 64 byte page, for example 2729 single page in the EEPROM device. A 64 byte page, for example
2729 would require six bits. 2730 would require six bits.
2730 2731
2731 - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS: 2732 - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS:
2732 If defined, the number of milliseconds to delay between 2733 If defined, the number of milliseconds to delay between
2733 page writes. The default is zero milliseconds. 2734 page writes. The default is zero milliseconds.
2734 2735
2735 - CONFIG_SYS_I2C_EEPROM_ADDR_LEN: 2736 - CONFIG_SYS_I2C_EEPROM_ADDR_LEN:
2736 The length in bytes of the EEPROM memory array address. Note 2737 The length in bytes of the EEPROM memory array address. Note
2737 that this is NOT the chip address length! 2738 that this is NOT the chip address length!
2738 2739
2739 - CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW: 2740 - CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW:
2740 EEPROM chips that implement "address overflow" are ones 2741 EEPROM chips that implement "address overflow" are ones
2741 like Catalyst 24WC04/08/16 which has 9/10/11 bits of 2742 like Catalyst 24WC04/08/16 which has 9/10/11 bits of
2742 address and the extra bits end up in the "chip address" bit 2743 address and the extra bits end up in the "chip address" bit
2743 slots. This makes a 24WC08 (1Kbyte) chip look like four 256 2744 slots. This makes a 24WC08 (1Kbyte) chip look like four 256
2744 byte chips. 2745 byte chips.
2745 2746
2746 Note that we consider the length of the address field to 2747 Note that we consider the length of the address field to
2747 still be one byte because the extra address bits are hidden 2748 still be one byte because the extra address bits are hidden
2748 in the chip address. 2749 in the chip address.
2749 2750
2750 - CONFIG_SYS_EEPROM_SIZE: 2751 - CONFIG_SYS_EEPROM_SIZE:
2751 The size in bytes of the EEPROM device. 2752 The size in bytes of the EEPROM device.
2752 2753
2753 - CONFIG_ENV_EEPROM_IS_ON_I2C 2754 - CONFIG_ENV_EEPROM_IS_ON_I2C
2754 define this, if you have I2C and SPI activated, and your 2755 define this, if you have I2C and SPI activated, and your
2755 EEPROM, which holds the environment, is on the I2C bus. 2756 EEPROM, which holds the environment, is on the I2C bus.
2756 2757
2757 - CONFIG_I2C_ENV_EEPROM_BUS 2758 - CONFIG_I2C_ENV_EEPROM_BUS
2758 if you have an Environment on an EEPROM reached over 2759 if you have an Environment on an EEPROM reached over
2759 I2C muxes, you can define here, how to reach this 2760 I2C muxes, you can define here, how to reach this
2760 EEPROM. For example: 2761 EEPROM. For example:
2761 2762
2762 #define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0" 2763 #define CONFIG_I2C_ENV_EEPROM_BUS "pca9547:70:d\0"
2763 2764
2764 EEPROM which holds the environment, is reached over 2765 EEPROM which holds the environment, is reached over
2765 a pca9547 i2c mux with address 0x70, channel 3. 2766 a pca9547 i2c mux with address 0x70, channel 3.
2766 2767
2767 - CONFIG_ENV_IS_IN_DATAFLASH: 2768 - CONFIG_ENV_IS_IN_DATAFLASH:
2768 2769
2769 Define this if you have a DataFlash memory device which you 2770 Define this if you have a DataFlash memory device which you
2770 want to use for the environment. 2771 want to use for the environment.
2771 2772
2772 - CONFIG_ENV_OFFSET: 2773 - CONFIG_ENV_OFFSET:
2773 - CONFIG_ENV_ADDR: 2774 - CONFIG_ENV_ADDR:
2774 - CONFIG_ENV_SIZE: 2775 - CONFIG_ENV_SIZE:
2775 2776
2776 These three #defines specify the offset and size of the 2777 These three #defines specify the offset and size of the
2777 environment area within the total memory of your DataFlash placed 2778 environment area within the total memory of your DataFlash placed
2778 at the specified address. 2779 at the specified address.
2779 2780
2780 - CONFIG_ENV_IS_IN_NAND: 2781 - CONFIG_ENV_IS_IN_NAND:
2781 2782
2782 Define this if you have a NAND device which you want to use 2783 Define this if you have a NAND device which you want to use
2783 for the environment. 2784 for the environment.
2784 2785
2785 - CONFIG_ENV_OFFSET: 2786 - CONFIG_ENV_OFFSET:
2786 - CONFIG_ENV_SIZE: 2787 - CONFIG_ENV_SIZE:
2787 2788
2788 These two #defines specify the offset and size of the environment 2789 These two #defines specify the offset and size of the environment
2789 area within the first NAND device. CONFIG_ENV_OFFSET must be 2790 area within the first NAND device. CONFIG_ENV_OFFSET must be
2790 aligned to an erase block boundary. 2791 aligned to an erase block boundary.
2791 2792
2792 - CONFIG_ENV_OFFSET_REDUND (optional): 2793 - CONFIG_ENV_OFFSET_REDUND (optional):
2793 2794
2794 This setting describes a second storage area of CONFIG_ENV_SIZE 2795 This setting describes a second storage area of CONFIG_ENV_SIZE
2795 size used to hold a redundant copy of the environment data, so 2796 size used to hold a redundant copy of the environment data, so
2796 that there is a valid backup copy in case there is a power failure 2797 that there is a valid backup copy in case there is a power failure
2797 during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be 2798 during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be
2798 aligned to an erase block boundary. 2799 aligned to an erase block boundary.
2799 2800
2800 - CONFIG_ENV_RANGE (optional): 2801 - CONFIG_ENV_RANGE (optional):
2801 2802
2802 Specifies the length of the region in which the environment 2803 Specifies the length of the region in which the environment
2803 can be written. This should be a multiple of the NAND device's 2804 can be written. This should be a multiple of the NAND device's
2804 block size. Specifying a range with more erase blocks than 2805 block size. Specifying a range with more erase blocks than
2805 are needed to hold CONFIG_ENV_SIZE allows bad blocks within 2806 are needed to hold CONFIG_ENV_SIZE allows bad blocks within
2806 the range to be avoided. 2807 the range to be avoided.
2807 2808
2808 - CONFIG_ENV_OFFSET_OOB (optional): 2809 - CONFIG_ENV_OFFSET_OOB (optional):
2809 2810
2810 Enables support for dynamically retrieving the offset of the 2811 Enables support for dynamically retrieving the offset of the
2811 environment from block zero's out-of-band data. The 2812 environment from block zero's out-of-band data. The
2812 "nand env.oob" command can be used to record this offset. 2813 "nand env.oob" command can be used to record this offset.
2813 Currently, CONFIG_ENV_OFFSET_REDUND is not supported when 2814 Currently, CONFIG_ENV_OFFSET_REDUND is not supported when
2814 using CONFIG_ENV_OFFSET_OOB. 2815 using CONFIG_ENV_OFFSET_OOB.
2815 2816
2816 - CONFIG_NAND_ENV_DST 2817 - CONFIG_NAND_ENV_DST
2817 2818
2818 Defines address in RAM to which the nand_spl code should copy the 2819 Defines address in RAM to which the nand_spl code should copy the
2819 environment. If redundant environment is used, it will be copied to 2820 environment. If redundant environment is used, it will be copied to
2820 CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE. 2821 CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.
2821 2822
2822 - CONFIG_SYS_SPI_INIT_OFFSET 2823 - CONFIG_SYS_SPI_INIT_OFFSET
2823 2824
2824 Defines offset to the initial SPI buffer area in DPRAM. The 2825 Defines offset to the initial SPI buffer area in DPRAM. The
2825 area is used at an early stage (ROM part) if the environment 2826 area is used at an early stage (ROM part) if the environment
2826 is configured to reside in the SPI EEPROM: We need a 520 byte 2827 is configured to reside in the SPI EEPROM: We need a 520 byte
2827 scratch DPRAM area. It is used between the two initialization 2828 scratch DPRAM area. It is used between the two initialization
2828 calls (spi_init_f() and spi_init_r()). A value of 0xB00 seems 2829 calls (spi_init_f() and spi_init_r()). A value of 0xB00 seems
2829 to be a good choice since it makes it far enough from the 2830 to be a good choice since it makes it far enough from the
2830 start of the data area as well as from the stack pointer. 2831 start of the data area as well as from the stack pointer.
2831 2832
2832 Please note that the environment is read-only until the monitor 2833 Please note that the environment is read-only until the monitor
2833 has been relocated to RAM and a RAM copy of the environment has been 2834 has been relocated to RAM and a RAM copy of the environment has been
2834 created; also, when using EEPROM you will have to use getenv_f() 2835 created; also, when using EEPROM you will have to use getenv_f()
2835 until then to read environment variables. 2836 until then to read environment variables.
2836 2837
2837 The environment is protected by a CRC32 checksum. Before the monitor 2838 The environment is protected by a CRC32 checksum. Before the monitor
2838 is relocated into RAM, as a result of a bad CRC you will be working 2839 is relocated into RAM, as a result of a bad CRC you will be working
2839 with the compiled-in default environment - *silently*!!! [This is 2840 with the compiled-in default environment - *silently*!!! [This is
2840 necessary, because the first environment variable we need is the 2841 necessary, because the first environment variable we need is the
2841 "baudrate" setting for the console - if we have a bad CRC, we don't 2842 "baudrate" setting for the console - if we have a bad CRC, we don't
2842 have any device yet where we could complain.] 2843 have any device yet where we could complain.]
2843 2844
2844 Note: once the monitor has been relocated, then it will complain if 2845 Note: once the monitor has been relocated, then it will complain if
2845 the default environment is used; a new CRC is computed as soon as you 2846 the default environment is used; a new CRC is computed as soon as you
2846 use the "saveenv" command to store a valid environment. 2847 use the "saveenv" command to store a valid environment.
2847 2848
2848 - CONFIG_SYS_FAULT_ECHO_LINK_DOWN: 2849 - CONFIG_SYS_FAULT_ECHO_LINK_DOWN:
2849 Echo the inverted Ethernet link state to the fault LED. 2850 Echo the inverted Ethernet link state to the fault LED.
2850 2851
2851 Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR 2852 Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR
2852 also needs to be defined. 2853 also needs to be defined.
2853 2854
2854 - CONFIG_SYS_FAULT_MII_ADDR: 2855 - CONFIG_SYS_FAULT_MII_ADDR:
2855 MII address of the PHY to check for the Ethernet link state. 2856 MII address of the PHY to check for the Ethernet link state.
2856 2857
2857 - CONFIG_NS16550_MIN_FUNCTIONS: 2858 - CONFIG_NS16550_MIN_FUNCTIONS:
2858 Define this if you desire to only have use of the NS16550_init 2859 Define this if you desire to only have use of the NS16550_init
2859 and NS16550_putc functions for the serial driver located at 2860 and NS16550_putc functions for the serial driver located at
2860 drivers/serial/ns16550.c. This option is useful for saving 2861 drivers/serial/ns16550.c. This option is useful for saving
2861 space for already greatly restricted images, including but not 2862 space for already greatly restricted images, including but not
2862 limited to NAND_SPL configurations. 2863 limited to NAND_SPL configurations.
2863 2864
2864 Low Level (hardware related) configuration options: 2865 Low Level (hardware related) configuration options:
2865 --------------------------------------------------- 2866 ---------------------------------------------------
2866 2867
2867 - CONFIG_SYS_CACHELINE_SIZE: 2868 - CONFIG_SYS_CACHELINE_SIZE:
2868 Cache Line Size of the CPU. 2869 Cache Line Size of the CPU.
2869 2870
2870 - CONFIG_SYS_DEFAULT_IMMR: 2871 - CONFIG_SYS_DEFAULT_IMMR:
2871 Default address of the IMMR after system reset. 2872 Default address of the IMMR after system reset.
2872 2873
2873 Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU, 2874 Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU,
2874 and RPXsuper) to be able to adjust the position of 2875 and RPXsuper) to be able to adjust the position of
2875 the IMMR register after a reset. 2876 the IMMR register after a reset.
2876 2877
2877 - CONFIG_SYS_CCSRBAR_DEFAULT: 2878 - CONFIG_SYS_CCSRBAR_DEFAULT:
2878 Default (power-on reset) physical address of CCSR on Freescale 2879 Default (power-on reset) physical address of CCSR on Freescale
2879 PowerPC SOCs. 2880 PowerPC SOCs.
2880 2881
2881 - CONFIG_SYS_CCSRBAR: 2882 - CONFIG_SYS_CCSRBAR:
2882 Virtual address of CCSR. On a 32-bit build, this is typically 2883 Virtual address of CCSR. On a 32-bit build, this is typically
2883 the same value as CONFIG_SYS_CCSRBAR_DEFAULT. 2884 the same value as CONFIG_SYS_CCSRBAR_DEFAULT.
2884 2885
2885 CONFIG_SYS_DEFAULT_IMMR must also be set to this value, 2886 CONFIG_SYS_DEFAULT_IMMR must also be set to this value,
2886 for cross-platform code that uses that macro instead. 2887 for cross-platform code that uses that macro instead.
2887 2888
2888 - CONFIG_SYS_CCSRBAR_PHYS: 2889 - CONFIG_SYS_CCSRBAR_PHYS:
2889 Physical address of CCSR. CCSR can be relocated to a new 2890 Physical address of CCSR. CCSR can be relocated to a new
2890 physical address, if desired. In this case, this macro should 2891 physical address, if desired. In this case, this macro should
2891 be set to that address. Otherwise, it should be set to the 2892 be set to that address. Otherwise, it should be set to the
2892 same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR 2893 same value as CONFIG_SYS_CCSRBAR_DEFAULT. For example, CCSR
2893 is typically relocated on 36-bit builds. It is recommended 2894 is typically relocated on 36-bit builds. It is recommended
2894 that this macro be defined via the _HIGH and _LOW macros: 2895 that this macro be defined via the _HIGH and _LOW macros:
2895 2896
2896 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH 2897 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH
2897 * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW) 2898 * 1ull) << 32 | CONFIG_SYS_CCSRBAR_PHYS_LOW)
2898 2899
2899 - CONFIG_SYS_CCSRBAR_PHYS_HIGH: 2900 - CONFIG_SYS_CCSRBAR_PHYS_HIGH:
2900 Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically 2901 Bits 33-36 of CONFIG_SYS_CCSRBAR_PHYS. This value is typically
2901 either 0 (32-bit build) or 0xF (36-bit build). This macro is 2902 either 0 (32-bit build) or 0xF (36-bit build). This macro is
2902 used in assembly code, so it must not contain typecasts or 2903 used in assembly code, so it must not contain typecasts or
2903 integer size suffixes (e.g. "ULL"). 2904 integer size suffixes (e.g. "ULL").
2904 2905
2905 - CONFIG_SYS_CCSRBAR_PHYS_LOW: 2906 - CONFIG_SYS_CCSRBAR_PHYS_LOW:
2906 Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is 2907 Lower 32-bits of CONFIG_SYS_CCSRBAR_PHYS. This macro is
2907 used in assembly code, so it must not contain typecasts or 2908 used in assembly code, so it must not contain typecasts or
2908 integer size suffixes (e.g. "ULL"). 2909 integer size suffixes (e.g. "ULL").
2909 2910
2910 - CONFIG_SYS_CCSR_DO_NOT_RELOCATE: 2911 - CONFIG_SYS_CCSR_DO_NOT_RELOCATE:
2911 If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be 2912 If this macro is defined, then CONFIG_SYS_CCSRBAR_PHYS will be
2912 forced to a value that ensures that CCSR is not relocated. 2913 forced to a value that ensures that CCSR is not relocated.
2913 2914
2914 - Floppy Disk Support: 2915 - Floppy Disk Support:
2915 CONFIG_SYS_FDC_DRIVE_NUMBER 2916 CONFIG_SYS_FDC_DRIVE_NUMBER
2916 2917
2917 the default drive number (default value 0) 2918 the default drive number (default value 0)
2918 2919
2919 CONFIG_SYS_ISA_IO_STRIDE 2920 CONFIG_SYS_ISA_IO_STRIDE
2920 2921
2921 defines the spacing between FDC chipset registers 2922 defines the spacing between FDC chipset registers
2922 (default value 1) 2923 (default value 1)
2923 2924
2924 CONFIG_SYS_ISA_IO_OFFSET 2925 CONFIG_SYS_ISA_IO_OFFSET
2925 2926
2926 defines the offset of register from address. It 2927 defines the offset of register from address. It
2927 depends on which part of the data bus is connected to 2928 depends on which part of the data bus is connected to
2928 the FDC chipset. (default value 0) 2929 the FDC chipset. (default value 0)
2929 2930
2930 If CONFIG_SYS_ISA_IO_STRIDE CONFIG_SYS_ISA_IO_OFFSET and 2931 If CONFIG_SYS_ISA_IO_STRIDE CONFIG_SYS_ISA_IO_OFFSET and
2931 CONFIG_SYS_FDC_DRIVE_NUMBER are undefined, they take their 2932 CONFIG_SYS_FDC_DRIVE_NUMBER are undefined, they take their
2932 default value. 2933 default value.
2933 2934
2934 if CONFIG_SYS_FDC_HW_INIT is defined, then the function 2935 if CONFIG_SYS_FDC_HW_INIT is defined, then the function
2935 fdc_hw_init() is called at the beginning of the FDC 2936 fdc_hw_init() is called at the beginning of the FDC
2936 setup. fdc_hw_init() must be provided by the board 2937 setup. fdc_hw_init() must be provided by the board
2937 source code. It is used to make hardware dependant 2938 source code. It is used to make hardware dependant
2938 initializations. 2939 initializations.
2939 2940
2940 - CONFIG_IDE_AHB: 2941 - CONFIG_IDE_AHB:
2941 Most IDE controllers were designed to be connected with PCI 2942 Most IDE controllers were designed to be connected with PCI
2942 interface. Only few of them were designed for AHB interface. 2943 interface. Only few of them were designed for AHB interface.
2943 When software is doing ATA command and data transfer to 2944 When software is doing ATA command and data transfer to
2944 IDE devices through IDE-AHB controller, some additional 2945 IDE devices through IDE-AHB controller, some additional
2945 registers accessing to these kind of IDE-AHB controller 2946 registers accessing to these kind of IDE-AHB controller
2946 is requierd. 2947 is requierd.
2947 2948
2948 - CONFIG_SYS_IMMR: Physical address of the Internal Memory. 2949 - CONFIG_SYS_IMMR: Physical address of the Internal Memory.
2949 DO NOT CHANGE unless you know exactly what you're 2950 DO NOT CHANGE unless you know exactly what you're
2950 doing! (11-4) [MPC8xx/82xx systems only] 2951 doing! (11-4) [MPC8xx/82xx systems only]
2951 2952
2952 - CONFIG_SYS_INIT_RAM_ADDR: 2953 - CONFIG_SYS_INIT_RAM_ADDR:
2953 2954
2954 Start address of memory area that can be used for 2955 Start address of memory area that can be used for
2955 initial data and stack; please note that this must be 2956 initial data and stack; please note that this must be
2956 writable memory that is working WITHOUT special 2957 writable memory that is working WITHOUT special
2957 initialization, i. e. you CANNOT use normal RAM which 2958 initialization, i. e. you CANNOT use normal RAM which
2958 will become available only after programming the 2959 will become available only after programming the
2959 memory controller and running certain initialization 2960 memory controller and running certain initialization
2960 sequences. 2961 sequences.
2961 2962
2962 U-Boot uses the following memory types: 2963 U-Boot uses the following memory types:
2963 - MPC8xx and MPC8260: IMMR (internal memory of the CPU) 2964 - MPC8xx and MPC8260: IMMR (internal memory of the CPU)
2964 - MPC824X: data cache 2965 - MPC824X: data cache
2965 - PPC4xx: data cache 2966 - PPC4xx: data cache
2966 2967
2967 - CONFIG_SYS_GBL_DATA_OFFSET: 2968 - CONFIG_SYS_GBL_DATA_OFFSET:
2968 2969
2969 Offset of the initial data structure in the memory 2970 Offset of the initial data structure in the memory
2970 area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually 2971 area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
2971 CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial 2972 CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
2972 data is located at the end of the available space 2973 data is located at the end of the available space
2973 (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE - 2974 (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
2974 CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just 2975 CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just
2975 below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR + 2976 below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
2976 CONFIG_SYS_GBL_DATA_OFFSET) downward. 2977 CONFIG_SYS_GBL_DATA_OFFSET) downward.
2977 2978
2978 Note: 2979 Note:
2979 On the MPC824X (or other systems that use the data 2980 On the MPC824X (or other systems that use the data
2980 cache for initial memory) the address chosen for 2981 cache for initial memory) the address chosen for
2981 CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must 2982 CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must
2982 point to an otherwise UNUSED address space between 2983 point to an otherwise UNUSED address space between
2983 the top of RAM and the start of the PCI space. 2984 the top of RAM and the start of the PCI space.
2984 2985
2985 - CONFIG_SYS_SIUMCR: SIU Module Configuration (11-6) 2986 - CONFIG_SYS_SIUMCR: SIU Module Configuration (11-6)
2986 2987
2987 - CONFIG_SYS_SYPCR: System Protection Control (11-9) 2988 - CONFIG_SYS_SYPCR: System Protection Control (11-9)
2988 2989
2989 - CONFIG_SYS_TBSCR: Time Base Status and Control (11-26) 2990 - CONFIG_SYS_TBSCR: Time Base Status and Control (11-26)
2990 2991
2991 - CONFIG_SYS_PISCR: Periodic Interrupt Status and Control (11-31) 2992 - CONFIG_SYS_PISCR: Periodic Interrupt Status and Control (11-31)
2992 2993
2993 - CONFIG_SYS_PLPRCR: PLL, Low-Power, and Reset Control Register (15-30) 2994 - CONFIG_SYS_PLPRCR: PLL, Low-Power, and Reset Control Register (15-30)
2994 2995
2995 - CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27) 2996 - CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27)
2996 2997
2997 - CONFIG_SYS_OR_TIMING_SDRAM: 2998 - CONFIG_SYS_OR_TIMING_SDRAM:
2998 SDRAM timing 2999 SDRAM timing
2999 3000
3000 - CONFIG_SYS_MAMR_PTA: 3001 - CONFIG_SYS_MAMR_PTA:
3001 periodic timer for refresh 3002 periodic timer for refresh
3002 3003
3003 - CONFIG_SYS_DER: Debug Event Register (37-47) 3004 - CONFIG_SYS_DER: Debug Event Register (37-47)
3004 3005
3005 - FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM, 3006 - FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM,
3006 CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP, 3007 CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP,
3007 CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM, 3008 CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM,
3008 CONFIG_SYS_BR1_PRELIM: 3009 CONFIG_SYS_BR1_PRELIM:
3009 Memory Controller Definitions: BR0/1 and OR0/1 (FLASH) 3010 Memory Controller Definitions: BR0/1 and OR0/1 (FLASH)
3010 3011
3011 - SDRAM_BASE2_PRELIM, SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE, 3012 - SDRAM_BASE2_PRELIM, SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE,
3012 CONFIG_SYS_OR_TIMING_SDRAM, CONFIG_SYS_OR2_PRELIM, CONFIG_SYS_BR2_PRELIM, 3013 CONFIG_SYS_OR_TIMING_SDRAM, CONFIG_SYS_OR2_PRELIM, CONFIG_SYS_BR2_PRELIM,
3013 CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM: 3014 CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM:
3014 Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM) 3015 Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM)
3015 3016
3016 - CONFIG_SYS_MAMR_PTA, CONFIG_SYS_MPTPR_2BK_4K, CONFIG_SYS_MPTPR_1BK_4K, CONFIG_SYS_MPTPR_2BK_8K, 3017 - CONFIG_SYS_MAMR_PTA, CONFIG_SYS_MPTPR_2BK_4K, CONFIG_SYS_MPTPR_1BK_4K, CONFIG_SYS_MPTPR_2BK_8K,
3017 CONFIG_SYS_MPTPR_1BK_8K, CONFIG_SYS_MAMR_8COL, CONFIG_SYS_MAMR_9COL: 3018 CONFIG_SYS_MPTPR_1BK_8K, CONFIG_SYS_MAMR_8COL, CONFIG_SYS_MAMR_9COL:
3018 Machine Mode Register and Memory Periodic Timer 3019 Machine Mode Register and Memory Periodic Timer
3019 Prescaler definitions (SDRAM timing) 3020 Prescaler definitions (SDRAM timing)
3020 3021
3021 - CONFIG_SYS_I2C_UCODE_PATCH, CONFIG_SYS_I2C_DPMEM_OFFSET [0x1FC0]: 3022 - CONFIG_SYS_I2C_UCODE_PATCH, CONFIG_SYS_I2C_DPMEM_OFFSET [0x1FC0]:
3022 enable I2C microcode relocation patch (MPC8xx); 3023 enable I2C microcode relocation patch (MPC8xx);
3023 define relocation offset in DPRAM [DSP2] 3024 define relocation offset in DPRAM [DSP2]
3024 3025
3025 - CONFIG_SYS_SMC_UCODE_PATCH, CONFIG_SYS_SMC_DPMEM_OFFSET [0x1FC0]: 3026 - CONFIG_SYS_SMC_UCODE_PATCH, CONFIG_SYS_SMC_DPMEM_OFFSET [0x1FC0]:
3026 enable SMC microcode relocation patch (MPC8xx); 3027 enable SMC microcode relocation patch (MPC8xx);
3027 define relocation offset in DPRAM [SMC1] 3028 define relocation offset in DPRAM [SMC1]
3028 3029
3029 - CONFIG_SYS_SPI_UCODE_PATCH, CONFIG_SYS_SPI_DPMEM_OFFSET [0x1FC0]: 3030 - CONFIG_SYS_SPI_UCODE_PATCH, CONFIG_SYS_SPI_DPMEM_OFFSET [0x1FC0]:
3030 enable SPI microcode relocation patch (MPC8xx); 3031 enable SPI microcode relocation patch (MPC8xx);
3031 define relocation offset in DPRAM [SCC4] 3032 define relocation offset in DPRAM [SCC4]
3032 3033
3033 - CONFIG_SYS_USE_OSCCLK: 3034 - CONFIG_SYS_USE_OSCCLK:
3034 Use OSCM clock mode on MBX8xx board. Be careful, 3035 Use OSCM clock mode on MBX8xx board. Be careful,
3035 wrong setting might damage your board. Read 3036 wrong setting might damage your board. Read
3036 doc/README.MBX before setting this variable! 3037 doc/README.MBX before setting this variable!
3037 3038
3038 - CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only) 3039 - CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only)
3039 Offset of the bootmode word in DPRAM used by post 3040 Offset of the bootmode word in DPRAM used by post
3040 (Power On Self Tests). This definition overrides 3041 (Power On Self Tests). This definition overrides
3041 #define'd default value in commproc.h resp. 3042 #define'd default value in commproc.h resp.
3042 cpm_8260.h. 3043 cpm_8260.h.
3043 3044
3044 - CONFIG_SYS_PCI_SLV_MEM_LOCAL, CONFIG_SYS_PCI_SLV_MEM_BUS, CONFIG_SYS_PICMR0_MASK_ATTRIB, 3045 - CONFIG_SYS_PCI_SLV_MEM_LOCAL, CONFIG_SYS_PCI_SLV_MEM_BUS, CONFIG_SYS_PICMR0_MASK_ATTRIB,
3045 CONFIG_SYS_PCI_MSTR0_LOCAL, CONFIG_SYS_PCIMSK0_MASK, CONFIG_SYS_PCI_MSTR1_LOCAL, 3046 CONFIG_SYS_PCI_MSTR0_LOCAL, CONFIG_SYS_PCIMSK0_MASK, CONFIG_SYS_PCI_MSTR1_LOCAL,
3046 CONFIG_SYS_PCIMSK1_MASK, CONFIG_SYS_PCI_MSTR_MEM_LOCAL, CONFIG_SYS_PCI_MSTR_MEM_BUS, 3047 CONFIG_SYS_PCIMSK1_MASK, CONFIG_SYS_PCI_MSTR_MEM_LOCAL, CONFIG_SYS_PCI_MSTR_MEM_BUS,
3047 CONFIG_SYS_CPU_PCI_MEM_START, CONFIG_SYS_PCI_MSTR_MEM_SIZE, CONFIG_SYS_POCMR0_MASK_ATTRIB, 3048 CONFIG_SYS_CPU_PCI_MEM_START, CONFIG_SYS_PCI_MSTR_MEM_SIZE, CONFIG_SYS_POCMR0_MASK_ATTRIB,
3048 CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL, CONFIG_SYS_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START, 3049 CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL, CONFIG_SYS_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START,
3049 CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL, 3050 CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL,
3050 CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE, 3051 CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE,
3051 CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only) 3052 CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only)
3052 Overrides the default PCI memory map in arch/powerpc/cpu/mpc8260/pci.c if set. 3053 Overrides the default PCI memory map in arch/powerpc/cpu/mpc8260/pci.c if set.
3053 3054
3054 - CONFIG_PCI_DISABLE_PCIE: 3055 - CONFIG_PCI_DISABLE_PCIE:
3055 Disable PCI-Express on systems where it is supported but not 3056 Disable PCI-Express on systems where it is supported but not
3056 required. 3057 required.
3057 3058
3058 - CONFIG_SYS_SRIO: 3059 - CONFIG_SYS_SRIO:
3059 Chip has SRIO or not 3060 Chip has SRIO or not
3060 3061
3061 - CONFIG_SRIO1: 3062 - CONFIG_SRIO1:
3062 Board has SRIO 1 port available 3063 Board has SRIO 1 port available
3063 3064
3064 - CONFIG_SRIO2: 3065 - CONFIG_SRIO2:
3065 Board has SRIO 2 port available 3066 Board has SRIO 2 port available
3066 3067
3067 - CONFIG_SYS_SRIOn_MEM_VIRT: 3068 - CONFIG_SYS_SRIOn_MEM_VIRT:
3068 Virtual Address of SRIO port 'n' memory region 3069 Virtual Address of SRIO port 'n' memory region
3069 3070
3070 - CONFIG_SYS_SRIOn_MEM_PHYS: 3071 - CONFIG_SYS_SRIOn_MEM_PHYS:
3071 Physical Address of SRIO port 'n' memory region 3072 Physical Address of SRIO port 'n' memory region
3072 3073
3073 - CONFIG_SYS_SRIOn_MEM_SIZE: 3074 - CONFIG_SYS_SRIOn_MEM_SIZE:
3074 Size of SRIO port 'n' memory region 3075 Size of SRIO port 'n' memory region
3075 3076
3076 - CONFIG_SYS_NDFC_16 3077 - CONFIG_SYS_NDFC_16
3077 Defined to tell the NDFC that the NAND chip is using a 3078 Defined to tell the NDFC that the NAND chip is using a
3078 16 bit bus. 3079 16 bit bus.
3079 3080
3080 - CONFIG_SYS_NDFC_EBC0_CFG 3081 - CONFIG_SYS_NDFC_EBC0_CFG
3081 Sets the EBC0_CFG register for the NDFC. If not defined 3082 Sets the EBC0_CFG register for the NDFC. If not defined
3082 a default value will be used. 3083 a default value will be used.
3083 3084
3084 - CONFIG_SPD_EEPROM 3085 - CONFIG_SPD_EEPROM
3085 Get DDR timing information from an I2C EEPROM. Common 3086 Get DDR timing information from an I2C EEPROM. Common
3086 with pluggable memory modules such as SODIMMs 3087 with pluggable memory modules such as SODIMMs
3087 3088
3088 SPD_EEPROM_ADDRESS 3089 SPD_EEPROM_ADDRESS
3089 I2C address of the SPD EEPROM 3090 I2C address of the SPD EEPROM
3090 3091
3091 - CONFIG_SYS_SPD_BUS_NUM 3092 - CONFIG_SYS_SPD_BUS_NUM
3092 If SPD EEPROM is on an I2C bus other than the first 3093 If SPD EEPROM is on an I2C bus other than the first
3093 one, specify here. Note that the value must resolve 3094 one, specify here. Note that the value must resolve
3094 to something your driver can deal with. 3095 to something your driver can deal with.
3095 3096
3096 - CONFIG_SYS_DDR_RAW_TIMING 3097 - CONFIG_SYS_DDR_RAW_TIMING
3097 Get DDR timing information from other than SPD. Common with 3098 Get DDR timing information from other than SPD. Common with
3098 soldered DDR chips onboard without SPD. DDR raw timing 3099 soldered DDR chips onboard without SPD. DDR raw timing
3099 parameters are extracted from datasheet and hard-coded into 3100 parameters are extracted from datasheet and hard-coded into
3100 header files or board specific files. 3101 header files or board specific files.
3101 3102
3102 - CONFIG_FSL_DDR_INTERACTIVE 3103 - CONFIG_FSL_DDR_INTERACTIVE
3103 Enable interactive DDR debugging. See doc/README.fsl-ddr. 3104 Enable interactive DDR debugging. See doc/README.fsl-ddr.
3104 3105
3105 - CONFIG_SYS_83XX_DDR_USES_CS0 3106 - CONFIG_SYS_83XX_DDR_USES_CS0
3106 Only for 83xx systems. If specified, then DDR should 3107 Only for 83xx systems. If specified, then DDR should
3107 be configured using CS0 and CS1 instead of CS2 and CS3. 3108 be configured using CS0 and CS1 instead of CS2 and CS3.
3108 3109
3109 - CONFIG_ETHER_ON_FEC[12] 3110 - CONFIG_ETHER_ON_FEC[12]
3110 Define to enable FEC[12] on a 8xx series processor. 3111 Define to enable FEC[12] on a 8xx series processor.
3111 3112
3112 - CONFIG_FEC[12]_PHY 3113 - CONFIG_FEC[12]_PHY
3113 Define to the hardcoded PHY address which corresponds 3114 Define to the hardcoded PHY address which corresponds
3114 to the given FEC; i. e. 3115 to the given FEC; i. e.
3115 #define CONFIG_FEC1_PHY 4 3116 #define CONFIG_FEC1_PHY 4
3116 means that the PHY with address 4 is connected to FEC1 3117 means that the PHY with address 4 is connected to FEC1
3117 3118
3118 When set to -1, means to probe for first available. 3119 When set to -1, means to probe for first available.
3119 3120
3120 - CONFIG_FEC[12]_PHY_NORXERR 3121 - CONFIG_FEC[12]_PHY_NORXERR
3121 The PHY does not have a RXERR line (RMII only). 3122 The PHY does not have a RXERR line (RMII only).
3122 (so program the FEC to ignore it). 3123 (so program the FEC to ignore it).
3123 3124
3124 - CONFIG_RMII 3125 - CONFIG_RMII
3125 Enable RMII mode for all FECs. 3126 Enable RMII mode for all FECs.
3126 Note that this is a global option, we can't 3127 Note that this is a global option, we can't
3127 have one FEC in standard MII mode and another in RMII mode. 3128 have one FEC in standard MII mode and another in RMII mode.
3128 3129
3129 - CONFIG_CRC32_VERIFY 3130 - CONFIG_CRC32_VERIFY
3130 Add a verify option to the crc32 command. 3131 Add a verify option to the crc32 command.
3131 The syntax is: 3132 The syntax is:
3132 3133
3133 => crc32 -v <address> <count> <crc32> 3134 => crc32 -v <address> <count> <crc32>
3134 3135
3135 Where address/count indicate a memory area 3136 Where address/count indicate a memory area
3136 and crc32 is the correct crc32 which the 3137 and crc32 is the correct crc32 which the
3137 area should have. 3138 area should have.
3138 3139
3139 - CONFIG_LOOPW 3140 - CONFIG_LOOPW
3140 Add the "loopw" memory command. This only takes effect if 3141 Add the "loopw" memory command. This only takes effect if
3141 the memory commands are activated globally (CONFIG_CMD_MEM). 3142 the memory commands are activated globally (CONFIG_CMD_MEM).
3142 3143
3143 - CONFIG_MX_CYCLIC 3144 - CONFIG_MX_CYCLIC
3144 Add the "mdc" and "mwc" memory commands. These are cyclic 3145 Add the "mdc" and "mwc" memory commands. These are cyclic
3145 "md/mw" commands. 3146 "md/mw" commands.
3146 Examples: 3147 Examples:
3147 3148
3148 => mdc.b 10 4 500 3149 => mdc.b 10 4 500
3149 This command will print 4 bytes (10,11,12,13) each 500 ms. 3150 This command will print 4 bytes (10,11,12,13) each 500 ms.
3150 3151
3151 => mwc.l 100 12345678 10 3152 => mwc.l 100 12345678 10
3152 This command will write 12345678 to address 100 all 10 ms. 3153 This command will write 12345678 to address 100 all 10 ms.
3153 3154
3154 This only takes effect if the memory commands are activated 3155 This only takes effect if the memory commands are activated
3155 globally (CONFIG_CMD_MEM). 3156 globally (CONFIG_CMD_MEM).
3156 3157
3157 - CONFIG_SKIP_LOWLEVEL_INIT 3158 - CONFIG_SKIP_LOWLEVEL_INIT
3158 [ARM, MIPS only] If this variable is defined, then certain 3159 [ARM, MIPS only] If this variable is defined, then certain
3159 low level initializations (like setting up the memory 3160 low level initializations (like setting up the memory
3160 controller) are omitted and/or U-Boot does not 3161 controller) are omitted and/or U-Boot does not
3161 relocate itself into RAM. 3162 relocate itself into RAM.
3162 3163
3163 Normally this variable MUST NOT be defined. The only 3164 Normally this variable MUST NOT be defined. The only
3164 exception is when U-Boot is loaded (to RAM) by some 3165 exception is when U-Boot is loaded (to RAM) by some
3165 other boot loader or by a debugger which performs 3166 other boot loader or by a debugger which performs
3166 these initializations itself. 3167 these initializations itself.
3167 3168
3168 - CONFIG_SPL_BUILD 3169 - CONFIG_SPL_BUILD
3169 Modifies the behaviour of start.S when compiling a loader 3170 Modifies the behaviour of start.S when compiling a loader
3170 that is executed before the actual U-Boot. E.g. when 3171 that is executed before the actual U-Boot. E.g. when
3171 compiling a NAND SPL. 3172 compiling a NAND SPL.
3172 3173
3173 - CONFIG_USE_ARCH_MEMCPY 3174 - CONFIG_USE_ARCH_MEMCPY
3174 CONFIG_USE_ARCH_MEMSET 3175 CONFIG_USE_ARCH_MEMSET
3175 If these options are used a optimized version of memcpy/memset will 3176 If these options are used a optimized version of memcpy/memset will
3176 be used if available. These functions may be faster under some 3177 be used if available. These functions may be faster under some
3177 conditions but may increase the binary size. 3178 conditions but may increase the binary size.
3178 3179
3179 Building the Software: 3180 Building the Software:
3180 ====================== 3181 ======================
3181 3182
3182 Building U-Boot has been tested in several native build environments 3183 Building U-Boot has been tested in several native build environments
3183 and in many different cross environments. Of course we cannot support 3184 and in many different cross environments. Of course we cannot support
3184 all possibly existing versions of cross development tools in all 3185 all possibly existing versions of cross development tools in all
3185 (potentially obsolete) versions. In case of tool chain problems we 3186 (potentially obsolete) versions. In case of tool chain problems we
3186 recommend to use the ELDK (see http://www.denx.de/wiki/DULG/ELDK) 3187 recommend to use the ELDK (see http://www.denx.de/wiki/DULG/ELDK)
3187 which is extensively used to build and test U-Boot. 3188 which is extensively used to build and test U-Boot.
3188 3189
3189 If you are not using a native environment, it is assumed that you 3190 If you are not using a native environment, it is assumed that you
3190 have GNU cross compiling tools available in your path. In this case, 3191 have GNU cross compiling tools available in your path. In this case,
3191 you must set the environment variable CROSS_COMPILE in your shell. 3192 you must set the environment variable CROSS_COMPILE in your shell.
3192 Note that no changes to the Makefile or any other source files are 3193 Note that no changes to the Makefile or any other source files are
3193 necessary. For example using the ELDK on a 4xx CPU, please enter: 3194 necessary. For example using the ELDK on a 4xx CPU, please enter:
3194 3195
3195 $ CROSS_COMPILE=ppc_4xx- 3196 $ CROSS_COMPILE=ppc_4xx-
3196 $ export CROSS_COMPILE 3197 $ export CROSS_COMPILE
3197 3198
3198 Note: If you wish to generate Windows versions of the utilities in 3199 Note: If you wish to generate Windows versions of the utilities in
3199 the tools directory you can use the MinGW toolchain 3200 the tools directory you can use the MinGW toolchain
3200 (http://www.mingw.org). Set your HOST tools to the MinGW 3201 (http://www.mingw.org). Set your HOST tools to the MinGW
3201 toolchain and execute 'make tools'. For example: 3202 toolchain and execute 'make tools'. For example:
3202 3203
3203 $ make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip tools 3204 $ make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip tools
3204 3205
3205 Binaries such as tools/mkimage.exe will be created which can 3206 Binaries such as tools/mkimage.exe will be created which can
3206 be executed on computers running Windows. 3207 be executed on computers running Windows.
3207 3208
3208 U-Boot is intended to be simple to build. After installing the 3209 U-Boot is intended to be simple to build. After installing the
3209 sources you must configure U-Boot for one specific board type. This 3210 sources you must configure U-Boot for one specific board type. This
3210 is done by typing: 3211 is done by typing:
3211 3212
3212 make NAME_config 3213 make NAME_config
3213 3214
3214 where "NAME_config" is the name of one of the existing configu- 3215 where "NAME_config" is the name of one of the existing configu-
3215 rations; see the main Makefile for supported names. 3216 rations; see the main Makefile for supported names.
3216 3217
3217 Note: for some board special configuration names may exist; check if 3218 Note: for some board special configuration names may exist; check if
3218 additional information is available from the board vendor; for 3219 additional information is available from the board vendor; for
3219 instance, the TQM823L systems are available without (standard) 3220 instance, the TQM823L systems are available without (standard)
3220 or with LCD support. You can select such additional "features" 3221 or with LCD support. You can select such additional "features"
3221 when choosing the configuration, i. e. 3222 when choosing the configuration, i. e.
3222 3223
3223 make TQM823L_config 3224 make TQM823L_config
3224 - will configure for a plain TQM823L, i. e. no LCD support 3225 - will configure for a plain TQM823L, i. e. no LCD support
3225 3226
3226 make TQM823L_LCD_config 3227 make TQM823L_LCD_config
3227 - will configure for a TQM823L with U-Boot console on LCD 3228 - will configure for a TQM823L with U-Boot console on LCD
3228 3229
3229 etc. 3230 etc.
3230 3231
3231 3232
3232 Finally, type "make all", and you should get some working U-Boot 3233 Finally, type "make all", and you should get some working U-Boot
3233 images ready for download to / installation on your system: 3234 images ready for download to / installation on your system:
3234 3235
3235 - "u-boot.bin" is a raw binary image 3236 - "u-boot.bin" is a raw binary image
3236 - "u-boot" is an image in ELF binary format 3237 - "u-boot" is an image in ELF binary format
3237 - "u-boot.srec" is in Motorola S-Record format 3238 - "u-boot.srec" is in Motorola S-Record format
3238 3239
3239 By default the build is performed locally and the objects are saved 3240 By default the build is performed locally and the objects are saved
3240 in the source directory. One of the two methods can be used to change 3241 in the source directory. One of the two methods can be used to change
3241 this behavior and build U-Boot to some external directory: 3242 this behavior and build U-Boot to some external directory:
3242 3243
3243 1. Add O= to the make command line invocations: 3244 1. Add O= to the make command line invocations:
3244 3245
3245 make O=/tmp/build distclean 3246 make O=/tmp/build distclean
3246 make O=/tmp/build NAME_config 3247 make O=/tmp/build NAME_config
3247 make O=/tmp/build all 3248 make O=/tmp/build all
3248 3249
3249 2. Set environment variable BUILD_DIR to point to the desired location: 3250 2. Set environment variable BUILD_DIR to point to the desired location:
3250 3251
3251 export BUILD_DIR=/tmp/build 3252 export BUILD_DIR=/tmp/build
3252 make distclean 3253 make distclean
3253 make NAME_config 3254 make NAME_config
3254 make all 3255 make all
3255 3256
3256 Note that the command line "O=" setting overrides the BUILD_DIR environment 3257 Note that the command line "O=" setting overrides the BUILD_DIR environment
3257 variable. 3258 variable.
3258 3259
3259 3260
3260 Please be aware that the Makefiles assume you are using GNU make, so 3261 Please be aware that the Makefiles assume you are using GNU make, so
3261 for instance on NetBSD you might need to use "gmake" instead of 3262 for instance on NetBSD you might need to use "gmake" instead of
3262 native "make". 3263 native "make".
3263 3264
3264 3265
3265 If the system board that you have is not listed, then you will need 3266 If the system board that you have is not listed, then you will need
3266 to port U-Boot to your hardware platform. To do this, follow these 3267 to port U-Boot to your hardware platform. To do this, follow these
3267 steps: 3268 steps:
3268 3269
3269 1. Add a new configuration option for your board to the toplevel 3270 1. Add a new configuration option for your board to the toplevel
3270 "Makefile" and to the "MAKEALL" script, using the existing 3271 "Makefile" and to the "MAKEALL" script, using the existing
3271 entries as examples. Note that here and at many other places 3272 entries as examples. Note that here and at many other places
3272 boards and other names are listed in alphabetical sort order. Please 3273 boards and other names are listed in alphabetical sort order. Please
3273 keep this order. 3274 keep this order.
3274 2. Create a new directory to hold your board specific code. Add any 3275 2. Create a new directory to hold your board specific code. Add any
3275 files you need. In your board directory, you will need at least 3276 files you need. In your board directory, you will need at least
3276 the "Makefile", a "<board>.c", "flash.c" and "u-boot.lds". 3277 the "Makefile", a "<board>.c", "flash.c" and "u-boot.lds".
3277 3. Create a new configuration file "include/configs/<board>.h" for 3278 3. Create a new configuration file "include/configs/<board>.h" for
3278 your board 3279 your board
3279 3. If you're porting U-Boot to a new CPU, then also create a new 3280 3. If you're porting U-Boot to a new CPU, then also create a new
3280 directory to hold your CPU specific code. Add any files you need. 3281 directory to hold your CPU specific code. Add any files you need.
3281 4. Run "make <board>_config" with your new name. 3282 4. Run "make <board>_config" with your new name.
3282 5. Type "make", and you should get a working "u-boot.srec" file 3283 5. Type "make", and you should get a working "u-boot.srec" file
3283 to be installed on your target system. 3284 to be installed on your target system.
3284 6. Debug and solve any problems that might arise. 3285 6. Debug and solve any problems that might arise.
3285 [Of course, this last step is much harder than it sounds.] 3286 [Of course, this last step is much harder than it sounds.]
3286 3287
3287 3288
3288 Testing of U-Boot Modifications, Ports to New Hardware, etc.: 3289 Testing of U-Boot Modifications, Ports to New Hardware, etc.:
3289 ============================================================== 3290 ==============================================================
3290 3291
3291 If you have modified U-Boot sources (for instance added a new board 3292 If you have modified U-Boot sources (for instance added a new board
3292 or support for new devices, a new CPU, etc.) you are expected to 3293 or support for new devices, a new CPU, etc.) you are expected to
3293 provide feedback to the other developers. The feedback normally takes 3294 provide feedback to the other developers. The feedback normally takes
3294 the form of a "patch", i. e. a context diff against a certain (latest 3295 the form of a "patch", i. e. a context diff against a certain (latest
3295 official or latest in the git repository) version of U-Boot sources. 3296 official or latest in the git repository) version of U-Boot sources.
3296 3297
3297 But before you submit such a patch, please verify that your modifi- 3298 But before you submit such a patch, please verify that your modifi-
3298 cation did not break existing code. At least make sure that *ALL* of 3299 cation did not break existing code. At least make sure that *ALL* of
3299 the supported boards compile WITHOUT ANY compiler warnings. To do so, 3300 the supported boards compile WITHOUT ANY compiler warnings. To do so,
3300 just run the "MAKEALL" script, which will configure and build U-Boot 3301 just run the "MAKEALL" script, which will configure and build U-Boot
3301 for ALL supported system. Be warned, this will take a while. You can 3302 for ALL supported system. Be warned, this will take a while. You can
3302 select which (cross) compiler to use by passing a `CROSS_COMPILE' 3303 select which (cross) compiler to use by passing a `CROSS_COMPILE'
3303 environment variable to the script, i. e. to use the ELDK cross tools 3304 environment variable to the script, i. e. to use the ELDK cross tools
3304 you can type 3305 you can type
3305 3306
3306 CROSS_COMPILE=ppc_8xx- MAKEALL 3307 CROSS_COMPILE=ppc_8xx- MAKEALL
3307 3308
3308 or to build on a native PowerPC system you can type 3309 or to build on a native PowerPC system you can type
3309 3310
3310 CROSS_COMPILE=' ' MAKEALL 3311 CROSS_COMPILE=' ' MAKEALL
3311 3312
3312 When using the MAKEALL script, the default behaviour is to build 3313 When using the MAKEALL script, the default behaviour is to build
3313 U-Boot in the source directory. This location can be changed by 3314 U-Boot in the source directory. This location can be changed by
3314 setting the BUILD_DIR environment variable. Also, for each target 3315 setting the BUILD_DIR environment variable. Also, for each target
3315 built, the MAKEALL script saves two log files (<target>.ERR and 3316 built, the MAKEALL script saves two log files (<target>.ERR and
3316 <target>.MAKEALL) in the <source dir>/LOG directory. This default 3317 <target>.MAKEALL) in the <source dir>/LOG directory. This default
3317 location can be changed by setting the MAKEALL_LOGDIR environment 3318 location can be changed by setting the MAKEALL_LOGDIR environment
3318 variable. For example: 3319 variable. For example:
3319 3320
3320 export BUILD_DIR=/tmp/build 3321 export BUILD_DIR=/tmp/build
3321 export MAKEALL_LOGDIR=/tmp/log 3322 export MAKEALL_LOGDIR=/tmp/log
3322 CROSS_COMPILE=ppc_8xx- MAKEALL 3323 CROSS_COMPILE=ppc_8xx- MAKEALL
3323 3324
3324 With the above settings build objects are saved in the /tmp/build, 3325 With the above settings build objects are saved in the /tmp/build,
3325 log files are saved in the /tmp/log and the source tree remains clean 3326 log files are saved in the /tmp/log and the source tree remains clean
3326 during the whole build process. 3327 during the whole build process.
3327 3328
3328 3329
3329 See also "U-Boot Porting Guide" below. 3330 See also "U-Boot Porting Guide" below.
3330 3331
3331 3332
3332 Monitor Commands - Overview: 3333 Monitor Commands - Overview:
3333 ============================ 3334 ============================
3334 3335
3335 go - start application at address 'addr' 3336 go - start application at address 'addr'
3336 run - run commands in an environment variable 3337 run - run commands in an environment variable
3337 bootm - boot application image from memory 3338 bootm - boot application image from memory
3338 bootp - boot image via network using BootP/TFTP protocol 3339 bootp - boot image via network using BootP/TFTP protocol
3339 tftpboot- boot image via network using TFTP protocol 3340 tftpboot- boot image via network using TFTP protocol
3340 and env variables "ipaddr" and "serverip" 3341 and env variables "ipaddr" and "serverip"
3341 (and eventually "gatewayip") 3342 (and eventually "gatewayip")
3342 rarpboot- boot image via network using RARP/TFTP protocol 3343 rarpboot- boot image via network using RARP/TFTP protocol
3343 diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd' 3344 diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
3344 loads - load S-Record file over serial line 3345 loads - load S-Record file over serial line
3345 loadb - load binary file over serial line (kermit mode) 3346 loadb - load binary file over serial line (kermit mode)
3346 md - memory display 3347 md - memory display
3347 mm - memory modify (auto-incrementing) 3348 mm - memory modify (auto-incrementing)
3348 nm - memory modify (constant address) 3349 nm - memory modify (constant address)
3349 mw - memory write (fill) 3350 mw - memory write (fill)
3350 cp - memory copy 3351 cp - memory copy
3351 cmp - memory compare 3352 cmp - memory compare
3352 crc32 - checksum calculation 3353 crc32 - checksum calculation
3353 i2c - I2C sub-system 3354 i2c - I2C sub-system
3354 sspi - SPI utility commands 3355 sspi - SPI utility commands
3355 base - print or set address offset 3356 base - print or set address offset
3356 printenv- print environment variables 3357 printenv- print environment variables
3357 setenv - set environment variables 3358 setenv - set environment variables
3358 saveenv - save environment variables to persistent storage 3359 saveenv - save environment variables to persistent storage
3359 protect - enable or disable FLASH write protection 3360 protect - enable or disable FLASH write protection
3360 erase - erase FLASH memory 3361 erase - erase FLASH memory
3361 flinfo - print FLASH memory information 3362 flinfo - print FLASH memory information
3362 bdinfo - print Board Info structure 3363 bdinfo - print Board Info structure
3363 iminfo - print header information for application image 3364 iminfo - print header information for application image
3364 coninfo - print console devices and informations 3365 coninfo - print console devices and informations
3365 ide - IDE sub-system 3366 ide - IDE sub-system
3366 loop - infinite loop on address range 3367 loop - infinite loop on address range
3367 loopw - infinite write loop on address range 3368 loopw - infinite write loop on address range
3368 mtest - simple RAM test 3369 mtest - simple RAM test
3369 icache - enable or disable instruction cache 3370 icache - enable or disable instruction cache
3370 dcache - enable or disable data cache 3371 dcache - enable or disable data cache
3371 reset - Perform RESET of the CPU 3372 reset - Perform RESET of the CPU
3372 echo - echo args to console 3373 echo - echo args to console
3373 version - print monitor version 3374 version - print monitor version
3374 help - print online help 3375 help - print online help
3375 ? - alias for 'help' 3376 ? - alias for 'help'
3376 3377
3377 3378
3378 Monitor Commands - Detailed Description: 3379 Monitor Commands - Detailed Description:
3379 ======================================== 3380 ========================================
3380 3381
3381 TODO. 3382 TODO.
3382 3383
3383 For now: just type "help <command>". 3384 For now: just type "help <command>".
3384 3385
3385 3386
3386 Environment Variables: 3387 Environment Variables:
3387 ====================== 3388 ======================
3388 3389
3389 U-Boot supports user configuration using Environment Variables which 3390 U-Boot supports user configuration using Environment Variables which
3390 can be made persistent by saving to Flash memory. 3391 can be made persistent by saving to Flash memory.
3391 3392
3392 Environment Variables are set using "setenv", printed using 3393 Environment Variables are set using "setenv", printed using
3393 "printenv", and saved to Flash using "saveenv". Using "setenv" 3394 "printenv", and saved to Flash using "saveenv". Using "setenv"
3394 without a value can be used to delete a variable from the 3395 without a value can be used to delete a variable from the
3395 environment. As long as you don't save the environment you are 3396 environment. As long as you don't save the environment you are
3396 working with an in-memory copy. In case the Flash area containing the 3397 working with an in-memory copy. In case the Flash area containing the
3397 environment is erased by accident, a default environment is provided. 3398 environment is erased by accident, a default environment is provided.
3398 3399
3399 Some configuration options can be set using Environment Variables. 3400 Some configuration options can be set using Environment Variables.
3400 3401
3401 List of environment variables (most likely not complete): 3402 List of environment variables (most likely not complete):
3402 3403
3403 baudrate - see CONFIG_BAUDRATE 3404 baudrate - see CONFIG_BAUDRATE
3404 3405
3405 bootdelay - see CONFIG_BOOTDELAY 3406 bootdelay - see CONFIG_BOOTDELAY
3406 3407
3407 bootcmd - see CONFIG_BOOTCOMMAND 3408 bootcmd - see CONFIG_BOOTCOMMAND
3408 3409
3409 bootargs - Boot arguments when booting an RTOS image 3410 bootargs - Boot arguments when booting an RTOS image
3410 3411
3411 bootfile - Name of the image to load with TFTP 3412 bootfile - Name of the image to load with TFTP
3412 3413
3413 bootm_low - Memory range available for image processing in the bootm 3414 bootm_low - Memory range available for image processing in the bootm
3414 command can be restricted. This variable is given as 3415 command can be restricted. This variable is given as
3415 a hexadecimal number and defines lowest address allowed 3416 a hexadecimal number and defines lowest address allowed
3416 for use by the bootm command. See also "bootm_size" 3417 for use by the bootm command. See also "bootm_size"
3417 environment variable. Address defined by "bootm_low" is 3418 environment variable. Address defined by "bootm_low" is
3418 also the base of the initial memory mapping for the Linux 3419 also the base of the initial memory mapping for the Linux
3419 kernel -- see the description of CONFIG_SYS_BOOTMAPSZ and 3420 kernel -- see the description of CONFIG_SYS_BOOTMAPSZ and
3420 bootm_mapsize. 3421 bootm_mapsize.
3421 3422
3422 bootm_mapsize - Size of the initial memory mapping for the Linux kernel. 3423 bootm_mapsize - Size of the initial memory mapping for the Linux kernel.
3423 This variable is given as a hexadecimal number and it 3424 This variable is given as a hexadecimal number and it
3424 defines the size of the memory region starting at base 3425 defines the size of the memory region starting at base
3425 address bootm_low that is accessible by the Linux kernel 3426 address bootm_low that is accessible by the Linux kernel
3426 during early boot. If unset, CONFIG_SYS_BOOTMAPSZ is used 3427 during early boot. If unset, CONFIG_SYS_BOOTMAPSZ is used
3427 as the default value if it is defined, and bootm_size is 3428 as the default value if it is defined, and bootm_size is
3428 used otherwise. 3429 used otherwise.
3429 3430
3430 bootm_size - Memory range available for image processing in the bootm 3431 bootm_size - Memory range available for image processing in the bootm
3431 command can be restricted. This variable is given as 3432 command can be restricted. This variable is given as
3432 a hexadecimal number and defines the size of the region 3433 a hexadecimal number and defines the size of the region
3433 allowed for use by the bootm command. See also "bootm_low" 3434 allowed for use by the bootm command. See also "bootm_low"
3434 environment variable. 3435 environment variable.
3435 3436
3436 updatefile - Location of the software update file on a TFTP server, used 3437 updatefile - Location of the software update file on a TFTP server, used
3437 by the automatic software update feature. Please refer to 3438 by the automatic software update feature. Please refer to
3438 documentation in doc/README.update for more details. 3439 documentation in doc/README.update for more details.
3439 3440
3440 autoload - if set to "no" (any string beginning with 'n'), 3441 autoload - if set to "no" (any string beginning with 'n'),
3441 "bootp" will just load perform a lookup of the 3442 "bootp" will just load perform a lookup of the
3442 configuration from the BOOTP server, but not try to 3443 configuration from the BOOTP server, but not try to
3443 load any image using TFTP 3444 load any image using TFTP
3444 3445
3445 autostart - if set to "yes", an image loaded using the "bootp", 3446 autostart - if set to "yes", an image loaded using the "bootp",
3446 "rarpboot", "tftpboot" or "diskboot" commands will 3447 "rarpboot", "tftpboot" or "diskboot" commands will
3447 be automatically started (by internally calling 3448 be automatically started (by internally calling
3448 "bootm") 3449 "bootm")
3449 3450
3450 If set to "no", a standalone image passed to the 3451 If set to "no", a standalone image passed to the
3451 "bootm" command will be copied to the load address 3452 "bootm" command will be copied to the load address
3452 (and eventually uncompressed), but NOT be started. 3453 (and eventually uncompressed), but NOT be started.
3453 This can be used to load and uncompress arbitrary 3454 This can be used to load and uncompress arbitrary
3454 data. 3455 data.
3455 3456
3456 fdt_high - if set this restricts the maximum address that the 3457 fdt_high - if set this restricts the maximum address that the
3457 flattened device tree will be copied into upon boot. 3458 flattened device tree will be copied into upon boot.
3458 If this is set to the special value 0xFFFFFFFF then 3459 If this is set to the special value 0xFFFFFFFF then
3459 the fdt will not be copied at all on boot. For this 3460 the fdt will not be copied at all on boot. For this
3460 to work it must reside in writable memory, have 3461 to work it must reside in writable memory, have
3461 sufficient padding on the end of it for u-boot to 3462 sufficient padding on the end of it for u-boot to
3462 add the information it needs into it, and the memory 3463 add the information it needs into it, and the memory
3463 must be accessible by the kernel. 3464 must be accessible by the kernel.
3464 3465
3465 i2cfast - (PPC405GP|PPC405EP only) 3466 i2cfast - (PPC405GP|PPC405EP only)
3466 if set to 'y' configures Linux I2C driver for fast 3467 if set to 'y' configures Linux I2C driver for fast
3467 mode (400kHZ). This environment variable is used in 3468 mode (400kHZ). This environment variable is used in
3468 initialization code. So, for changes to be effective 3469 initialization code. So, for changes to be effective
3469 it must be saved and board must be reset. 3470 it must be saved and board must be reset.
3470 3471
3471 initrd_high - restrict positioning of initrd images: 3472 initrd_high - restrict positioning of initrd images:
3472 If this variable is not set, initrd images will be 3473 If this variable is not set, initrd images will be
3473 copied to the highest possible address in RAM; this 3474 copied to the highest possible address in RAM; this
3474 is usually what you want since it allows for 3475 is usually what you want since it allows for
3475 maximum initrd size. If for some reason you want to 3476 maximum initrd size. If for some reason you want to
3476 make sure that the initrd image is loaded below the 3477 make sure that the initrd image is loaded below the
3477 CONFIG_SYS_BOOTMAPSZ limit, you can set this environment 3478 CONFIG_SYS_BOOTMAPSZ limit, you can set this environment
3478 variable to a value of "no" or "off" or "0". 3479 variable to a value of "no" or "off" or "0".
3479 Alternatively, you can set it to a maximum upper 3480 Alternatively, you can set it to a maximum upper
3480 address to use (U-Boot will still check that it 3481 address to use (U-Boot will still check that it
3481 does not overwrite the U-Boot stack and data). 3482 does not overwrite the U-Boot stack and data).
3482 3483
3483 For instance, when you have a system with 16 MB 3484 For instance, when you have a system with 16 MB
3484 RAM, and want to reserve 4 MB from use by Linux, 3485 RAM, and want to reserve 4 MB from use by Linux,
3485 you can do this by adding "mem=12M" to the value of 3486 you can do this by adding "mem=12M" to the value of
3486 the "bootargs" variable. However, now you must make 3487 the "bootargs" variable. However, now you must make
3487 sure that the initrd image is placed in the first 3488 sure that the initrd image is placed in the first
3488 12 MB as well - this can be done with 3489 12 MB as well - this can be done with
3489 3490
3490 setenv initrd_high 00c00000 3491 setenv initrd_high 00c00000
3491 3492
3492 If you set initrd_high to 0xFFFFFFFF, this is an 3493 If you set initrd_high to 0xFFFFFFFF, this is an
3493 indication to U-Boot that all addresses are legal 3494 indication to U-Boot that all addresses are legal
3494 for the Linux kernel, including addresses in flash 3495 for the Linux kernel, including addresses in flash
3495 memory. In this case U-Boot will NOT COPY the 3496 memory. In this case U-Boot will NOT COPY the
3496 ramdisk at all. This may be useful to reduce the 3497 ramdisk at all. This may be useful to reduce the
3497 boot time on your system, but requires that this 3498 boot time on your system, but requires that this
3498 feature is supported by your Linux kernel. 3499 feature is supported by your Linux kernel.
3499 3500
3500 ipaddr - IP address; needed for tftpboot command 3501 ipaddr - IP address; needed for tftpboot command
3501 3502
3502 loadaddr - Default load address for commands like "bootp", 3503 loadaddr - Default load address for commands like "bootp",
3503 "rarpboot", "tftpboot", "loadb" or "diskboot" 3504 "rarpboot", "tftpboot", "loadb" or "diskboot"
3504 3505
3505 loads_echo - see CONFIG_LOADS_ECHO 3506 loads_echo - see CONFIG_LOADS_ECHO
3506 3507
3507 serverip - TFTP server IP address; needed for tftpboot command 3508 serverip - TFTP server IP address; needed for tftpboot command
3508 3509
3509 bootretry - see CONFIG_BOOT_RETRY_TIME 3510 bootretry - see CONFIG_BOOT_RETRY_TIME
3510 3511
3511 bootdelaykey - see CONFIG_AUTOBOOT_DELAY_STR 3512 bootdelaykey - see CONFIG_AUTOBOOT_DELAY_STR
3512 3513
3513 bootstopkey - see CONFIG_AUTOBOOT_STOP_STR 3514 bootstopkey - see CONFIG_AUTOBOOT_STOP_STR
3514 3515
3515 ethprime - controls which interface is used first. 3516 ethprime - controls which interface is used first.
3516 3517
3517 ethact - controls which interface is currently active. 3518 ethact - controls which interface is currently active.
3518 For example you can do the following 3519 For example you can do the following
3519 3520
3520 => setenv ethact FEC 3521 => setenv ethact FEC
3521 => ping 192.168.0.1 # traffic sent on FEC 3522 => ping 192.168.0.1 # traffic sent on FEC
3522 => setenv ethact SCC 3523 => setenv ethact SCC
3523 => ping 10.0.0.1 # traffic sent on SCC 3524 => ping 10.0.0.1 # traffic sent on SCC
3524 3525
3525 ethrotate - When set to "no" U-Boot does not go through all 3526 ethrotate - When set to "no" U-Boot does not go through all
3526 available network interfaces. 3527 available network interfaces.
3527 It just stays at the currently selected interface. 3528 It just stays at the currently selected interface.
3528 3529
3529 netretry - When set to "no" each network operation will 3530 netretry - When set to "no" each network operation will
3530 either succeed or fail without retrying. 3531 either succeed or fail without retrying.
3531 When set to "once" the network operation will 3532 When set to "once" the network operation will
3532 fail when all the available network interfaces 3533 fail when all the available network interfaces
3533 are tried once without success. 3534 are tried once without success.
3534 Useful on scripts which control the retry operation 3535 Useful on scripts which control the retry operation
3535 themselves. 3536 themselves.
3536 3537
3537 npe_ucode - set load address for the NPE microcode 3538 npe_ucode - set load address for the NPE microcode
3538 3539
3539 tftpsrcport - If this is set, the value is used for TFTP's 3540 tftpsrcport - If this is set, the value is used for TFTP's
3540 UDP source port. 3541 UDP source port.
3541 3542
3542 tftpdstport - If this is set, the value is used for TFTP's UDP 3543 tftpdstport - If this is set, the value is used for TFTP's UDP
3543 destination port instead of the Well Know Port 69. 3544 destination port instead of the Well Know Port 69.
3544 3545
3545 tftpblocksize - Block size to use for TFTP transfers; if not set, 3546 tftpblocksize - Block size to use for TFTP transfers; if not set,
3546 we use the TFTP server's default block size 3547 we use the TFTP server's default block size
3547 3548
3548 tftptimeout - Retransmission timeout for TFTP packets (in milli- 3549 tftptimeout - Retransmission timeout for TFTP packets (in milli-
3549 seconds, minimum value is 1000 = 1 second). Defines 3550 seconds, minimum value is 1000 = 1 second). Defines
3550 when a packet is considered to be lost so it has to 3551 when a packet is considered to be lost so it has to
3551 be retransmitted. The default is 5000 = 5 seconds. 3552 be retransmitted. The default is 5000 = 5 seconds.
3552 Lowering this value may make downloads succeed 3553 Lowering this value may make downloads succeed
3553 faster in networks with high packet loss rates or 3554 faster in networks with high packet loss rates or
3554 with unreliable TFTP servers. 3555 with unreliable TFTP servers.
3555 3556
3556 vlan - When set to a value < 4095 the traffic over 3557 vlan - When set to a value < 4095 the traffic over
3557 Ethernet is encapsulated/received over 802.1q 3558 Ethernet is encapsulated/received over 802.1q
3558 VLAN tagged frames. 3559 VLAN tagged frames.
3559 3560
3560 The following environment variables may be used and automatically 3561 The following environment variables may be used and automatically
3561 updated by the network boot commands ("bootp" and "rarpboot"), 3562 updated by the network boot commands ("bootp" and "rarpboot"),
3562 depending the information provided by your boot server: 3563 depending the information provided by your boot server:
3563 3564
3564 bootfile - see above 3565 bootfile - see above
3565 dnsip - IP address of your Domain Name Server 3566 dnsip - IP address of your Domain Name Server
3566 dnsip2 - IP address of your secondary Domain Name Server 3567 dnsip2 - IP address of your secondary Domain Name Server
3567 gatewayip - IP address of the Gateway (Router) to use 3568 gatewayip - IP address of the Gateway (Router) to use
3568 hostname - Target hostname 3569 hostname - Target hostname
3569 ipaddr - see above 3570 ipaddr - see above
3570 netmask - Subnet Mask 3571 netmask - Subnet Mask
3571 rootpath - Pathname of the root filesystem on the NFS server 3572 rootpath - Pathname of the root filesystem on the NFS server
3572 serverip - see above 3573 serverip - see above
3573 3574
3574 3575
3575 There are two special Environment Variables: 3576 There are two special Environment Variables:
3576 3577
3577 serial# - contains hardware identification information such 3578 serial# - contains hardware identification information such
3578 as type string and/or serial number 3579 as type string and/or serial number
3579 ethaddr - Ethernet address 3580 ethaddr - Ethernet address
3580 3581
3581 These variables can be set only once (usually during manufacturing of 3582 These variables can be set only once (usually during manufacturing of
3582 the board). U-Boot refuses to delete or overwrite these variables 3583 the board). U-Boot refuses to delete or overwrite these variables
3583 once they have been set once. 3584 once they have been set once.
3584 3585
3585 3586
3586 Further special Environment Variables: 3587 Further special Environment Variables:
3587 3588
3588 ver - Contains the U-Boot version string as printed 3589 ver - Contains the U-Boot version string as printed
3589 with the "version" command. This variable is 3590 with the "version" command. This variable is
3590 readonly (see CONFIG_VERSION_VARIABLE). 3591 readonly (see CONFIG_VERSION_VARIABLE).
3591 3592
3592 3593
3593 Please note that changes to some configuration parameters may take 3594 Please note that changes to some configuration parameters may take
3594 only effect after the next boot (yes, that's just like Windoze :-). 3595 only effect after the next boot (yes, that's just like Windoze :-).
3595 3596
3596 3597
3597 Command Line Parsing: 3598 Command Line Parsing:
3598 ===================== 3599 =====================
3599 3600
3600 There are two different command line parsers available with U-Boot: 3601 There are two different command line parsers available with U-Boot:
3601 the old "simple" one, and the much more powerful "hush" shell: 3602 the old "simple" one, and the much more powerful "hush" shell:
3602 3603
3603 Old, simple command line parser: 3604 Old, simple command line parser:
3604 -------------------------------- 3605 --------------------------------
3605 3606
3606 - supports environment variables (through setenv / saveenv commands) 3607 - supports environment variables (through setenv / saveenv commands)
3607 - several commands on one line, separated by ';' 3608 - several commands on one line, separated by ';'
3608 - variable substitution using "... ${name} ..." syntax 3609 - variable substitution using "... ${name} ..." syntax
3609 - special characters ('$', ';') can be escaped by prefixing with '\', 3610 - special characters ('$', ';') can be escaped by prefixing with '\',
3610 for example: 3611 for example:
3611 setenv bootcmd bootm \${address} 3612 setenv bootcmd bootm \${address}
3612 - You can also escape text by enclosing in single apostrophes, for example: 3613 - You can also escape text by enclosing in single apostrophes, for example:
3613 setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off' 3614 setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
3614 3615
3615 Hush shell: 3616 Hush shell:
3616 ----------- 3617 -----------
3617 3618
3618 - similar to Bourne shell, with control structures like 3619 - similar to Bourne shell, with control structures like
3619 if...then...else...fi, for...do...done; while...do...done, 3620 if...then...else...fi, for...do...done; while...do...done,
3620 until...do...done, ... 3621 until...do...done, ...
3621 - supports environment ("global") variables (through setenv / saveenv 3622 - supports environment ("global") variables (through setenv / saveenv
3622 commands) and local shell variables (through standard shell syntax 3623 commands) and local shell variables (through standard shell syntax
3623 "name=value"); only environment variables can be used with "run" 3624 "name=value"); only environment variables can be used with "run"
3624 command 3625 command
3625 3626
3626 General rules: 3627 General rules:
3627 -------------- 3628 --------------
3628 3629
3629 (1) If a command line (or an environment variable executed by a "run" 3630 (1) If a command line (or an environment variable executed by a "run"
3630 command) contains several commands separated by semicolon, and 3631 command) contains several commands separated by semicolon, and
3631 one of these commands fails, then the remaining commands will be 3632 one of these commands fails, then the remaining commands will be
3632 executed anyway. 3633 executed anyway.
3633 3634
3634 (2) If you execute several variables with one call to run (i. e. 3635 (2) If you execute several variables with one call to run (i. e.
3635 calling run with a list of variables as arguments), any failing 3636 calling run with a list of variables as arguments), any failing
3636 command will cause "run" to terminate, i. e. the remaining 3637 command will cause "run" to terminate, i. e. the remaining
3637 variables are not executed. 3638 variables are not executed.
3638 3639
3639 Note for Redundant Ethernet Interfaces: 3640 Note for Redundant Ethernet Interfaces:
3640 ======================================= 3641 =======================================
3641 3642
3642 Some boards come with redundant Ethernet interfaces; U-Boot supports 3643 Some boards come with redundant Ethernet interfaces; U-Boot supports
3643 such configurations and is capable of automatic selection of a 3644 such configurations and is capable of automatic selection of a
3644 "working" interface when needed. MAC assignment works as follows: 3645 "working" interface when needed. MAC assignment works as follows:
3645 3646
3646 Network interfaces are numbered eth0, eth1, eth2, ... Corresponding 3647 Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
3647 MAC addresses can be stored in the environment as "ethaddr" (=>eth0), 3648 MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
3648 "eth1addr" (=>eth1), "eth2addr", ... 3649 "eth1addr" (=>eth1), "eth2addr", ...
3649 3650
3650 If the network interface stores some valid MAC address (for instance 3651 If the network interface stores some valid MAC address (for instance
3651 in SROM), this is used as default address if there is NO correspon- 3652 in SROM), this is used as default address if there is NO correspon-
3652 ding setting in the environment; if the corresponding environment 3653 ding setting in the environment; if the corresponding environment
3653 variable is set, this overrides the settings in the card; that means: 3654 variable is set, this overrides the settings in the card; that means:
3654 3655
3655 o If the SROM has a valid MAC address, and there is no address in the 3656 o If the SROM has a valid MAC address, and there is no address in the
3656 environment, the SROM's address is used. 3657 environment, the SROM's address is used.
3657 3658
3658 o If there is no valid address in the SROM, and a definition in the 3659 o If there is no valid address in the SROM, and a definition in the
3659 environment exists, then the value from the environment variable is 3660 environment exists, then the value from the environment variable is
3660 used. 3661 used.
3661 3662
3662 o If both the SROM and the environment contain a MAC address, and 3663 o If both the SROM and the environment contain a MAC address, and
3663 both addresses are the same, this MAC address is used. 3664 both addresses are the same, this MAC address is used.
3664 3665
3665 o If both the SROM and the environment contain a MAC address, and the 3666 o If both the SROM and the environment contain a MAC address, and the
3666 addresses differ, the value from the environment is used and a 3667 addresses differ, the value from the environment is used and a
3667 warning is printed. 3668 warning is printed.
3668 3669
3669 o If neither SROM nor the environment contain a MAC address, an error 3670 o If neither SROM nor the environment contain a MAC address, an error
3670 is raised. 3671 is raised.
3671 3672
3672 If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses 3673 If Ethernet drivers implement the 'write_hwaddr' function, valid MAC addresses
3673 will be programmed into hardware as part of the initialization process. This 3674 will be programmed into hardware as part of the initialization process. This
3674 may be skipped by setting the appropriate 'ethmacskip' environment variable. 3675 may be skipped by setting the appropriate 'ethmacskip' environment variable.
3675 The naming convention is as follows: 3676 The naming convention is as follows:
3676 "ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc. 3677 "ethmacskip" (=>eth0), "eth1macskip" (=>eth1) etc.
3677 3678
3678 Image Formats: 3679 Image Formats:
3679 ============== 3680 ==============
3680 3681
3681 U-Boot is capable of booting (and performing other auxiliary operations on) 3682 U-Boot is capable of booting (and performing other auxiliary operations on)
3682 images in two formats: 3683 images in two formats:
3683 3684
3684 New uImage format (FIT) 3685 New uImage format (FIT)
3685 ----------------------- 3686 -----------------------
3686 3687
3687 Flexible and powerful format based on Flattened Image Tree -- FIT (similar 3688 Flexible and powerful format based on Flattened Image Tree -- FIT (similar
3688 to Flattened Device Tree). It allows the use of images with multiple 3689 to Flattened Device Tree). It allows the use of images with multiple
3689 components (several kernels, ramdisks, etc.), with contents protected by 3690 components (several kernels, ramdisks, etc.), with contents protected by
3690 SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory. 3691 SHA1, MD5 or CRC32. More details are found in the doc/uImage.FIT directory.
3691 3692
3692 3693
3693 Old uImage format 3694 Old uImage format
3694 ----------------- 3695 -----------------
3695 3696
3696 Old image format is based on binary files which can be basically anything, 3697 Old image format is based on binary files which can be basically anything,
3697 preceded by a special header; see the definitions in include/image.h for 3698 preceded by a special header; see the definitions in include/image.h for
3698 details; basically, the header defines the following image properties: 3699 details; basically, the header defines the following image properties:
3699 3700
3700 * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD, 3701 * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
3701 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks, 3702 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
3702 LynxOS, pSOS, QNX, RTEMS, INTEGRITY; 3703 LynxOS, pSOS, QNX, RTEMS, INTEGRITY;
3703 Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS, 3704 Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS,
3704 INTEGRITY). 3705 INTEGRITY).
3705 * Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86, 3706 * Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86,
3706 IA64, MIPS, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit; 3707 IA64, MIPS, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
3707 Currently supported: ARM, AVR32, Intel x86, MIPS, Nios II, PowerPC). 3708 Currently supported: ARM, AVR32, Intel x86, MIPS, Nios II, PowerPC).
3708 * Compression Type (uncompressed, gzip, bzip2) 3709 * Compression Type (uncompressed, gzip, bzip2)
3709 * Load Address 3710 * Load Address
3710 * Entry Point 3711 * Entry Point
3711 * Image Name 3712 * Image Name
3712 * Image Timestamp 3713 * Image Timestamp
3713 3714
3714 The header is marked by a special Magic Number, and both the header 3715 The header is marked by a special Magic Number, and both the header
3715 and the data portions of the image are secured against corruption by 3716 and the data portions of the image are secured against corruption by
3716 CRC32 checksums. 3717 CRC32 checksums.
3717 3718
3718 3719
3719 Linux Support: 3720 Linux Support:
3720 ============== 3721 ==============
3721 3722
3722 Although U-Boot should support any OS or standalone application 3723 Although U-Boot should support any OS or standalone application
3723 easily, the main focus has always been on Linux during the design of 3724 easily, the main focus has always been on Linux during the design of
3724 U-Boot. 3725 U-Boot.
3725 3726
3726 U-Boot includes many features that so far have been part of some 3727 U-Boot includes many features that so far have been part of some
3727 special "boot loader" code within the Linux kernel. Also, any 3728 special "boot loader" code within the Linux kernel. Also, any
3728 "initrd" images to be used are no longer part of one big Linux image; 3729 "initrd" images to be used are no longer part of one big Linux image;
3729 instead, kernel and "initrd" are separate images. This implementation 3730 instead, kernel and "initrd" are separate images. This implementation
3730 serves several purposes: 3731 serves several purposes:
3731 3732
3732 - the same features can be used for other OS or standalone 3733 - the same features can be used for other OS or standalone
3733 applications (for instance: using compressed images to reduce the 3734 applications (for instance: using compressed images to reduce the
3734 Flash memory footprint) 3735 Flash memory footprint)
3735 3736
3736 - it becomes much easier to port new Linux kernel versions because 3737 - it becomes much easier to port new Linux kernel versions because
3737 lots of low-level, hardware dependent stuff are done by U-Boot 3738 lots of low-level, hardware dependent stuff are done by U-Boot
3738 3739
3739 - the same Linux kernel image can now be used with different "initrd" 3740 - the same Linux kernel image can now be used with different "initrd"
3740 images; of course this also means that different kernel images can 3741 images; of course this also means that different kernel images can
3741 be run with the same "initrd". This makes testing easier (you don't 3742 be run with the same "initrd". This makes testing easier (you don't
3742 have to build a new "zImage.initrd" Linux image when you just 3743 have to build a new "zImage.initrd" Linux image when you just
3743 change a file in your "initrd"). Also, a field-upgrade of the 3744 change a file in your "initrd"). Also, a field-upgrade of the
3744 software is easier now. 3745 software is easier now.
3745 3746
3746 3747
3747 Linux HOWTO: 3748 Linux HOWTO:
3748 ============ 3749 ============
3749 3750
3750 Porting Linux to U-Boot based systems: 3751 Porting Linux to U-Boot based systems:
3751 --------------------------------------- 3752 ---------------------------------------
3752 3753
3753 U-Boot cannot save you from doing all the necessary modifications to 3754 U-Boot cannot save you from doing all the necessary modifications to
3754 configure the Linux device drivers for use with your target hardware 3755 configure the Linux device drivers for use with your target hardware
3755 (no, we don't intend to provide a full virtual machine interface to 3756 (no, we don't intend to provide a full virtual machine interface to
3756 Linux :-). 3757 Linux :-).
3757 3758
3758 But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot). 3759 But now you can ignore ALL boot loader code (in arch/powerpc/mbxboot).
3759 3760
3760 Just make sure your machine specific header file (for instance 3761 Just make sure your machine specific header file (for instance
3761 include/asm-ppc/tqm8xx.h) includes the same definition of the Board 3762 include/asm-ppc/tqm8xx.h) includes the same definition of the Board
3762 Information structure as we define in include/asm-<arch>/u-boot.h, 3763 Information structure as we define in include/asm-<arch>/u-boot.h,
3763 and make sure that your definition of IMAP_ADDR uses the same value 3764 and make sure that your definition of IMAP_ADDR uses the same value
3764 as your U-Boot configuration in CONFIG_SYS_IMMR. 3765 as your U-Boot configuration in CONFIG_SYS_IMMR.
3765 3766
3766 3767
3767 Configuring the Linux kernel: 3768 Configuring the Linux kernel:
3768 ----------------------------- 3769 -----------------------------
3769 3770
3770 No specific requirements for U-Boot. Make sure you have some root 3771 No specific requirements for U-Boot. Make sure you have some root
3771 device (initial ramdisk, NFS) for your target system. 3772 device (initial ramdisk, NFS) for your target system.
3772 3773
3773 3774
3774 Building a Linux Image: 3775 Building a Linux Image:
3775 ----------------------- 3776 -----------------------
3776 3777
3777 With U-Boot, "normal" build targets like "zImage" or "bzImage" are 3778 With U-Boot, "normal" build targets like "zImage" or "bzImage" are
3778 not used. If you use recent kernel source, a new build target 3779 not used. If you use recent kernel source, a new build target
3779 "uImage" will exist which automatically builds an image usable by 3780 "uImage" will exist which automatically builds an image usable by
3780 U-Boot. Most older kernels also have support for a "pImage" target, 3781 U-Boot. Most older kernels also have support for a "pImage" target,
3781 which was introduced for our predecessor project PPCBoot and uses a 3782 which was introduced for our predecessor project PPCBoot and uses a
3782 100% compatible format. 3783 100% compatible format.
3783 3784
3784 Example: 3785 Example:
3785 3786
3786 make TQM850L_config 3787 make TQM850L_config
3787 make oldconfig 3788 make oldconfig
3788 make dep 3789 make dep
3789 make uImage 3790 make uImage
3790 3791
3791 The "uImage" build target uses a special tool (in 'tools/mkimage') to 3792 The "uImage" build target uses a special tool (in 'tools/mkimage') to
3792 encapsulate a compressed Linux kernel image with header information, 3793 encapsulate a compressed Linux kernel image with header information,
3793 CRC32 checksum etc. for use with U-Boot. This is what we are doing: 3794 CRC32 checksum etc. for use with U-Boot. This is what we are doing:
3794 3795
3795 * build a standard "vmlinux" kernel image (in ELF binary format): 3796 * build a standard "vmlinux" kernel image (in ELF binary format):
3796 3797
3797 * convert the kernel into a raw binary image: 3798 * convert the kernel into a raw binary image:
3798 3799
3799 ${CROSS_COMPILE}-objcopy -O binary \ 3800 ${CROSS_COMPILE}-objcopy -O binary \
3800 -R .note -R .comment \ 3801 -R .note -R .comment \
3801 -S vmlinux linux.bin 3802 -S vmlinux linux.bin
3802 3803
3803 * compress the binary image: 3804 * compress the binary image:
3804 3805
3805 gzip -9 linux.bin 3806 gzip -9 linux.bin
3806 3807
3807 * package compressed binary image for U-Boot: 3808 * package compressed binary image for U-Boot:
3808 3809
3809 mkimage -A ppc -O linux -T kernel -C gzip \ 3810 mkimage -A ppc -O linux -T kernel -C gzip \
3810 -a 0 -e 0 -n "Linux Kernel Image" \ 3811 -a 0 -e 0 -n "Linux Kernel Image" \
3811 -d linux.bin.gz uImage 3812 -d linux.bin.gz uImage
3812 3813
3813 3814
3814 The "mkimage" tool can also be used to create ramdisk images for use 3815 The "mkimage" tool can also be used to create ramdisk images for use
3815 with U-Boot, either separated from the Linux kernel image, or 3816 with U-Boot, either separated from the Linux kernel image, or
3816 combined into one file. "mkimage" encapsulates the images with a 64 3817 combined into one file. "mkimage" encapsulates the images with a 64
3817 byte header containing information about target architecture, 3818 byte header containing information about target architecture,
3818 operating system, image type, compression method, entry points, time 3819 operating system, image type, compression method, entry points, time
3819 stamp, CRC32 checksums, etc. 3820 stamp, CRC32 checksums, etc.
3820 3821
3821 "mkimage" can be called in two ways: to verify existing images and 3822 "mkimage" can be called in two ways: to verify existing images and
3822 print the header information, or to build new images. 3823 print the header information, or to build new images.
3823 3824
3824 In the first form (with "-l" option) mkimage lists the information 3825 In the first form (with "-l" option) mkimage lists the information
3825 contained in the header of an existing U-Boot image; this includes 3826 contained in the header of an existing U-Boot image; this includes
3826 checksum verification: 3827 checksum verification:
3827 3828
3828 tools/mkimage -l image 3829 tools/mkimage -l image
3829 -l ==> list image header information 3830 -l ==> list image header information
3830 3831
3831 The second form (with "-d" option) is used to build a U-Boot image 3832 The second form (with "-d" option) is used to build a U-Boot image
3832 from a "data file" which is used as image payload: 3833 from a "data file" which is used as image payload:
3833 3834
3834 tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \ 3835 tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
3835 -n name -d data_file image 3836 -n name -d data_file image
3836 -A ==> set architecture to 'arch' 3837 -A ==> set architecture to 'arch'
3837 -O ==> set operating system to 'os' 3838 -O ==> set operating system to 'os'
3838 -T ==> set image type to 'type' 3839 -T ==> set image type to 'type'
3839 -C ==> set compression type 'comp' 3840 -C ==> set compression type 'comp'
3840 -a ==> set load address to 'addr' (hex) 3841 -a ==> set load address to 'addr' (hex)
3841 -e ==> set entry point to 'ep' (hex) 3842 -e ==> set entry point to 'ep' (hex)
3842 -n ==> set image name to 'name' 3843 -n ==> set image name to 'name'
3843 -d ==> use image data from 'datafile' 3844 -d ==> use image data from 'datafile'
3844 3845
3845 Right now, all Linux kernels for PowerPC systems use the same load 3846 Right now, all Linux kernels for PowerPC systems use the same load
3846 address (0x00000000), but the entry point address depends on the 3847 address (0x00000000), but the entry point address depends on the
3847 kernel version: 3848 kernel version:
3848 3849
3849 - 2.2.x kernels have the entry point at 0x0000000C, 3850 - 2.2.x kernels have the entry point at 0x0000000C,
3850 - 2.3.x and later kernels have the entry point at 0x00000000. 3851 - 2.3.x and later kernels have the entry point at 0x00000000.
3851 3852
3852 So a typical call to build a U-Boot image would read: 3853 So a typical call to build a U-Boot image would read:
3853 3854
3854 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \ 3855 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
3855 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \ 3856 > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
3856 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \ 3857 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz \
3857 > examples/uImage.TQM850L 3858 > examples/uImage.TQM850L
3858 Image Name: 2.4.4 kernel for TQM850L 3859 Image Name: 2.4.4 kernel for TQM850L
3859 Created: Wed Jul 19 02:34:59 2000 3860 Created: Wed Jul 19 02:34:59 2000
3860 Image Type: PowerPC Linux Kernel Image (gzip compressed) 3861 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3861 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB 3862 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
3862 Load Address: 0x00000000 3863 Load Address: 0x00000000
3863 Entry Point: 0x00000000 3864 Entry Point: 0x00000000
3864 3865
3865 To verify the contents of the image (or check for corruption): 3866 To verify the contents of the image (or check for corruption):
3866 3867
3867 -> tools/mkimage -l examples/uImage.TQM850L 3868 -> tools/mkimage -l examples/uImage.TQM850L
3868 Image Name: 2.4.4 kernel for TQM850L 3869 Image Name: 2.4.4 kernel for TQM850L
3869 Created: Wed Jul 19 02:34:59 2000 3870 Created: Wed Jul 19 02:34:59 2000
3870 Image Type: PowerPC Linux Kernel Image (gzip compressed) 3871 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3871 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB 3872 Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
3872 Load Address: 0x00000000 3873 Load Address: 0x00000000
3873 Entry Point: 0x00000000 3874 Entry Point: 0x00000000
3874 3875
3875 NOTE: for embedded systems where boot time is critical you can trade 3876 NOTE: for embedded systems where boot time is critical you can trade
3876 speed for memory and install an UNCOMPRESSED image instead: this 3877 speed for memory and install an UNCOMPRESSED image instead: this
3877 needs more space in Flash, but boots much faster since it does not 3878 needs more space in Flash, but boots much faster since it does not
3878 need to be uncompressed: 3879 need to be uncompressed:
3879 3880
3880 -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz 3881 -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux.gz
3881 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \ 3882 -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
3882 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \ 3883 > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
3883 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \ 3884 > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/powerpc/coffboot/vmlinux \
3884 > examples/uImage.TQM850L-uncompressed 3885 > examples/uImage.TQM850L-uncompressed
3885 Image Name: 2.4.4 kernel for TQM850L 3886 Image Name: 2.4.4 kernel for TQM850L
3886 Created: Wed Jul 19 02:34:59 2000 3887 Created: Wed Jul 19 02:34:59 2000
3887 Image Type: PowerPC Linux Kernel Image (uncompressed) 3888 Image Type: PowerPC Linux Kernel Image (uncompressed)
3888 Data Size: 792160 Bytes = 773.59 kB = 0.76 MB 3889 Data Size: 792160 Bytes = 773.59 kB = 0.76 MB
3889 Load Address: 0x00000000 3890 Load Address: 0x00000000
3890 Entry Point: 0x00000000 3891 Entry Point: 0x00000000
3891 3892
3892 3893
3893 Similar you can build U-Boot images from a 'ramdisk.image.gz' file 3894 Similar you can build U-Boot images from a 'ramdisk.image.gz' file
3894 when your kernel is intended to use an initial ramdisk: 3895 when your kernel is intended to use an initial ramdisk:
3895 3896
3896 -> tools/mkimage -n 'Simple Ramdisk Image' \ 3897 -> tools/mkimage -n 'Simple Ramdisk Image' \
3897 > -A ppc -O linux -T ramdisk -C gzip \ 3898 > -A ppc -O linux -T ramdisk -C gzip \
3898 > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd 3899 > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
3899 Image Name: Simple Ramdisk Image 3900 Image Name: Simple Ramdisk Image
3900 Created: Wed Jan 12 14:01:50 2000 3901 Created: Wed Jan 12 14:01:50 2000
3901 Image Type: PowerPC Linux RAMDisk Image (gzip compressed) 3902 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
3902 Data Size: 566530 Bytes = 553.25 kB = 0.54 MB 3903 Data Size: 566530 Bytes = 553.25 kB = 0.54 MB
3903 Load Address: 0x00000000 3904 Load Address: 0x00000000
3904 Entry Point: 0x00000000 3905 Entry Point: 0x00000000
3905 3906
3906 3907
3907 Installing a Linux Image: 3908 Installing a Linux Image:
3908 ------------------------- 3909 -------------------------
3909 3910
3910 To downloading a U-Boot image over the serial (console) interface, 3911 To downloading a U-Boot image over the serial (console) interface,
3911 you must convert the image to S-Record format: 3912 you must convert the image to S-Record format:
3912 3913
3913 objcopy -I binary -O srec examples/image examples/image.srec 3914 objcopy -I binary -O srec examples/image examples/image.srec
3914 3915
3915 The 'objcopy' does not understand the information in the U-Boot 3916 The 'objcopy' does not understand the information in the U-Boot
3916 image header, so the resulting S-Record file will be relative to 3917 image header, so the resulting S-Record file will be relative to
3917 address 0x00000000. To load it to a given address, you need to 3918 address 0x00000000. To load it to a given address, you need to
3918 specify the target address as 'offset' parameter with the 'loads' 3919 specify the target address as 'offset' parameter with the 'loads'
3919 command. 3920 command.
3920 3921
3921 Example: install the image to address 0x40100000 (which on the 3922 Example: install the image to address 0x40100000 (which on the
3922 TQM8xxL is in the first Flash bank): 3923 TQM8xxL is in the first Flash bank):
3923 3924
3924 => erase 40100000 401FFFFF 3925 => erase 40100000 401FFFFF
3925 3926
3926 .......... done 3927 .......... done
3927 Erased 8 sectors 3928 Erased 8 sectors
3928 3929
3929 => loads 40100000 3930 => loads 40100000
3930 ## Ready for S-Record download ... 3931 ## Ready for S-Record download ...
3931 ~>examples/image.srec 3932 ~>examples/image.srec
3932 1 2 3 4 5 6 7 8 9 10 11 12 13 ... 3933 1 2 3 4 5 6 7 8 9 10 11 12 13 ...
3933 ... 3934 ...
3934 15989 15990 15991 15992 3935 15989 15990 15991 15992
3935 [file transfer complete] 3936 [file transfer complete]
3936 [connected] 3937 [connected]
3937 ## Start Addr = 0x00000000 3938 ## Start Addr = 0x00000000
3938 3939
3939 3940
3940 You can check the success of the download using the 'iminfo' command; 3941 You can check the success of the download using the 'iminfo' command;
3941 this includes a checksum verification so you can be sure no data 3942 this includes a checksum verification so you can be sure no data
3942 corruption happened: 3943 corruption happened:
3943 3944
3944 => imi 40100000 3945 => imi 40100000
3945 3946
3946 ## Checking Image at 40100000 ... 3947 ## Checking Image at 40100000 ...
3947 Image Name: 2.2.13 for initrd on TQM850L 3948 Image Name: 2.2.13 for initrd on TQM850L
3948 Image Type: PowerPC Linux Kernel Image (gzip compressed) 3949 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3949 Data Size: 335725 Bytes = 327 kB = 0 MB 3950 Data Size: 335725 Bytes = 327 kB = 0 MB
3950 Load Address: 00000000 3951 Load Address: 00000000
3951 Entry Point: 0000000c 3952 Entry Point: 0000000c
3952 Verifying Checksum ... OK 3953 Verifying Checksum ... OK
3953 3954
3954 3955
3955 Boot Linux: 3956 Boot Linux:
3956 ----------- 3957 -----------
3957 3958
3958 The "bootm" command is used to boot an application that is stored in 3959 The "bootm" command is used to boot an application that is stored in
3959 memory (RAM or Flash). In case of a Linux kernel image, the contents 3960 memory (RAM or Flash). In case of a Linux kernel image, the contents
3960 of the "bootargs" environment variable is passed to the kernel as 3961 of the "bootargs" environment variable is passed to the kernel as
3961 parameters. You can check and modify this variable using the 3962 parameters. You can check and modify this variable using the
3962 "printenv" and "setenv" commands: 3963 "printenv" and "setenv" commands:
3963 3964
3964 3965
3965 => printenv bootargs 3966 => printenv bootargs
3966 bootargs=root=/dev/ram 3967 bootargs=root=/dev/ram
3967 3968
3968 => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2 3969 => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
3969 3970
3970 => printenv bootargs 3971 => printenv bootargs
3971 bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2 3972 bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
3972 3973
3973 => bootm 40020000 3974 => bootm 40020000
3974 ## Booting Linux kernel at 40020000 ... 3975 ## Booting Linux kernel at 40020000 ...
3975 Image Name: 2.2.13 for NFS on TQM850L 3976 Image Name: 2.2.13 for NFS on TQM850L
3976 Image Type: PowerPC Linux Kernel Image (gzip compressed) 3977 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3977 Data Size: 381681 Bytes = 372 kB = 0 MB 3978 Data Size: 381681 Bytes = 372 kB = 0 MB
3978 Load Address: 00000000 3979 Load Address: 00000000
3979 Entry Point: 0000000c 3980 Entry Point: 0000000c
3980 Verifying Checksum ... OK 3981 Verifying Checksum ... OK
3981 Uncompressing Kernel Image ... OK 3982 Uncompressing Kernel Image ... OK
3982 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000 3983 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
3983 Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2 3984 Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
3984 time_init: decrementer frequency = 187500000/60 3985 time_init: decrementer frequency = 187500000/60
3985 Calibrating delay loop... 49.77 BogoMIPS 3986 Calibrating delay loop... 49.77 BogoMIPS
3986 Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000] 3987 Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
3987 ... 3988 ...
3988 3989
3989 If you want to boot a Linux kernel with initial RAM disk, you pass 3990 If you want to boot a Linux kernel with initial RAM disk, you pass
3990 the memory addresses of both the kernel and the initrd image (PPBCOOT 3991 the memory addresses of both the kernel and the initrd image (PPBCOOT
3991 format!) to the "bootm" command: 3992 format!) to the "bootm" command:
3992 3993
3993 => imi 40100000 40200000 3994 => imi 40100000 40200000
3994 3995
3995 ## Checking Image at 40100000 ... 3996 ## Checking Image at 40100000 ...
3996 Image Name: 2.2.13 for initrd on TQM850L 3997 Image Name: 2.2.13 for initrd on TQM850L
3997 Image Type: PowerPC Linux Kernel Image (gzip compressed) 3998 Image Type: PowerPC Linux Kernel Image (gzip compressed)
3998 Data Size: 335725 Bytes = 327 kB = 0 MB 3999 Data Size: 335725 Bytes = 327 kB = 0 MB
3999 Load Address: 00000000 4000 Load Address: 00000000
4000 Entry Point: 0000000c 4001 Entry Point: 0000000c
4001 Verifying Checksum ... OK 4002 Verifying Checksum ... OK
4002 4003
4003 ## Checking Image at 40200000 ... 4004 ## Checking Image at 40200000 ...
4004 Image Name: Simple Ramdisk Image 4005 Image Name: Simple Ramdisk Image
4005 Image Type: PowerPC Linux RAMDisk Image (gzip compressed) 4006 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
4006 Data Size: 566530 Bytes = 553 kB = 0 MB 4007 Data Size: 566530 Bytes = 553 kB = 0 MB
4007 Load Address: 00000000 4008 Load Address: 00000000
4008 Entry Point: 00000000 4009 Entry Point: 00000000
4009 Verifying Checksum ... OK 4010 Verifying Checksum ... OK
4010 4011
4011 => bootm 40100000 40200000 4012 => bootm 40100000 40200000
4012 ## Booting Linux kernel at 40100000 ... 4013 ## Booting Linux kernel at 40100000 ...
4013 Image Name: 2.2.13 for initrd on TQM850L 4014 Image Name: 2.2.13 for initrd on TQM850L
4014 Image Type: PowerPC Linux Kernel Image (gzip compressed) 4015 Image Type: PowerPC Linux Kernel Image (gzip compressed)
4015 Data Size: 335725 Bytes = 327 kB = 0 MB 4016 Data Size: 335725 Bytes = 327 kB = 0 MB
4016 Load Address: 00000000 4017 Load Address: 00000000
4017 Entry Point: 0000000c 4018 Entry Point: 0000000c
4018 Verifying Checksum ... OK 4019 Verifying Checksum ... OK
4019 Uncompressing Kernel Image ... OK 4020 Uncompressing Kernel Image ... OK
4020 ## Loading RAMDisk Image at 40200000 ... 4021 ## Loading RAMDisk Image at 40200000 ...
4021 Image Name: Simple Ramdisk Image 4022 Image Name: Simple Ramdisk Image
4022 Image Type: PowerPC Linux RAMDisk Image (gzip compressed) 4023 Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
4023 Data Size: 566530 Bytes = 553 kB = 0 MB 4024 Data Size: 566530 Bytes = 553 kB = 0 MB
4024 Load Address: 00000000 4025 Load Address: 00000000
4025 Entry Point: 00000000 4026 Entry Point: 00000000
4026 Verifying Checksum ... OK 4027 Verifying Checksum ... OK
4027 Loading Ramdisk ... OK 4028 Loading Ramdisk ... OK
4028 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000 4029 Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
4029 Boot arguments: root=/dev/ram 4030 Boot arguments: root=/dev/ram
4030 time_init: decrementer frequency = 187500000/60 4031 time_init: decrementer frequency = 187500000/60
4031 Calibrating delay loop... 49.77 BogoMIPS 4032 Calibrating delay loop... 49.77 BogoMIPS
4032 ... 4033 ...
4033 RAMDISK: Compressed image found at block 0 4034 RAMDISK: Compressed image found at block 0
4034 VFS: Mounted root (ext2 filesystem). 4035 VFS: Mounted root (ext2 filesystem).
4035 4036
4036 bash# 4037 bash#
4037 4038
4038 Boot Linux and pass a flat device tree: 4039 Boot Linux and pass a flat device tree:
4039 ----------- 4040 -----------
4040 4041
4041 First, U-Boot must be compiled with the appropriate defines. See the section 4042 First, U-Boot must be compiled with the appropriate defines. See the section
4042 titled "Linux Kernel Interface" above for a more in depth explanation. The 4043 titled "Linux Kernel Interface" above for a more in depth explanation. The
4043 following is an example of how to start a kernel and pass an updated 4044 following is an example of how to start a kernel and pass an updated
4044 flat device tree: 4045 flat device tree:
4045 4046
4046 => print oftaddr 4047 => print oftaddr
4047 oftaddr=0x300000 4048 oftaddr=0x300000
4048 => print oft 4049 => print oft
4049 oft=oftrees/mpc8540ads.dtb 4050 oft=oftrees/mpc8540ads.dtb
4050 => tftp $oftaddr $oft 4051 => tftp $oftaddr $oft
4051 Speed: 1000, full duplex 4052 Speed: 1000, full duplex
4052 Using TSEC0 device 4053 Using TSEC0 device
4053 TFTP from server 192.168.1.1; our IP address is 192.168.1.101 4054 TFTP from server 192.168.1.1; our IP address is 192.168.1.101
4054 Filename 'oftrees/mpc8540ads.dtb'. 4055 Filename 'oftrees/mpc8540ads.dtb'.
4055 Load address: 0x300000 4056 Load address: 0x300000
4056 Loading: # 4057 Loading: #
4057 done 4058 done
4058 Bytes transferred = 4106 (100a hex) 4059 Bytes transferred = 4106 (100a hex)
4059 => tftp $loadaddr $bootfile 4060 => tftp $loadaddr $bootfile
4060 Speed: 1000, full duplex 4061 Speed: 1000, full duplex
4061 Using TSEC0 device 4062 Using TSEC0 device
4062 TFTP from server 192.168.1.1; our IP address is 192.168.1.2 4063 TFTP from server 192.168.1.1; our IP address is 192.168.1.2
4063 Filename 'uImage'. 4064 Filename 'uImage'.
4064 Load address: 0x200000 4065 Load address: 0x200000
4065 Loading:############ 4066 Loading:############
4066 done 4067 done
4067 Bytes transferred = 1029407 (fb51f hex) 4068 Bytes transferred = 1029407 (fb51f hex)
4068 => print loadaddr 4069 => print loadaddr
4069 loadaddr=200000 4070 loadaddr=200000
4070 => print oftaddr 4071 => print oftaddr
4071 oftaddr=0x300000 4072 oftaddr=0x300000
4072 => bootm $loadaddr - $oftaddr 4073 => bootm $loadaddr - $oftaddr
4073 ## Booting image at 00200000 ... 4074 ## Booting image at 00200000 ...
4074 Image Name: Linux-2.6.17-dirty 4075 Image Name: Linux-2.6.17-dirty
4075 Image Type: PowerPC Linux Kernel Image (gzip compressed) 4076 Image Type: PowerPC Linux Kernel Image (gzip compressed)
4076 Data Size: 1029343 Bytes = 1005.2 kB 4077 Data Size: 1029343 Bytes = 1005.2 kB
4077 Load Address: 00000000 4078 Load Address: 00000000
4078 Entry Point: 00000000 4079 Entry Point: 00000000
4079 Verifying Checksum ... OK 4080 Verifying Checksum ... OK
4080 Uncompressing Kernel Image ... OK 4081 Uncompressing Kernel Image ... OK
4081 Booting using flat device tree at 0x300000 4082 Booting using flat device tree at 0x300000
4082 Using MPC85xx ADS machine description 4083 Using MPC85xx ADS machine description
4083 Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb 4084 Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=0Mb residual: 0Mb
4084 [snip] 4085 [snip]
4085 4086
4086 4087
4087 More About U-Boot Image Types: 4088 More About U-Boot Image Types:
4088 ------------------------------ 4089 ------------------------------
4089 4090
4090 U-Boot supports the following image types: 4091 U-Boot supports the following image types:
4091 4092
4092 "Standalone Programs" are directly runnable in the environment 4093 "Standalone Programs" are directly runnable in the environment
4093 provided by U-Boot; it is expected that (if they behave 4094 provided by U-Boot; it is expected that (if they behave
4094 well) you can continue to work in U-Boot after return from 4095 well) you can continue to work in U-Boot after return from
4095 the Standalone Program. 4096 the Standalone Program.
4096 "OS Kernel Images" are usually images of some Embedded OS which 4097 "OS Kernel Images" are usually images of some Embedded OS which
4097 will take over control completely. Usually these programs 4098 will take over control completely. Usually these programs
4098 will install their own set of exception handlers, device 4099 will install their own set of exception handlers, device
4099 drivers, set up the MMU, etc. - this means, that you cannot 4100 drivers, set up the MMU, etc. - this means, that you cannot
4100 expect to re-enter U-Boot except by resetting the CPU. 4101 expect to re-enter U-Boot except by resetting the CPU.
4101 "RAMDisk Images" are more or less just data blocks, and their 4102 "RAMDisk Images" are more or less just data blocks, and their
4102 parameters (address, size) are passed to an OS kernel that is 4103 parameters (address, size) are passed to an OS kernel that is
4103 being started. 4104 being started.
4104 "Multi-File Images" contain several images, typically an OS 4105 "Multi-File Images" contain several images, typically an OS
4105 (Linux) kernel image and one or more data images like 4106 (Linux) kernel image and one or more data images like
4106 RAMDisks. This construct is useful for instance when you want 4107 RAMDisks. This construct is useful for instance when you want
4107 to boot over the network using BOOTP etc., where the boot 4108 to boot over the network using BOOTP etc., where the boot
4108 server provides just a single image file, but you want to get 4109 server provides just a single image file, but you want to get
4109 for instance an OS kernel and a RAMDisk image. 4110 for instance an OS kernel and a RAMDisk image.
4110 4111
4111 "Multi-File Images" start with a list of image sizes, each 4112 "Multi-File Images" start with a list of image sizes, each
4112 image size (in bytes) specified by an "uint32_t" in network 4113 image size (in bytes) specified by an "uint32_t" in network
4113 byte order. This list is terminated by an "(uint32_t)0". 4114 byte order. This list is terminated by an "(uint32_t)0".
4114 Immediately after the terminating 0 follow the images, one by 4115 Immediately after the terminating 0 follow the images, one by
4115 one, all aligned on "uint32_t" boundaries (size rounded up to 4116 one, all aligned on "uint32_t" boundaries (size rounded up to
4116 a multiple of 4 bytes). 4117 a multiple of 4 bytes).
4117 4118
4118 "Firmware Images" are binary images containing firmware (like 4119 "Firmware Images" are binary images containing firmware (like
4119 U-Boot or FPGA images) which usually will be programmed to 4120 U-Boot or FPGA images) which usually will be programmed to
4120 flash memory. 4121 flash memory.
4121 4122
4122 "Script files" are command sequences that will be executed by 4123 "Script files" are command sequences that will be executed by
4123 U-Boot's command interpreter; this feature is especially 4124 U-Boot's command interpreter; this feature is especially
4124 useful when you configure U-Boot to use a real shell (hush) 4125 useful when you configure U-Boot to use a real shell (hush)
4125 as command interpreter. 4126 as command interpreter.
4126 4127
4127 4128
4128 Standalone HOWTO: 4129 Standalone HOWTO:
4129 ================= 4130 =================
4130 4131
4131 One of the features of U-Boot is that you can dynamically load and 4132 One of the features of U-Boot is that you can dynamically load and
4132 run "standalone" applications, which can use some resources of 4133 run "standalone" applications, which can use some resources of
4133 U-Boot like console I/O functions or interrupt services. 4134 U-Boot like console I/O functions or interrupt services.
4134 4135
4135 Two simple examples are included with the sources: 4136 Two simple examples are included with the sources:
4136 4137
4137 "Hello World" Demo: 4138 "Hello World" Demo:
4138 ------------------- 4139 -------------------
4139 4140
4140 'examples/hello_world.c' contains a small "Hello World" Demo 4141 'examples/hello_world.c' contains a small "Hello World" Demo
4141 application; it is automatically compiled when you build U-Boot. 4142 application; it is automatically compiled when you build U-Boot.
4142 It's configured to run at address 0x00040004, so you can play with it 4143 It's configured to run at address 0x00040004, so you can play with it
4143 like that: 4144 like that:
4144 4145
4145 => loads 4146 => loads
4146 ## Ready for S-Record download ... 4147 ## Ready for S-Record download ...
4147 ~>examples/hello_world.srec 4148 ~>examples/hello_world.srec
4148 1 2 3 4 5 6 7 8 9 10 11 ... 4149 1 2 3 4 5 6 7 8 9 10 11 ...
4149 [file transfer complete] 4150 [file transfer complete]
4150 [connected] 4151 [connected]
4151 ## Start Addr = 0x00040004 4152 ## Start Addr = 0x00040004
4152 4153
4153 => go 40004 Hello World! This is a test. 4154 => go 40004 Hello World! This is a test.
4154 ## Starting application at 0x00040004 ... 4155 ## Starting application at 0x00040004 ...
4155 Hello World 4156 Hello World
4156 argc = 7 4157 argc = 7
4157 argv[0] = "40004" 4158 argv[0] = "40004"
4158 argv[1] = "Hello" 4159 argv[1] = "Hello"
4159 argv[2] = "World!" 4160 argv[2] = "World!"
4160 argv[3] = "This" 4161 argv[3] = "This"
4161 argv[4] = "is" 4162 argv[4] = "is"
4162 argv[5] = "a" 4163 argv[5] = "a"
4163 argv[6] = "test." 4164 argv[6] = "test."
4164 argv[7] = "<NULL>" 4165 argv[7] = "<NULL>"
4165 Hit any key to exit ... 4166 Hit any key to exit ...
4166 4167
4167 ## Application terminated, rc = 0x0 4168 ## Application terminated, rc = 0x0
4168 4169
4169 Another example, which demonstrates how to register a CPM interrupt 4170 Another example, which demonstrates how to register a CPM interrupt
4170 handler with the U-Boot code, can be found in 'examples/timer.c'. 4171 handler with the U-Boot code, can be found in 'examples/timer.c'.
4171 Here, a CPM timer is set up to generate an interrupt every second. 4172 Here, a CPM timer is set up to generate an interrupt every second.
4172 The interrupt service routine is trivial, just printing a '.' 4173 The interrupt service routine is trivial, just printing a '.'
4173 character, but this is just a demo program. The application can be 4174 character, but this is just a demo program. The application can be
4174 controlled by the following keys: 4175 controlled by the following keys:
4175 4176
4176 ? - print current values og the CPM Timer registers 4177 ? - print current values og the CPM Timer registers
4177 b - enable interrupts and start timer 4178 b - enable interrupts and start timer
4178 e - stop timer and disable interrupts 4179 e - stop timer and disable interrupts
4179 q - quit application 4180 q - quit application
4180 4181
4181 => loads 4182 => loads
4182 ## Ready for S-Record download ... 4183 ## Ready for S-Record download ...
4183 ~>examples/timer.srec 4184 ~>examples/timer.srec
4184 1 2 3 4 5 6 7 8 9 10 11 ... 4185 1 2 3 4 5 6 7 8 9 10 11 ...
4185 [file transfer complete] 4186 [file transfer complete]
4186 [connected] 4187 [connected]
4187 ## Start Addr = 0x00040004 4188 ## Start Addr = 0x00040004
4188 4189
4189 => go 40004 4190 => go 40004
4190 ## Starting application at 0x00040004 ... 4191 ## Starting application at 0x00040004 ...
4191 TIMERS=0xfff00980 4192 TIMERS=0xfff00980
4192 Using timer 1 4193 Using timer 1
4193 tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0 4194 tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
4194 4195
4195 Hit 'b': 4196 Hit 'b':
4196 [q, b, e, ?] Set interval 1000000 us 4197 [q, b, e, ?] Set interval 1000000 us
4197 Enabling timer 4198 Enabling timer
4198 Hit '?': 4199 Hit '?':
4199 [q, b, e, ?] ........ 4200 [q, b, e, ?] ........
4200 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0 4201 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
4201 Hit '?': 4202 Hit '?':
4202 [q, b, e, ?] . 4203 [q, b, e, ?] .
4203 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0 4204 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
4204 Hit '?': 4205 Hit '?':
4205 [q, b, e, ?] . 4206 [q, b, e, ?] .
4206 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0 4207 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
4207 Hit '?': 4208 Hit '?':
4208 [q, b, e, ?] . 4209 [q, b, e, ?] .
4209 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0 4210 tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
4210 Hit 'e': 4211 Hit 'e':
4211 [q, b, e, ?] ...Stopping timer 4212 [q, b, e, ?] ...Stopping timer
4212 Hit 'q': 4213 Hit 'q':
4213 [q, b, e, ?] ## Application terminated, rc = 0x0 4214 [q, b, e, ?] ## Application terminated, rc = 0x0
4214 4215
4215 4216
4216 Minicom warning: 4217 Minicom warning:
4217 ================ 4218 ================
4218 4219
4219 Over time, many people have reported problems when trying to use the 4220 Over time, many people have reported problems when trying to use the
4220 "minicom" terminal emulation program for serial download. I (wd) 4221 "minicom" terminal emulation program for serial download. I (wd)
4221 consider minicom to be broken, and recommend not to use it. Under 4222 consider minicom to be broken, and recommend not to use it. Under
4222 Unix, I recommend to use C-Kermit for general purpose use (and 4223 Unix, I recommend to use C-Kermit for general purpose use (and
4223 especially for kermit binary protocol download ("loadb" command), and 4224 especially for kermit binary protocol download ("loadb" command), and
4224 use "cu" for S-Record download ("loads" command). 4225 use "cu" for S-Record download ("loads" command).
4225 4226
4226 Nevertheless, if you absolutely want to use it try adding this 4227 Nevertheless, if you absolutely want to use it try adding this
4227 configuration to your "File transfer protocols" section: 4228 configuration to your "File transfer protocols" section:
4228 4229
4229 Name Program Name U/D FullScr IO-Red. Multi 4230 Name Program Name U/D FullScr IO-Red. Multi
4230 X kermit /usr/bin/kermit -i -l %l -s Y U Y N N 4231 X kermit /usr/bin/kermit -i -l %l -s Y U Y N N
4231 Y kermit /usr/bin/kermit -i -l %l -r N D Y N N 4232 Y kermit /usr/bin/kermit -i -l %l -r N D Y N N
4232 4233
4233 4234
4234 NetBSD Notes: 4235 NetBSD Notes:
4235 ============= 4236 =============
4236 4237
4237 Starting at version 0.9.2, U-Boot supports NetBSD both as host 4238 Starting at version 0.9.2, U-Boot supports NetBSD both as host
4238 (build U-Boot) and target system (boots NetBSD/mpc8xx). 4239 (build U-Boot) and target system (boots NetBSD/mpc8xx).
4239 4240
4240 Building requires a cross environment; it is known to work on 4241 Building requires a cross environment; it is known to work on
4241 NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also 4242 NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also
4242 need gmake since the Makefiles are not compatible with BSD make). 4243 need gmake since the Makefiles are not compatible with BSD make).
4243 Note that the cross-powerpc package does not install include files; 4244 Note that the cross-powerpc package does not install include files;
4244 attempting to build U-Boot will fail because <machine/ansi.h> is 4245 attempting to build U-Boot will fail because <machine/ansi.h> is
4245 missing. This file has to be installed and patched manually: 4246 missing. This file has to be installed and patched manually:
4246 4247
4247 # cd /usr/pkg/cross/powerpc-netbsd/include 4248 # cd /usr/pkg/cross/powerpc-netbsd/include
4248 # mkdir powerpc 4249 # mkdir powerpc
4249 # ln -s powerpc machine 4250 # ln -s powerpc machine
4250 # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h 4251 # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h
4251 # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST 4252 # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST
4252 4253
4253 Native builds *don't* work due to incompatibilities between native 4254 Native builds *don't* work due to incompatibilities between native
4254 and U-Boot include files. 4255 and U-Boot include files.
4255 4256
4256 Booting assumes that (the first part of) the image booted is a 4257 Booting assumes that (the first part of) the image booted is a
4257 stage-2 loader which in turn loads and then invokes the kernel 4258 stage-2 loader which in turn loads and then invokes the kernel
4258 proper. Loader sources will eventually appear in the NetBSD source 4259 proper. Loader sources will eventually appear in the NetBSD source
4259 tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the 4260 tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the
4260 meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz 4261 meantime, see ftp://ftp.denx.de/pub/u-boot/ppcboot_stage2.tar.gz
4261 4262
4262 4263
4263 Implementation Internals: 4264 Implementation Internals:
4264 ========================= 4265 =========================
4265 4266
4266 The following is not intended to be a complete description of every 4267 The following is not intended to be a complete description of every
4267 implementation detail. However, it should help to understand the 4268 implementation detail. However, it should help to understand the
4268 inner workings of U-Boot and make it easier to port it to custom 4269 inner workings of U-Boot and make it easier to port it to custom
4269 hardware. 4270 hardware.
4270 4271
4271 4272
4272 Initial Stack, Global Data: 4273 Initial Stack, Global Data:
4273 --------------------------- 4274 ---------------------------
4274 4275
4275 The implementation of U-Boot is complicated by the fact that U-Boot 4276 The implementation of U-Boot is complicated by the fact that U-Boot
4276 starts running out of ROM (flash memory), usually without access to 4277 starts running out of ROM (flash memory), usually without access to
4277 system RAM (because the memory controller is not initialized yet). 4278 system RAM (because the memory controller is not initialized yet).
4278 This means that we don't have writable Data or BSS segments, and BSS 4279 This means that we don't have writable Data or BSS segments, and BSS
4279 is not initialized as zero. To be able to get a C environment working 4280 is not initialized as zero. To be able to get a C environment working
4280 at all, we have to allocate at least a minimal stack. Implementation 4281 at all, we have to allocate at least a minimal stack. Implementation
4281 options for this are defined and restricted by the CPU used: Some CPU 4282 options for this are defined and restricted by the CPU used: Some CPU
4282 models provide on-chip memory (like the IMMR area on MPC8xx and 4283 models provide on-chip memory (like the IMMR area on MPC8xx and
4283 MPC826x processors), on others (parts of) the data cache can be 4284 MPC826x processors), on others (parts of) the data cache can be
4284 locked as (mis-) used as memory, etc. 4285 locked as (mis-) used as memory, etc.
4285 4286
4286 Chris Hallinan posted a good summary of these issues to the 4287 Chris Hallinan posted a good summary of these issues to the
4287 U-Boot mailing list: 4288 U-Boot mailing list:
4288 4289
4289 Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)? 4290 Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
4290 From: "Chris Hallinan" <clh@net1plus.com> 4291 From: "Chris Hallinan" <clh@net1plus.com>
4291 Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET) 4292 Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
4292 ... 4293 ...
4293 4294
4294 Correct me if I'm wrong, folks, but the way I understand it 4295 Correct me if I'm wrong, folks, but the way I understand it
4295 is this: Using DCACHE as initial RAM for Stack, etc, does not 4296 is this: Using DCACHE as initial RAM for Stack, etc, does not
4296 require any physical RAM backing up the cache. The cleverness 4297 require any physical RAM backing up the cache. The cleverness
4297 is that the cache is being used as a temporary supply of 4298 is that the cache is being used as a temporary supply of
4298 necessary storage before the SDRAM controller is setup. It's 4299 necessary storage before the SDRAM controller is setup. It's
4299 beyond the scope of this list to explain the details, but you 4300 beyond the scope of this list to explain the details, but you
4300 can see how this works by studying the cache architecture and 4301 can see how this works by studying the cache architecture and
4301 operation in the architecture and processor-specific manuals. 4302 operation in the architecture and processor-specific manuals.
4302 4303
4303 OCM is On Chip Memory, which I believe the 405GP has 4K. It 4304 OCM is On Chip Memory, which I believe the 405GP has 4K. It
4304 is another option for the system designer to use as an 4305 is another option for the system designer to use as an
4305 initial stack/RAM area prior to SDRAM being available. Either 4306 initial stack/RAM area prior to SDRAM being available. Either
4306 option should work for you. Using CS 4 should be fine if your 4307 option should work for you. Using CS 4 should be fine if your
4307 board designers haven't used it for something that would 4308 board designers haven't used it for something that would
4308 cause you grief during the initial boot! It is frequently not 4309 cause you grief during the initial boot! It is frequently not
4309 used. 4310 used.
4310 4311
4311 CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere 4312 CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere
4312 with your processor/board/system design. The default value 4313 with your processor/board/system design. The default value
4313 you will find in any recent u-boot distribution in 4314 you will find in any recent u-boot distribution in
4314 walnut.h should work for you. I'd set it to a value larger 4315 walnut.h should work for you. I'd set it to a value larger
4315 than your SDRAM module. If you have a 64MB SDRAM module, set 4316 than your SDRAM module. If you have a 64MB SDRAM module, set
4316 it above 400_0000. Just make sure your board has no resources 4317 it above 400_0000. Just make sure your board has no resources
4317 that are supposed to respond to that address! That code in 4318 that are supposed to respond to that address! That code in
4318 start.S has been around a while and should work as is when 4319 start.S has been around a while and should work as is when
4319 you get the config right. 4320 you get the config right.
4320 4321
4321 -Chris Hallinan 4322 -Chris Hallinan
4322 DS4.COM, Inc. 4323 DS4.COM, Inc.
4323 4324
4324 It is essential to remember this, since it has some impact on the C 4325 It is essential to remember this, since it has some impact on the C
4325 code for the initialization procedures: 4326 code for the initialization procedures:
4326 4327
4327 * Initialized global data (data segment) is read-only. Do not attempt 4328 * Initialized global data (data segment) is read-only. Do not attempt
4328 to write it. 4329 to write it.
4329 4330
4330 * Do not use any uninitialized global data (or implicitely initialized 4331 * Do not use any uninitialized global data (or implicitely initialized
4331 as zero data - BSS segment) at all - this is undefined, initiali- 4332 as zero data - BSS segment) at all - this is undefined, initiali-
4332 zation is performed later (when relocating to RAM). 4333 zation is performed later (when relocating to RAM).
4333 4334
4334 * Stack space is very limited. Avoid big data buffers or things like 4335 * Stack space is very limited. Avoid big data buffers or things like
4335 that. 4336 that.
4336 4337
4337 Having only the stack as writable memory limits means we cannot use 4338 Having only the stack as writable memory limits means we cannot use
4338 normal global data to share information beween the code. But it 4339 normal global data to share information beween the code. But it
4339 turned out that the implementation of U-Boot can be greatly 4340 turned out that the implementation of U-Boot can be greatly
4340 simplified by making a global data structure (gd_t) available to all 4341 simplified by making a global data structure (gd_t) available to all
4341 functions. We could pass a pointer to this data as argument to _all_ 4342 functions. We could pass a pointer to this data as argument to _all_
4342 functions, but this would bloat the code. Instead we use a feature of 4343 functions, but this would bloat the code. Instead we use a feature of
4343 the GCC compiler (Global Register Variables) to share the data: we 4344 the GCC compiler (Global Register Variables) to share the data: we
4344 place a pointer (gd) to the global data into a register which we 4345 place a pointer (gd) to the global data into a register which we
4345 reserve for this purpose. 4346 reserve for this purpose.
4346 4347
4347 When choosing a register for such a purpose we are restricted by the 4348 When choosing a register for such a purpose we are restricted by the
4348 relevant (E)ABI specifications for the current architecture, and by 4349 relevant (E)ABI specifications for the current architecture, and by
4349 GCC's implementation. 4350 GCC's implementation.
4350 4351
4351 For PowerPC, the following registers have specific use: 4352 For PowerPC, the following registers have specific use:
4352 R1: stack pointer 4353 R1: stack pointer
4353 R2: reserved for system use 4354 R2: reserved for system use
4354 R3-R4: parameter passing and return values 4355 R3-R4: parameter passing and return values
4355 R5-R10: parameter passing 4356 R5-R10: parameter passing
4356 R13: small data area pointer 4357 R13: small data area pointer
4357 R30: GOT pointer 4358 R30: GOT pointer
4358 R31: frame pointer 4359 R31: frame pointer
4359 4360
4360 (U-Boot also uses R12 as internal GOT pointer. r12 4361 (U-Boot also uses R12 as internal GOT pointer. r12
4361 is a volatile register so r12 needs to be reset when 4362 is a volatile register so r12 needs to be reset when
4362 going back and forth between asm and C) 4363 going back and forth between asm and C)
4363 4364
4364 ==> U-Boot will use R2 to hold a pointer to the global data 4365 ==> U-Boot will use R2 to hold a pointer to the global data
4365 4366
4366 Note: on PPC, we could use a static initializer (since the 4367 Note: on PPC, we could use a static initializer (since the
4367 address of the global data structure is known at compile time), 4368 address of the global data structure is known at compile time),
4368 but it turned out that reserving a register results in somewhat 4369 but it turned out that reserving a register results in somewhat
4369 smaller code - although the code savings are not that big (on 4370 smaller code - although the code savings are not that big (on
4370 average for all boards 752 bytes for the whole U-Boot image, 4371 average for all boards 752 bytes for the whole U-Boot image,
4371 624 text + 127 data). 4372 624 text + 127 data).
4372 4373
4373 On Blackfin, the normal C ABI (except for P3) is followed as documented here: 4374 On Blackfin, the normal C ABI (except for P3) is followed as documented here:
4374 http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface 4375 http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface
4375 4376
4376 ==> U-Boot will use P3 to hold a pointer to the global data 4377 ==> U-Boot will use P3 to hold a pointer to the global data
4377 4378
4378 On ARM, the following registers are used: 4379 On ARM, the following registers are used:
4379 4380
4380 R0: function argument word/integer result 4381 R0: function argument word/integer result
4381 R1-R3: function argument word 4382 R1-R3: function argument word
4382 R9: GOT pointer 4383 R9: GOT pointer
4383 R10: stack limit (used only if stack checking if enabled) 4384 R10: stack limit (used only if stack checking if enabled)
4384 R11: argument (frame) pointer 4385 R11: argument (frame) pointer
4385 R12: temporary workspace 4386 R12: temporary workspace
4386 R13: stack pointer 4387 R13: stack pointer
4387 R14: link register 4388 R14: link register
4388 R15: program counter 4389 R15: program counter
4389 4390
4390 ==> U-Boot will use R8 to hold a pointer to the global data 4391 ==> U-Boot will use R8 to hold a pointer to the global data
4391 4392
4392 On Nios II, the ABI is documented here: 4393 On Nios II, the ABI is documented here:
4393 http://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf 4394 http://www.altera.com/literature/hb/nios2/n2cpu_nii51016.pdf
4394 4395
4395 ==> U-Boot will use gp to hold a pointer to the global data 4396 ==> U-Boot will use gp to hold a pointer to the global data
4396 4397
4397 Note: on Nios II, we give "-G0" option to gcc and don't use gp 4398 Note: on Nios II, we give "-G0" option to gcc and don't use gp
4398 to access small data sections, so gp is free. 4399 to access small data sections, so gp is free.
4399 4400
4400 NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope, 4401 NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
4401 or current versions of GCC may "optimize" the code too much. 4402 or current versions of GCC may "optimize" the code too much.
4402 4403
4403 Memory Management: 4404 Memory Management:
4404 ------------------ 4405 ------------------
4405 4406
4406 U-Boot runs in system state and uses physical addresses, i.e. the 4407 U-Boot runs in system state and uses physical addresses, i.e. the
4407 MMU is not used either for address mapping nor for memory protection. 4408 MMU is not used either for address mapping nor for memory protection.
4408 4409
4409 The available memory is mapped to fixed addresses using the memory 4410 The available memory is mapped to fixed addresses using the memory
4410 controller. In this process, a contiguous block is formed for each 4411 controller. In this process, a contiguous block is formed for each
4411 memory type (Flash, SDRAM, SRAM), even when it consists of several 4412 memory type (Flash, SDRAM, SRAM), even when it consists of several
4412 physical memory banks. 4413 physical memory banks.
4413 4414
4414 U-Boot is installed in the first 128 kB of the first Flash bank (on 4415 U-Boot is installed in the first 128 kB of the first Flash bank (on
4415 TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After 4416 TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
4416 booting and sizing and initializing DRAM, the code relocates itself 4417 booting and sizing and initializing DRAM, the code relocates itself
4417 to the upper end of DRAM. Immediately below the U-Boot code some 4418 to the upper end of DRAM. Immediately below the U-Boot code some
4418 memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN 4419 memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN
4419 configuration setting]. Below that, a structure with global Board 4420 configuration setting]. Below that, a structure with global Board
4420 Info data is placed, followed by the stack (growing downward). 4421 Info data is placed, followed by the stack (growing downward).
4421 4422
4422 Additionally, some exception handler code is copied to the low 8 kB 4423 Additionally, some exception handler code is copied to the low 8 kB
4423 of DRAM (0x00000000 ... 0x00001FFF). 4424 of DRAM (0x00000000 ... 0x00001FFF).
4424 4425
4425 So a typical memory configuration with 16 MB of DRAM could look like 4426 So a typical memory configuration with 16 MB of DRAM could look like
4426 this: 4427 this:
4427 4428
4428 0x0000 0000 Exception Vector code 4429 0x0000 0000 Exception Vector code
4429 : 4430 :
4430 0x0000 1FFF 4431 0x0000 1FFF
4431 0x0000 2000 Free for Application Use 4432 0x0000 2000 Free for Application Use
4432 : 4433 :
4433 : 4434 :
4434 4435
4435 : 4436 :
4436 : 4437 :
4437 0x00FB FF20 Monitor Stack (Growing downward) 4438 0x00FB FF20 Monitor Stack (Growing downward)
4438 0x00FB FFAC Board Info Data and permanent copy of global data 4439 0x00FB FFAC Board Info Data and permanent copy of global data
4439 0x00FC 0000 Malloc Arena 4440 0x00FC 0000 Malloc Arena
4440 : 4441 :
4441 0x00FD FFFF 4442 0x00FD FFFF
4442 0x00FE 0000 RAM Copy of Monitor Code 4443 0x00FE 0000 RAM Copy of Monitor Code
4443 ... eventually: LCD or video framebuffer 4444 ... eventually: LCD or video framebuffer
4444 ... eventually: pRAM (Protected RAM - unchanged by reset) 4445 ... eventually: pRAM (Protected RAM - unchanged by reset)
4445 0x00FF FFFF [End of RAM] 4446 0x00FF FFFF [End of RAM]
4446 4447
4447 4448
4448 System Initialization: 4449 System Initialization:
4449 ---------------------- 4450 ----------------------
4450 4451
4451 In the reset configuration, U-Boot starts at the reset entry point 4452 In the reset configuration, U-Boot starts at the reset entry point
4452 (on most PowerPC systems at address 0x00000100). Because of the reset 4453 (on most PowerPC systems at address 0x00000100). Because of the reset
4453 configuration for CS0# this is a mirror of the onboard Flash memory. 4454 configuration for CS0# this is a mirror of the onboard Flash memory.
4454 To be able to re-map memory U-Boot then jumps to its link address. 4455 To be able to re-map memory U-Boot then jumps to its link address.
4455 To be able to implement the initialization code in C, a (small!) 4456 To be able to implement the initialization code in C, a (small!)
4456 initial stack is set up in the internal Dual Ported RAM (in case CPUs 4457 initial stack is set up in the internal Dual Ported RAM (in case CPUs
4457 which provide such a feature like MPC8xx or MPC8260), or in a locked 4458 which provide such a feature like MPC8xx or MPC8260), or in a locked
4458 part of the data cache. After that, U-Boot initializes the CPU core, 4459 part of the data cache. After that, U-Boot initializes the CPU core,
4459 the caches and the SIU. 4460 the caches and the SIU.
4460 4461
4461 Next, all (potentially) available memory banks are mapped using a 4462 Next, all (potentially) available memory banks are mapped using a
4462 preliminary mapping. For example, we put them on 512 MB boundaries 4463 preliminary mapping. For example, we put them on 512 MB boundaries
4463 (multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash 4464 (multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
4464 on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is 4465 on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
4465 programmed for SDRAM access. Using the temporary configuration, a 4466 programmed for SDRAM access. Using the temporary configuration, a
4466 simple memory test is run that determines the size of the SDRAM 4467 simple memory test is run that determines the size of the SDRAM
4467 banks. 4468 banks.
4468 4469
4469 When there is more than one SDRAM bank, and the banks are of 4470 When there is more than one SDRAM bank, and the banks are of
4470 different size, the largest is mapped first. For equal size, the first 4471 different size, the largest is mapped first. For equal size, the first
4471 bank (CS2#) is mapped first. The first mapping is always for address 4472 bank (CS2#) is mapped first. The first mapping is always for address
4472 0x00000000, with any additional banks following immediately to create 4473 0x00000000, with any additional banks following immediately to create
4473 contiguous memory starting from 0. 4474 contiguous memory starting from 0.
4474 4475
4475 Then, the monitor installs itself at the upper end of the SDRAM area 4476 Then, the monitor installs itself at the upper end of the SDRAM area
4476 and allocates memory for use by malloc() and for the global Board 4477 and allocates memory for use by malloc() and for the global Board
4477 Info data; also, the exception vector code is copied to the low RAM 4478 Info data; also, the exception vector code is copied to the low RAM
4478 pages, and the final stack is set up. 4479 pages, and the final stack is set up.
4479 4480
4480 Only after this relocation will you have a "normal" C environment; 4481 Only after this relocation will you have a "normal" C environment;
4481 until that you are restricted in several ways, mostly because you are 4482 until that you are restricted in several ways, mostly because you are
4482 running from ROM, and because the code will have to be relocated to a 4483 running from ROM, and because the code will have to be relocated to a
4483 new address in RAM. 4484 new address in RAM.
4484 4485
4485 4486
4486 U-Boot Porting Guide: 4487 U-Boot Porting Guide:
4487 ---------------------- 4488 ----------------------
4488 4489
4489 [Based on messages by Jerry Van Baren in the U-Boot-Users mailing 4490 [Based on messages by Jerry Van Baren in the U-Boot-Users mailing
4490 list, October 2002] 4491 list, October 2002]
4491 4492
4492 4493
4493 int main(int argc, char *argv[]) 4494 int main(int argc, char *argv[])
4494 { 4495 {
4495 sighandler_t no_more_time; 4496 sighandler_t no_more_time;
4496 4497
4497 signal(SIGALRM, no_more_time); 4498 signal(SIGALRM, no_more_time);
4498 alarm(PROJECT_DEADLINE - toSec (3 * WEEK)); 4499 alarm(PROJECT_DEADLINE - toSec (3 * WEEK));
4499 4500
4500 if (available_money > available_manpower) { 4501 if (available_money > available_manpower) {
4501 Pay consultant to port U-Boot; 4502 Pay consultant to port U-Boot;
4502 return 0; 4503 return 0;
4503 } 4504 }
4504 4505
4505 Download latest U-Boot source; 4506 Download latest U-Boot source;
4506 4507
4507 Subscribe to u-boot mailing list; 4508 Subscribe to u-boot mailing list;
4508 4509
4509 if (clueless) 4510 if (clueless)
4510 email("Hi, I am new to U-Boot, how do I get started?"); 4511 email("Hi, I am new to U-Boot, how do I get started?");
4511 4512
4512 while (learning) { 4513 while (learning) {
4513 Read the README file in the top level directory; 4514 Read the README file in the top level directory;
4514 Read http://www.denx.de/twiki/bin/view/DULG/Manual; 4515 Read http://www.denx.de/twiki/bin/view/DULG/Manual;
4515 Read applicable doc/*.README; 4516 Read applicable doc/*.README;
4516 Read the source, Luke; 4517 Read the source, Luke;
4517 /* find . -name "*.[chS]" | xargs grep -i <keyword> */ 4518 /* find . -name "*.[chS]" | xargs grep -i <keyword> */
4518 } 4519 }
4519 4520
4520 if (available_money > toLocalCurrency ($2500)) 4521 if (available_money > toLocalCurrency ($2500))
4521 Buy a BDI3000; 4522 Buy a BDI3000;
4522 else 4523 else
4523 Add a lot of aggravation and time; 4524 Add a lot of aggravation and time;
4524 4525
4525 if (a similar board exists) { /* hopefully... */ 4526 if (a similar board exists) { /* hopefully... */
4526 cp -a board/<similar> board/<myboard> 4527 cp -a board/<similar> board/<myboard>
4527 cp include/configs/<similar>.h include/configs/<myboard>.h 4528 cp include/configs/<similar>.h include/configs/<myboard>.h
4528 } else { 4529 } else {
4529 Create your own board support subdirectory; 4530 Create your own board support subdirectory;
4530 Create your own board include/configs/<myboard>.h file; 4531 Create your own board include/configs/<myboard>.h file;
4531 } 4532 }
4532 Edit new board/<myboard> files 4533 Edit new board/<myboard> files
4533 Edit new include/configs/<myboard>.h 4534 Edit new include/configs/<myboard>.h
4534 4535
4535 while (!accepted) { 4536 while (!accepted) {
4536 while (!running) { 4537 while (!running) {
4537 do { 4538 do {
4538 Add / modify source code; 4539 Add / modify source code;
4539 } until (compiles); 4540 } until (compiles);
4540 Debug; 4541 Debug;
4541 if (clueless) 4542 if (clueless)
4542 email("Hi, I am having problems..."); 4543 email("Hi, I am having problems...");
4543 } 4544 }
4544 Send patch file to the U-Boot email list; 4545 Send patch file to the U-Boot email list;
4545 if (reasonable critiques) 4546 if (reasonable critiques)
4546 Incorporate improvements from email list code review; 4547 Incorporate improvements from email list code review;
4547 else 4548 else
4548 Defend code as written; 4549 Defend code as written;
4549 } 4550 }
4550 4551
4551 return 0; 4552 return 0;
4552 } 4553 }
4553 4554
4554 void no_more_time (int sig) 4555 void no_more_time (int sig)
4555 { 4556 {
4556 hire_a_guru(); 4557 hire_a_guru();
4557 } 4558 }
4558 4559
4559 4560
4560 Coding Standards: 4561 Coding Standards:
4561 ----------------- 4562 -----------------
4562 4563
4563 All contributions to U-Boot should conform to the Linux kernel 4564 All contributions to U-Boot should conform to the Linux kernel
4564 coding style; see the file "Documentation/CodingStyle" and the script 4565 coding style; see the file "Documentation/CodingStyle" and the script
4565 "scripts/Lindent" in your Linux kernel source directory. 4566 "scripts/Lindent" in your Linux kernel source directory.
4566 4567
4567 Source files originating from a different project (for example the 4568 Source files originating from a different project (for example the
4568 MTD subsystem) are generally exempt from these guidelines and are not 4569 MTD subsystem) are generally exempt from these guidelines and are not
4569 reformated to ease subsequent migration to newer versions of those 4570 reformated to ease subsequent migration to newer versions of those
4570 sources. 4571 sources.
4571 4572
4572 Please note that U-Boot is implemented in C (and to some small parts in 4573 Please note that U-Boot is implemented in C (and to some small parts in
4573 Assembler); no C++ is used, so please do not use C++ style comments (//) 4574 Assembler); no C++ is used, so please do not use C++ style comments (//)
4574 in your code. 4575 in your code.
4575 4576
4576 Please also stick to the following formatting rules: 4577 Please also stick to the following formatting rules:
4577 - remove any trailing white space 4578 - remove any trailing white space
4578 - use TAB characters for indentation and vertical alignment, not spaces 4579 - use TAB characters for indentation and vertical alignment, not spaces
4579 - make sure NOT to use DOS '\r\n' line feeds 4580 - make sure NOT to use DOS '\r\n' line feeds
4580 - do not add more than 2 consecutive empty lines to source files 4581 - do not add more than 2 consecutive empty lines to source files
4581 - do not add trailing empty lines to source files 4582 - do not add trailing empty lines to source files
4582 4583
4583 Submissions which do not conform to the standards may be returned 4584 Submissions which do not conform to the standards may be returned
4584 with a request to reformat the changes. 4585 with a request to reformat the changes.
4585 4586
4586 4587
4587 Submitting Patches: 4588 Submitting Patches:
4588 ------------------- 4589 -------------------
4589 4590
4590 Since the number of patches for U-Boot is growing, we need to 4591 Since the number of patches for U-Boot is growing, we need to
4591 establish some rules. Submissions which do not conform to these rules 4592 establish some rules. Submissions which do not conform to these rules
4592 may be rejected, even when they contain important and valuable stuff. 4593 may be rejected, even when they contain important and valuable stuff.
4593 4594
4594 Please see http://www.denx.de/wiki/U-Boot/Patches for details. 4595 Please see http://www.denx.de/wiki/U-Boot/Patches for details.
4595 4596
4596 Patches shall be sent to the u-boot mailing list <u-boot@lists.denx.de>; 4597 Patches shall be sent to the u-boot mailing list <u-boot@lists.denx.de>;
4597 see http://lists.denx.de/mailman/listinfo/u-boot 4598 see http://lists.denx.de/mailman/listinfo/u-boot
4598 4599
4599 When you send a patch, please include the following information with 4600 When you send a patch, please include the following information with
4600 it: 4601 it:
4601 4602
4602 * For bug fixes: a description of the bug and how your patch fixes 4603 * For bug fixes: a description of the bug and how your patch fixes
4603 this bug. Please try to include a way of demonstrating that the 4604 this bug. Please try to include a way of demonstrating that the
4604 patch actually fixes something. 4605 patch actually fixes something.
4605 4606
4606 * For new features: a description of the feature and your 4607 * For new features: a description of the feature and your
4607 implementation. 4608 implementation.
4608 4609
4609 * A CHANGELOG entry as plaintext (separate from the patch) 4610 * A CHANGELOG entry as plaintext (separate from the patch)
4610 4611
4611 * For major contributions, your entry to the CREDITS file 4612 * For major contributions, your entry to the CREDITS file
4612 4613
4613 * When you add support for a new board, don't forget to add this 4614 * When you add support for a new board, don't forget to add this
4614 board to the MAINTAINERS file, too. 4615 board to the MAINTAINERS file, too.
4615 4616
4616 * If your patch adds new configuration options, don't forget to 4617 * If your patch adds new configuration options, don't forget to
4617 document these in the README file. 4618 document these in the README file.
4618 4619
4619 * The patch itself. If you are using git (which is *strongly* 4620 * The patch itself. If you are using git (which is *strongly*
4620 recommended) you can easily generate the patch using the 4621 recommended) you can easily generate the patch using the
4621 "git format-patch". If you then use "git send-email" to send it to 4622 "git format-patch". If you then use "git send-email" to send it to
4622 the U-Boot mailing list, you will avoid most of the common problems 4623 the U-Boot mailing list, you will avoid most of the common problems
4623 with some other mail clients. 4624 with some other mail clients.
4624 4625
4625 If you cannot use git, use "diff -purN OLD NEW". If your version of 4626 If you cannot use git, use "diff -purN OLD NEW". If your version of
4626 diff does not support these options, then get the latest version of 4627 diff does not support these options, then get the latest version of
4627 GNU diff. 4628 GNU diff.
4628 4629
4629 The current directory when running this command shall be the parent 4630 The current directory when running this command shall be the parent
4630 directory of the U-Boot source tree (i. e. please make sure that 4631 directory of the U-Boot source tree (i. e. please make sure that
4631 your patch includes sufficient directory information for the 4632 your patch includes sufficient directory information for the
4632 affected files). 4633 affected files).
4633 4634
4634 We prefer patches as plain text. MIME attachments are discouraged, 4635 We prefer patches as plain text. MIME attachments are discouraged,
4635 and compressed attachments must not be used. 4636 and compressed attachments must not be used.
4636 4637
4637 * If one logical set of modifications affects or creates several 4638 * If one logical set of modifications affects or creates several
4638 files, all these changes shall be submitted in a SINGLE patch file. 4639 files, all these changes shall be submitted in a SINGLE patch file.
4639 4640
4640 * Changesets that contain different, unrelated modifications shall be 4641 * Changesets that contain different, unrelated modifications shall be
4641 submitted as SEPARATE patches, one patch per changeset. 4642 submitted as SEPARATE patches, one patch per changeset.
4642 4643
4643 4644
4644 Notes: 4645 Notes:
4645 4646
4646 * Before sending the patch, run the MAKEALL script on your patched 4647 * Before sending the patch, run the MAKEALL script on your patched
4647 source tree and make sure that no errors or warnings are reported 4648 source tree and make sure that no errors or warnings are reported
4648 for any of the boards. 4649 for any of the boards.
4649 4650
4650 * Keep your modifications to the necessary minimum: A patch 4651 * Keep your modifications to the necessary minimum: A patch
4651 containing several unrelated changes or arbitrary reformats will be 4652 containing several unrelated changes or arbitrary reformats will be
4652 returned with a request to re-formatting / split it. 4653 returned with a request to re-formatting / split it.
4653 4654
4654 * If you modify existing code, make sure that your new code does not 4655 * If you modify existing code, make sure that your new code does not
4655 add to the memory footprint of the code ;-) Small is beautiful! 4656 add to the memory footprint of the code ;-) Small is beautiful!
4656 When adding new features, these should compile conditionally only 4657 When adding new features, these should compile conditionally only
4657 (using #ifdef), and the resulting code with the new feature 4658 (using #ifdef), and the resulting code with the new feature
4658 disabled must not need more memory than the old code without your 4659 disabled must not need more memory than the old code without your
4659 modification. 4660 modification.
4660 4661
4661 * Remember that there is a size limit of 100 kB per message on the 4662 * Remember that there is a size limit of 100 kB per message on the
4662 u-boot mailing list. Bigger patches will be moderated. If they are 4663 u-boot mailing list. Bigger patches will be moderated. If they are
4663 reasonable and not too big, they will be acknowledged. But patches 4664 reasonable and not too big, they will be acknowledged. But patches
4664 bigger than the size limit should be avoided. 4665 bigger than the size limit should be avoided.
4665 4666
arch/mips/cpu/xburst/Makefile
Diff comments   View file @ d8fffa0
File was created 1 #
2 # Copyright (C) 2011 Xiangfu Liu <xiangfu@openmobilefree.net>
3 #
4 # See file CREDITS for list of people who contributed to this
5 # project.
6 #
7 # This program is free software; you can redistribute it and/or
8 # modify it under the terms of the GNU General Public License as
9 # published by the Free Software Foundation; either version 2 of
10 # the License, or (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License
18 # along with this program; if not, write to the Free Software
19 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 # MA 02111-1307 USA
21 #
22
23 include $(TOPDIR)/config.mk
24
25 LIB = $(obj)lib$(CPU).o
26
27 START = start.o
28 SOBJS-y =
29 COBJS-y = cpu.o timer.o jz_serial.o
30
31 COBJS-$(CONFIG_JZ4740) += jz4740.o
32
33 SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
34 OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
35 START := $(addprefix $(obj),$(START))
36
37 all: $(obj).depend $(START) $(LIB)
38
39 $(LIB): $(OBJS)
40 $(call cmd_link_o_target, $(OBJS))
41
42 #########################################################################
43
44 # defines $(obj).depend target
45 include $(SRCTREE)/rules.mk
46
47 sinclude $(obj).depend
48
49 #########################################################################
50
arch/mips/cpu/xburst/config.mk
Diff comments   View file @ d8fffa0
File was created 1 #
2 # Copyright (C) 2011 Xiangfu Liu <xiangfu@openmobilefree.net>
3 #
4 # See file CREDITS for list of people who contributed to this
5 # project.
6 #
7 # This program is free software; you can redistribute it and/or
8 # modify it under the terms of the GNU General Public License as
9 # published by the Free Software Foundation; either version 2 of
10 # the License, or (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License
18 # along with this program; if not, write to the Free Software
19 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 # MA 02111-1307 USA
21 #
22
23 PLATFORM_CPPFLAGS += -march=mips32 -EL
24 PLATFORM_LDFLAGS += -EL
25
arch/mips/cpu/xburst/cpu.c
Diff comments   View file @ d8fffa0
File was created 1 /*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
4 * (C) Copyright 2011
5 * Xiangfu Liu <xiangfu@openmobilefree.net>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26 #include <common.h>
27 #include <command.h>
28 #include <netdev.h>
29 #include <asm/mipsregs.h>
30 #include <asm/cacheops.h>
31 #include <asm/reboot.h>
32 #include <asm/io.h>
33 #include <asm/jz4740.h>
34
35 #define cache_op(op, addr) \
36 __asm__ __volatile__( \
37 ".set push\n" \
38 ".set noreorder\n" \
39 ".set mips3\n" \
40 "cache %0, %1\n" \
41 ".set pop\n" \
42 : \
43 : "i" (op), "R" (*(unsigned char *)(addr)))
44
45 void __attribute__((weak)) _machine_restart(void)
46 {
47 struct jz4740_wdt *wdt = (struct jz4740_wdt *)JZ4740_WDT_BASE;
48 struct jz4740_tcu *tcu = (struct jz4740_tcu *)JZ4740_TCU_BASE;
49 u16 tmp;
50
51 /* wdt_select_extalclk() */
52 tmp = readw(&wdt->tcsr);
53 tmp &= ~(WDT_TCSR_EXT_EN | WDT_TCSR_RTC_EN | WDT_TCSR_PCK_EN);
54 tmp |= WDT_TCSR_EXT_EN;
55 writew(tmp, &wdt->tcsr);
56
57 /* wdt_select_clk_div64() */
58 tmp = readw(&wdt->tcsr);
59 tmp &= ~WDT_TCSR_PRESCALE_MASK;
60 tmp |= WDT_TCSR_PRESCALE64,
61 writew(tmp, &wdt->tcsr);
62
63 writew(100, &wdt->tdr); /* wdt_set_data(100) */
64 writew(0, &wdt->tcnt); /* wdt_set_count(0); */
65 writew(TCU_TSSR_WDTSC, &tcu->tscr); /* tcu_start_wdt_clock */
66 writeb(readb(&wdt->tcer) | WDT_TCER_TCEN, &wdt->tcer); /* wdt start */
67
68 while (1)
69 ;
70 }
71
72 int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
73 {
74 _machine_restart();
75
76 fprintf(stderr, "*** reset failed ***\n");
77 return 0;
78 }
79
80 void flush_cache(ulong start_addr, ulong size)
81 {
82 unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE;
83 unsigned long addr = start_addr & ~(lsize - 1);
84 unsigned long aend = (start_addr + size - 1) & ~(lsize - 1);
85
86 for (; addr <= aend; addr += lsize) {
87 cache_op(Hit_Writeback_Inv_D, addr);
88 cache_op(Hit_Invalidate_I, addr);
89 }
90 }
91
92 void flush_dcache_range(ulong start_addr, ulong stop)
93 {
94 unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE;
95 unsigned long addr = start_addr & ~(lsize - 1);
96 unsigned long aend = (stop - 1) & ~(lsize - 1);
97
98 for (; addr <= aend; addr += lsize)
99 cache_op(Hit_Writeback_Inv_D, addr);
100 }
101
102 void invalidate_dcache_range(ulong start_addr, ulong stop)
103 {
104 unsigned long lsize = CONFIG_SYS_CACHELINE_SIZE;
105 unsigned long addr = start_addr & ~(lsize - 1);
106 unsigned long aend = (stop - 1) & ~(lsize - 1);
107
108 for (; addr <= aend; addr += lsize)
109 cache_op(Hit_Invalidate_D, addr);
110 }
111
112 void flush_icache_all(void)
113 {
114 u32 addr, t = 0;
115
116 __asm__ __volatile__("mtc0 $0, $28"); /* Clear Taglo */
117 __asm__ __volatile__("mtc0 $0, $29"); /* Clear TagHi */
118
119 for (addr = CKSEG0; addr < CKSEG0 + CONFIG_SYS_ICACHE_SIZE;
120 addr += CONFIG_SYS_CACHELINE_SIZE) {
121 cache_op(Index_Store_Tag_I, addr);
122 }
123
124 /* invalidate btb */
125 __asm__ __volatile__(
126 ".set mips32\n\t"
127 "mfc0 %0, $16, 7\n\t"
128 "nop\n\t"
129 "ori %0,2\n\t"
130 "mtc0 %0, $16, 7\n\t"
131 ".set mips2\n\t"
132 :
133 : "r" (t));
134 }
135
136 void flush_dcache_all(void)
137 {
138 u32 addr;
139
140 for (addr = CKSEG0; addr < CKSEG0 + CONFIG_SYS_DCACHE_SIZE;
141 addr += CONFIG_SYS_CACHELINE_SIZE) {
142 cache_op(Index_Writeback_Inv_D, addr);
143 }
144
145 __asm__ __volatile__("sync");
146 }
147
148 void flush_cache_all(void)
149 {
150 flush_dcache_all();
151 flush_icache_all();
152 }
153
arch/mips/cpu/xburst/jz4740.c
Diff comments   View file @ d8fffa0
File was created 1 /*
2 * Jz4740 common routines
3 * Copyright (c) 2006 Ingenic Semiconductor, <jlwei@ingenic.cn>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20
21 #include <config.h>
22 #include <common.h>
23 #include <asm/io.h>
24 #include <asm/jz4740.h>
25
26 void enable_interrupts(void)
27 {
28 }
29
30 int disable_interrupts(void)
31 {
32 return 0;
33 }
34
35 /*
36 * PLL output clock = EXTAL * NF / (NR * NO)
37 * NF = FD + 2, NR = RD + 2
38 * NO = 1 (if OD = 0), NO = 2 (if OD = 1 or 2), NO = 4 (if OD = 3)
39 */
40 void pll_init(void)
41 {
42 struct jz4740_cpm *cpm = (struct jz4740_cpm *)JZ4740_CPM_BASE;
43
44 register unsigned int cfcr, plcr1;
45 int n2FR[33] = {
46 0, 0, 1, 2, 3, 0, 4, 0, 5, 0, 0, 0, 6, 0, 0, 0,
47 7, 0, 0, 0, 0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0,
48 9
49 };
50 int div[5] = {1, 3, 3, 3, 3}; /* divisors of I:S:P:L:M */
51 int nf, pllout2;
52
53 cfcr = CPM_CPCCR_CLKOEN |
54 CPM_CPCCR_PCS |
55 (n2FR[div[0]] << CPM_CPCCR_CDIV_BIT) |
56 (n2FR[div[1]] << CPM_CPCCR_HDIV_BIT) |
57 (n2FR[div[2]] << CPM_CPCCR_PDIV_BIT) |
58 (n2FR[div[3]] << CPM_CPCCR_MDIV_BIT) |
59 (n2FR[div[4]] << CPM_CPCCR_LDIV_BIT);
60
61 pllout2 = (cfcr & CPM_CPCCR_PCS) ?
62 CONFIG_SYS_CPU_SPEED : (CONFIG_SYS_CPU_SPEED / 2);
63
64 /* Init USB Host clock, pllout2 must be n*48MHz */
65 writel(pllout2 / 48000000 - 1, &cpm->uhccdr);
66
67 nf = CONFIG_SYS_CPU_SPEED * 2 / CONFIG_SYS_EXTAL;
68 plcr1 = ((nf - 2) << CPM_CPPCR_PLLM_BIT) | /* FD */
69 (0 << CPM_CPPCR_PLLN_BIT) | /* RD=0, NR=2 */
70 (0 << CPM_CPPCR_PLLOD_BIT) | /* OD=0, NO=1 */
71 (0x20 << CPM_CPPCR_PLLST_BIT) | /* PLL stable time */
72 CPM_CPPCR_PLLEN; /* enable PLL */
73
74 /* init PLL */
75 writel(cfcr, &cpm->cpccr);
76 writel(plcr1, &cpm->cppcr);
77 }
78
79 void sdram_init(void)
80 {
81 struct jz4740_emc *emc = (struct jz4740_emc *)JZ4740_EMC_BASE;
82
83 register unsigned int dmcr0, dmcr, sdmode, tmp, cpu_clk, mem_clk, ns;
84
85 unsigned int cas_latency_sdmr[2] = {
86 EMC_SDMR_CAS_2,
87 EMC_SDMR_CAS_3,
88 };
89
90 unsigned int cas_latency_dmcr[2] = {
91 1 << EMC_DMCR_TCL_BIT, /* CAS latency is 2 */
92 2 << EMC_DMCR_TCL_BIT /* CAS latency is 3 */
93 };
94
95 int div[] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
96
97 cpu_clk = CONFIG_SYS_CPU_SPEED;
98 mem_clk = cpu_clk * div[__cpm_get_cdiv()] / div[__cpm_get_mdiv()];
99
100 writel(0, &emc->bcr); /* Disable bus release */
101 writew(0, &emc->rtcsr); /* Disable clock for counting */
102
103 /* Fault DMCR value for mode register setting*/
104 #define SDRAM_ROW0 11
105 #define SDRAM_COL0 8
106 #define SDRAM_BANK40 0
107
108 dmcr0 = ((SDRAM_ROW0 - 11) << EMC_DMCR_RA_BIT) |
109 ((SDRAM_COL0 - 8) << EMC_DMCR_CA_BIT) |
110 (SDRAM_BANK40 << EMC_DMCR_BA_BIT) |
111 (SDRAM_BW16 << EMC_DMCR_BW_BIT) |
112 EMC_DMCR_EPIN |
113 cas_latency_dmcr[((SDRAM_CASL == 3) ? 1 : 0)];
114
115 /* Basic DMCR value */
116 dmcr = ((SDRAM_ROW - 11) << EMC_DMCR_RA_BIT) |
117 ((SDRAM_COL - 8) << EMC_DMCR_CA_BIT) |
118 (SDRAM_BANK4 << EMC_DMCR_BA_BIT) |
119 (SDRAM_BW16 << EMC_DMCR_BW_BIT) |
120 EMC_DMCR_EPIN |
121 cas_latency_dmcr[((SDRAM_CASL == 3) ? 1 : 0)];
122
123 /* SDRAM timimg */
124 ns = 1000000000 / mem_clk;
125 tmp = SDRAM_TRAS / ns;
126 if (tmp < 4)
127 tmp = 4;
128 if (tmp > 11)
129 tmp = 11;
130 dmcr |= (tmp - 4) << EMC_DMCR_TRAS_BIT;
131 tmp = SDRAM_RCD / ns;
132
133 if (tmp > 3)
134 tmp = 3;
135 dmcr |= tmp << EMC_DMCR_RCD_BIT;
136 tmp = SDRAM_TPC / ns;
137
138 if (tmp > 7)
139 tmp = 7;
140 dmcr |= tmp << EMC_DMCR_TPC_BIT;
141 tmp = SDRAM_TRWL / ns;
142
143 if (tmp > 3)
144 tmp = 3;
145 dmcr |= tmp << EMC_DMCR_TRWL_BIT;
146 tmp = (SDRAM_TRAS + SDRAM_TPC) / ns;
147
148 if (tmp > 14)
149 tmp = 14;
150 dmcr |= ((tmp + 1) >> 1) << EMC_DMCR_TRC_BIT;
151
152 /* SDRAM mode value */
153 sdmode = EMC_SDMR_BT_SEQ |
154 EMC_SDMR_OM_NORMAL |
155 EMC_SDMR_BL_4 |
156 cas_latency_sdmr[((SDRAM_CASL == 3) ? 1 : 0)];
157
158 /* Stage 1. Precharge all banks by writing SDMR with DMCR.MRSET=0 */
159 writel(dmcr, &emc->dmcr);
160 writeb(0, JZ4740_EMC_SDMR0 | sdmode);
161
162 /* Wait for precharge, > 200us */
163 tmp = (cpu_clk / 1000000) * 1000;
164 while (tmp--)
165 ;
166
167 /* Stage 2. Enable auto-refresh */
168 writel(dmcr | EMC_DMCR_RFSH, &emc->dmcr);
169
170 tmp = SDRAM_TREF / ns;
171 tmp = tmp / 64 + 1;
172 if (tmp > 0xff)
173 tmp = 0xff;
174 writew(tmp, &emc->rtcor);
175 writew(0, &emc->rtcnt);
176 /* Divisor is 64, CKO/64 */
177 writew(EMC_RTCSR_CKS_64, &emc->rtcsr);
178
179 /* Wait for number of auto-refresh cycles */
180 tmp = (cpu_clk / 1000000) * 1000;
181 while (tmp--)
182 ;
183
184 /* Stage 3. Mode Register Set */
185 writel(dmcr0 | EMC_DMCR_RFSH | EMC_DMCR_MRSET, &emc->dmcr);
186 writeb(0, JZ4740_EMC_SDMR0 | sdmode);
187
188 /* Set back to basic DMCR value */
189 writel(dmcr | EMC_DMCR_RFSH | EMC_DMCR_MRSET, &emc->dmcr);
190
191 /* everything is ok now */
192 }
193
194 DECLARE_GLOBAL_DATA_PTR;
195
196 void calc_clocks(void)
197 {
198 unsigned int pllout;
199 unsigned int div[10] = {1, 2, 3, 4, 6, 8, 12, 16, 24, 32};
200
201 pllout = __cpm_get_pllout();
202
203 gd->cpu_clk = pllout / div[__cpm_get_cdiv()];
204 gd->sys_clk = pllout / div[__cpm_get_hdiv()];
205 gd->per_clk = pllout / div[__cpm_get_pdiv()];
206 gd->mem_clk = pllout / div[__cpm_get_mdiv()];
207 gd->dev_clk = CONFIG_SYS_EXTAL;
208 }
209
210 void rtc_init(void)
211 {
212 struct jz4740_rtc *rtc = (struct jz4740_rtc *)JZ4740_RTC_BASE;
213
214 while (!(readl(&rtc->rcr) & RTC_RCR_WRDY))
215 ;
216 writel(readl(&rtc->rcr) | RTC_RCR_AE, &rtc->rcr); /* enable alarm */
217
218 while (!(readl(&rtc->rcr) & RTC_RCR_WRDY))
219 ;
220 writel(0x00007fff, &rtc->rgr); /* type value */
221
222 while (!(readl(&rtc->rcr) & RTC_RCR_WRDY))
223 ;
224 writel(0x0000ffe0, &rtc->hwfcr); /* Power on delay 2s */
225
226 while (!(readl(&rtc->rcr) & RTC_RCR_WRDY))
227 ;
228 writel(0x00000fe0, &rtc->hrcr); /* reset delay 125ms */
229 }
230
231 /* U-Boot common routines */
232 phys_size_t initdram(int board_type)
233 {
234 struct jz4740_emc *emc = (struct jz4740_emc *)JZ4740_EMC_BASE;
235 u32 dmcr;
236 u32 rows, cols, dw, banks;
237 ulong size;
238
239 dmcr = readl(&emc->dmcr);
240 rows = 11 + ((dmcr & EMC_DMCR_RA_MASK) >> EMC_DMCR_RA_BIT);
241 cols = 8 + ((dmcr & EMC_DMCR_CA_MASK) >> EMC_DMCR_CA_BIT);
242 dw = (dmcr & EMC_DMCR_BW) ? 2 : 4;
243 banks = (dmcr & EMC_DMCR_BA) ? 4 : 2;
244
245 size = (1 << (rows + cols)) * dw * banks;
246
247 return size;
248 }
249
arch/mips/cpu/xburst/jz_serial.c
Diff comments   View file @ d8fffa0
File was created 1 /*
2 * Jz4740 UART support
3 * Copyright (c) 2011
4 * Qi Hardware, Xiangfu Liu <xiangfu@sharism.cc>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19 * MA 02111-1307 USA
20 */
21
22 #include <config.h>
23 #include <common.h>
24 #include <asm/io.h>
25 #include <asm/jz4740.h>
26
27 /*
28 * serial_init - initialize a channel
29 *
30 * This routine initializes the number of data bits, parity
31 * and set the selected baud rate. Interrupts are disabled.
32 * Set the modem control signals if the option is selected.
33 *
34 * RETURNS: N/A
35 */
36 struct jz4740_uart *uart = (struct jz4740_uart *)CONFIG_SYS_UART_BASE;
37
38 int serial_init(void)
39 {
40 /* Disable port interrupts while changing hardware */
41 writeb(0, &uart->dlhr_ier);
42
43 /* Disable UART unit function */
44 writeb(~UART_FCR_UUE, &uart->iir_fcr);
45
46 /* Set both receiver and transmitter in UART mode (not SIR) */
47 writeb(~(SIRCR_RSIRE | SIRCR_TSIRE), &uart->isr);
48
49 /*
50 * Set databits, stopbits and parity.
51 * (8-bit data, 1 stopbit, no parity)
52 */
53 writeb(UART_LCR_WLEN_8 | UART_LCR_STOP_1, &uart->lcr);
54
55 /* Set baud rate */
56 serial_setbrg();
57
58 /* Enable UART unit, enable and clear FIFO */
59 writeb(UART_FCR_UUE | UART_FCR_FE | UART_FCR_TFLS | UART_FCR_RFLS,
60 &uart->iir_fcr);
61
62 return 0;
63 }
64
65 void serial_setbrg(void)
66 {
67 u32 baud_div, tmp;
68
69 baud_div = CONFIG_SYS_EXTAL / 16 / CONFIG_BAUDRATE;
70
71 tmp = readb(&uart->lcr);
72 tmp |= UART_LCR_DLAB;
73 writeb(tmp, &uart->lcr);
74
75 writeb((baud_div >> 8) & 0xff, &uart->dlhr_ier);
76 writeb(baud_div & 0xff, &uart->rbr_thr_dllr);
77
78 tmp &= ~UART_LCR_DLAB;
79 writeb(tmp, &uart->lcr);
80 }
81
82 int serial_tstc(void)
83 {
84 if (readb(&uart->lsr) & UART_LSR_DR)
85 return 1;
86
87 return 0;
88 }
89
90 void serial_putc(const char c)
91 {
92 if (c == '\n')
93 serial_putc('\r');
94
95 /* Wait for fifo to shift out some bytes */
96 while (!((readb(&uart->lsr) & (UART_LSR_TDRQ | UART_LSR_TEMT)) == 0x60))
97 ;
98
99 writeb((u8)c, &uart->rbr_thr_dllr);
100 }
101
102 int serial_getc(void)
103 {
104 while (!serial_tstc())
105 ;
106
107 return readb(&uart->rbr_thr_dllr);
108 }
109
110 void serial_puts(const char *s)
111 {
112 while (*s)
113 serial_putc(*s++);
114 }
115
arch/mips/cpu/xburst/start.S
Diff comments   View file @ d8fffa0
File was created 1 /*
2 * Startup Code for MIPS32 XBURST CPU-core
3 *
4 * Copyright (c) 2010 Xiangfu Liu <xiangfu@sharism.cc>
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25 #include <config.h>
26 #include <version.h>
27 #include <asm/regdef.h>
28 #include <asm/mipsregs.h>
29 #include <asm/addrspace.h>
30 #include <asm/cacheops.h>
31
32 .set noreorder
33
34 .globl _start
35 .text
36 _start:
37 /* Initialize $gp */
38 bal 1f
39 nop
40 .word _gp
41 1:
42 lw gp, 0(ra)
43
44 /* Set up temporary stack */
45 li sp, CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_INIT_SP_OFFSET
46
47 la t9, board_init_f
48 jr t9
49 nop
50
51 /*
52 * void relocate_code (addr_sp, gd, addr_moni)
53 *
54 * This "function" does not return, instead it continues in RAM
55 * after relocating the monitor code.
56 *
57 * a0 = addr_sp
58 * a1 = gd
59 * a2 = destination address
60 */
61 .globl relocate_code
62 .ent relocate_code
63 relocate_code:
64 move sp, a0 # set new stack pointer
65
66 li t0, CONFIG_SYS_MONITOR_BASE
67 la t3, in_ram
68 lw t2, -12(t3) # t2 <-- uboot_end_data
69 move t1, a2
70
71 /*
72 * Fix $gp:
73 *
74 * New $gp = (Old $gp - CONFIG_SYS_MONITOR_BASE) + Destination Address
75 */
76 move t6, gp
77 sub gp, CONFIG_SYS_MONITOR_BASE
78 add gp, a2 # gp now adjusted
79 sub t6, gp, t6 # t6 <-- relocation offset
80
81 /*
82 * t0 = source address
83 * t1 = target address
84 * t2 = source end address
85 */
86 1:
87 lw t3, 0(t0)
88 sw t3, 0(t1)
89 addu t0, 4
90 ble t0, t2, 1b
91 addu t1, 4
92
93 /* If caches were enabled, we would have to flush them here. */
94
95 /* flush d-cache */
96 li t0, KSEG0
97 addi t1, t0, CONFIG_SYS_DCACHE_SIZE
98 2:
99 cache Index_Writeback_Inv_D, 0(t0)
100 bne t0, t1, 2b
101 addi t0, CONFIG_SYS_CACHELINE_SIZE
102
103 sync
104
105 /* flush i-cache */
106 li t0, KSEG0
107 addi t1, t0, CONFIG_SYS_ICACHE_SIZE
108 3:
109 cache Index_Invalidate_I, 0(t0)
110 bne t0, t1, 3b
111 addi t0, CONFIG_SYS_CACHELINE_SIZE
112
113 /* Invalidate BTB */
114 mfc0 t0, CP0_CONFIG, 7
115 nop
116 ori t0, 2
117 mtc0 t0, CP0_CONFIG, 7
118 nop
119
120 /* Jump to where we've relocated ourselves */
121 addi t0, a2, in_ram - _start
122 jr t0
123 nop
124
125 .word _gp
126 .word _GLOBAL_OFFSET_TABLE_
127 .word uboot_end_data
128 .word uboot_end
129 .word num_got_entries
130
131 in_ram:
132 /*
133 * Now we want to update GOT.
134 *
135 * GOT[0] is reserved. GOT[1] is also reserved for the dynamic object
136 * generated by GNU ld. Skip these reserved entries from relocation.
137 */
138 lw t3, -4(t0) # t3 <-- num_got_entries
139 lw t4, -16(t0) # t4 <-- _GLOBAL_OFFSET_TABLE_
140 lw t5, -20(t0) # t5 <-- _gp
141 sub t4, t5 # compute offset
142 add t4, t4, gp # t4 now holds relocated _G_O_T_
143 addi t4, t4, 8 # skipping first two entries
144 li t2, 2
145 1:
146 lw t1, 0(t4)
147 beqz t1, 2f
148 add t1, t6
149 sw t1, 0(t4)
150 2:
151 addi t2, 1
152 blt t2, t3, 1b
153 addi t4, 4
154
155 /* Clear BSS */
156 lw t1, -12(t0) # t1 <-- uboot_end_data
157 lw t2, -8(t0) # t2 <-- uboot_end
158 add t1, t6 # adjust pointers
159 add t2, t6
160
161 sub t1, 4
162 1: addi t1, 4
163 bltl t1, t2, 1b
164 sw zero, 0(t1)
165
166 move a0, a1 # a0 <-- gd
167 la t9, board_init_r
168 jr t9
169 move a1, a2
170
171 .end relocate_code
172
arch/mips/cpu/xburst/timer.c
Diff comments   View file @ d8fffa0
File was created 1 /*
2 * Copyright (c) 2006
3 * Ingenic Semiconductor, <jlwei@ingenic.cn>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20
21 #include <config.h>
22 #include <common.h>
23 #include <asm/io.h>
24
25 #include <asm/jz4740.h>
26
27 #define TIMER_CHAN 0
28 #define TIMER_FDATA 0xffff /* Timer full data value */
29
30 DECLARE_GLOBAL_DATA_PTR;
31
32 static struct jz4740_tcu *tcu = (struct jz4740_tcu *)JZ4740_TCU_BASE;
33
34 void reset_timer_masked(void)
35 {
36 /* reset time */
37 gd->lastinc = readw(&tcu->tcnt0);
38 gd->tbl = 0;
39 }
40
41 ulong get_timer_masked(void)
42 {
43 ulong now = readw(&tcu->tcnt0);
44
45 if (gd->lastinc <= now)
46 gd->tbl += now - gd->lastinc; /* normal mode */
47 else {
48 /* we have an overflow ... */
49 gd->tbl += TIMER_FDATA + now - gd->lastinc;
50 }
51
52 gd->lastinc = now;
53
54 return gd->tbl;
55 }
56
57 void udelay_masked(unsigned long usec)
58 {
59 ulong tmo;
60 ulong endtime;
61 signed long diff;
62
63 /* normalize */
64 if (usec >= 1000) {
65 tmo = usec / 1000;
66 tmo *= CONFIG_SYS_HZ;
67 tmo /= 1000;
68 } else {
69 if (usec > 1) {
70 tmo = usec * CONFIG_SYS_HZ;
71 tmo /= 1000*1000;
72 } else
73 tmo = 1;
74 }
75
76 endtime = get_timer_masked() + tmo;
77
78 do {
79 ulong now = get_timer_masked();
80 diff = endtime - now;
81 } while (diff >= 0);
82 }
83
84 int timer_init(void)
85 {
86 writew(TCU_TCSR_PRESCALE256 | TCU_TCSR_EXT_EN, &tcu->tcsr0);
87
88 writew(0, &tcu->tcnt0);
89 writew(0, &tcu->tdhr0);
90 writew(TIMER_FDATA, &tcu->tdfr0);
91
92 /* mask irqs */
93 writel((1 << TIMER_CHAN) | (1 << (TIMER_CHAN + 16)), &tcu->tmsr);
94 writel(1 << TIMER_CHAN, &tcu->tscr); /* enable timer clock */
95 writeb(1 << TIMER_CHAN, &tcu->tesr); /* start counting up */
96
97 gd->lastinc = 0;
98 gd->tbl = 0;
99
100 return 0;
101 }
102
103 void reset_timer(void)
104 {
105 reset_timer_masked();
106 }
107
108 ulong get_timer(ulong base)
109 {
110 return get_timer_masked() - base;
111 }
112
113 void set_timer(ulong t)
114 {
115 gd->tbl = t;
116 }
117
118 void __udelay(unsigned long usec)
119 {
120 ulong tmo, tmp;
121
122 /* normalize */
123 if (usec >= 1000) {
124 tmo = usec / 1000;
125 tmo *= CONFIG_SYS_HZ;
126 tmo /= 1000;
127 } else {
128 if (usec >= 1) {
129 tmo = usec * CONFIG_SYS_HZ;
130 tmo /= 1000 * 1000;
131 } else
132 tmo = 1;
133 }
134
135 /* check for rollover during this delay */
136 tmp = get_timer(0);
137 if ((tmp + tmo) < tmp)
138 reset_timer_masked(); /* timer would roll over */
139 else
140 tmo += tmp;
141
142 while (get_timer_masked() < tmo)
143 ;
144 }
145
146 /*
147 * This function is derived from PowerPC code (read timebase as long long).
148 * On MIPS it just returns the timer value.
149 */
150 unsigned long long get_ticks(void)
151 {
152 return get_timer(0);
153 }
154
155 /*
156 * This function is derived from PowerPC code (timebase clock frequency).
157 * On MIPS it returns the number of timer ticks per second.
158 */
159 ulong get_tbclk(void)
160 {
161 return CONFIG_SYS_HZ;
162 }
163
arch/mips/include/asm/global_data.h
Diff comments   View file @ d8fffa0
1 /* 1 /*
2 * (C) Copyright 2002-2010 2 * (C) Copyright 2002-2010
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 * 4 *
5 * See file CREDITS for list of people who contributed to this 5 * See file CREDITS for list of people who contributed to this
6 * project. 6 * project.
7 * 7 *
8 * This program is free software; you can redistribute it and/or 8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as 9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of 10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version. 11 * the License, or (at your option) any later version.
12 * 12 *
13 * This program is distributed in the hope that it will be useful, 13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 * 17 *
18 * You should have received a copy of the GNU General Public License 18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software 19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA 21 * MA 02111-1307 USA
22 */ 22 */
23 23
24 #ifndef __ASM_GBL_DATA_H 24 #ifndef __ASM_GBL_DATA_H
25 #define __ASM_GBL_DATA_H 25 #define __ASM_GBL_DATA_H
26 26
27 #include <asm/regdef.h> 27 #include <asm/regdef.h>
28 28
29 /* 29 /*
30 * The following data structure is placed in some memory wich is 30 * The following data structure is placed in some memory wich is
31 * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or 31 * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or
32 * some locked parts of the data cache) to allow for a minimum set of 32 * some locked parts of the data cache) to allow for a minimum set of
33 * global variables during system initialization (until we have set 33 * global variables during system initialization (until we have set
34 * up the memory controller so that we can use RAM). 34 * up the memory controller so that we can use RAM).
35 * 35 *
36 * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t) 36 * Keep it *SMALL* and remember to set GENERATED_GBL_DATA_SIZE > sizeof(gd_t)
37 */ 37 */
38 38
39 typedef struct global_data { 39 typedef struct global_data {
40 bd_t *bd; 40 bd_t *bd;
41 unsigned long flags; 41 unsigned long flags;
42 #ifdef CONFIG_JZSOC
43 /* There are other clocks in the jz4740 */
44 unsigned long cpu_clk; /* CPU core clock */
45 unsigned long sys_clk; /* System bus clock */
46 unsigned long per_clk; /* Peripheral bus clock */
47 unsigned long mem_clk; /* Memory bus clock */
48 unsigned long dev_clk; /* Device clock */
49 /* "static data" needed by most of timer.c */
50 unsigned long tbl;
51 unsigned long lastinc;
52 #endif
42 unsigned long baudrate; 53 unsigned long baudrate;
43 unsigned long have_console; /* serial_init() was called */ 54 unsigned long have_console; /* serial_init() was called */
44 #ifdef CONFIG_PRE_CONSOLE_BUFFER 55 #ifdef CONFIG_PRE_CONSOLE_BUFFER
45 unsigned long precon_buf_idx; /* Pre-Console buffer index */ 56 unsigned long precon_buf_idx; /* Pre-Console buffer index */
46 #endif 57 #endif
47 phys_size_t ram_size; /* RAM size */ 58 phys_size_t ram_size; /* RAM size */
48 unsigned long reloc_off; /* Relocation Offset */ 59 unsigned long reloc_off; /* Relocation Offset */
49 unsigned long env_addr; /* Address of Environment struct */ 60 unsigned long env_addr; /* Address of Environment struct */
50 unsigned long env_valid; /* Checksum of Environment valid? */ 61 unsigned long env_valid; /* Checksum of Environment valid? */
51 void **jt; /* jump table */ 62 void **jt; /* jump table */
52 char env_buf[32]; /* buffer for getenv() before reloc. */ 63 char env_buf[32]; /* buffer for getenv() before reloc. */
53 } gd_t; 64 } gd_t;
54 65
55 /* 66 /*
56 * Global Data Flags 67 * Global Data Flags
57 */ 68 */
58 #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ 69 #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */
59 #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ 70 #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */
60 #define GD_FLG_SILENT 0x00004 /* Silent mode */ 71 #define GD_FLG_SILENT 0x00004 /* Silent mode */
61 #define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ 72 #define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */
62 #define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */ 73 #define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */
63 #define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */ 74 #define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
64 #define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */ 75 #define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
65 #define GD_FLG_ENV_READY 0x00080 /* Environment imported into hash table */ 76 #define GD_FLG_ENV_READY 0x00080 /* Environment imported into hash table */
66 77
67 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("k0") 78 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("k0")
68 79
69 #endif /* __ASM_GBL_DATA_H */ 80 #endif /* __ASM_GBL_DATA_H */
70 81
arch/mips/include/asm/jz4740.h
Diff comments   View file @ d8fffa0
File was created 1 /*
2 * head file for Ingenic Semiconductor's JZ4740 CPU.
3 */
4 #ifndef __JZ4740_H__
5 #define __JZ4740_H__
6
7 #include <asm/addrspace.h>
8 #include <asm/cacheops.h>
9
10 /* Boot ROM Specification */
11 /* NOR Boot config */
12 #define JZ4740_NORBOOT_8BIT 0x00000000 /* 8-bit data bus flash */
13 #define JZ4740_NORBOOT_16BIT 0x10101010 /* 16-bit data bus flash */
14 #define JZ4740_NORBOOT_32BIT 0x20202020 /* 32-bit data bus flash */
15 /* NAND Boot config */
16 #define JZ4740_NANDBOOT_B8R3 0xffffffff /* 8-bit bus & 3 row cycles */
17 #define JZ4740_NANDBOOT_B8R2 0xf0f0f0f0 /* 8-bit bus & 2 row cycles */
18 #define JZ4740_NANDBOOT_B16R3 0x0f0f0f0f /* 16-bit bus & 3 row cycles */
19 #define JZ4740_NANDBOOT_B16R2 0x00000000 /* 16-bit bus & 2 row cycles */
20
21 /* 1st-level interrupts */
22 #define JZ4740_IRQ_I2C 1
23 #define JZ4740_IRQ_UHC 3
24 #define JZ4740_IRQ_UART0 9
25 #define JZ4740_IRQ_SADC 12
26 #define JZ4740_IRQ_MSC 14
27 #define JZ4740_IRQ_RTC 15
28 #define JZ4740_IRQ_SSI 16
29 #define JZ4740_IRQ_CIM 17
30 #define JZ4740_IRQ_AIC 18
31 #define JZ4740_IRQ_ETH 19
32 #define JZ4740_IRQ_DMAC 20
33 #define JZ4740_IRQ_TCU2 21
34 #define JZ4740_IRQ_TCU1 22
35 #define JZ4740_IRQ_TCU0 23
36 #define JZ4740_IRQ_UDC 24
37 #define JZ4740_IRQ_GPIO3 25
38 #define JZ4740_IRQ_GPIO2 26
39 #define JZ4740_IRQ_GPIO1 27
40 #define JZ4740_IRQ_GPIO0 28
41 #define JZ4740_IRQ_IPU 29
42 #define JZ4740_IRQ_LCD 30
43 /* 2nd-level interrupts */
44 #define JZ4740_IRQ_DMA_0 32 /* 32 to 37 for DMAC channel 0 to 5 */
45 #define JZ4740_IRQ_GPIO_0 48 /* 48 to 175 for GPIO pin 0 to 127 */
46
47 /* Register Definitions */
48 #define JZ4740_CPM_BASE 0x10000000
49 #define JZ4740_INTC_BASE 0x10001000
50 #define JZ4740_TCU_BASE 0x10002000
51 #define JZ4740_WDT_BASE 0x10002000
52 #define JZ4740_RTC_BASE 0x10003000
53 #define JZ4740_GPIO_BASE 0x10010000
54 #define JZ4740_AIC_BASE 0x10020000
55 #define JZ4740_ICDC_BASE 0x10020000
56 #define JZ4740_MSC_BASE 0x10021000
57 #define JZ4740_UART0_BASE 0x10030000
58 #define JZ4740_I2C_BASE 0x10042000
59 #define JZ4740_SSI_BASE 0x10043000
60 #define JZ4740_SADC_BASE 0x10070000
61 #define JZ4740_EMC_BASE 0x13010000
62 #define JZ4740_DMAC_BASE 0x13020000
63 #define JZ4740_UHC_BASE 0x13030000
64 #define JZ4740_UDC_BASE 0x13040000
65 #define JZ4740_LCD_BASE 0x13050000
66 #define JZ4740_SLCD_BASE 0x13050000
67 #define JZ4740_CIM_BASE 0x13060000
68 #define JZ4740_ETH_BASE 0x13100000
69
70 /* 8bit Mode Register of SDRAM bank 0 */
71 #define JZ4740_EMC_SDMR0 (JZ4740_EMC_BASE + 0xa000)
72
73 /* GPIO (General-Purpose I/O Ports) */
74 /* = 0,1,2,3 */
75 #define GPIO_PXPIN(n) \
76 (JZ4740_GPIO_BASE + (0x00 + (n)*0x100)) /* PIN Level Register */
77 #define GPIO_PXDAT(n) \
78 (JZ4740_GPIO_BASE + (0x10 + (n)*0x100)) /* Port Data Register */
79 #define GPIO_PXDATS(n) \
80 (JZ4740_GPIO_BASE + (0x14 + (n)*0x100)) /* Port Data Set Register */
81 #define GPIO_PXDATC(n) \
82 (JZ4740_GPIO_BASE + (0x18 + (n)*0x100)) /* Port Data Clear Register */
83 #define GPIO_PXIM(n) \
84 (JZ4740_GPIO_BASE + (0x20 + (n)*0x100)) /* Interrupt Mask Register */
85 #define GPIO_PXIMS(n) \
86 (JZ4740_GPIO_BASE + (0x24 + (n)*0x100)) /* Interrupt Mask Set Reg */
87 #define GPIO_PXIMC(n) \
88 (JZ4740_GPIO_BASE + (0x28 + (n)*0x100)) /* Interrupt Mask Clear Reg */
89 #define GPIO_PXPE(n) \
90 (JZ4740_GPIO_BASE + (0x30 + (n)*0x100)) /* Pull Enable Register */
91 #define GPIO_PXPES(n) \
92 (JZ4740_GPIO_BASE + (0x34 + (n)*0x100)) /* Pull Enable Set Reg. */
93 #define GPIO_PXPEC(n) \
94 (JZ4740_GPIO_BASE + (0x38 + (n)*0x100)) /* Pull Enable Clear Reg. */
95 #define GPIO_PXFUN(n) \
96 (JZ4740_GPIO_BASE + (0x40 + (n)*0x100)) /* Function Register */
97 #define GPIO_PXFUNS(n) \
98 (JZ4740_GPIO_BASE + (0x44 + (n)*0x100)) /* Function Set Register */
99 #define GPIO_PXFUNC(n) \
100 (JZ4740_GPIO_BASE + (0x48 + (n)*0x100)) /* Function Clear Register */
101 #define GPIO_PXSEL(n) \
102 (JZ4740_GPIO_BASE + (0x50 + (n)*0x100)) /* Select Register */
103 #define GPIO_PXSELS(n) \
104 (JZ4740_GPIO_BASE + (0x54 + (n)*0x100)) /* Select Set Register */
105 #define GPIO_PXSELC(n) \
106 (JZ4740_GPIO_BASE + (0x58 + (n)*0x100)) /* Select Clear Register */
107 #define GPIO_PXDIR(n) \
108 (JZ4740_GPIO_BASE + (0x60 + (n)*0x100)) /* Direction Register */
109 #define GPIO_PXDIRS(n) \
110 (JZ4740_GPIO_BASE + (0x64 + (n)*0x100)) /* Direction Set Register */
111 #define GPIO_PXDIRC(n) \
112 (JZ4740_GPIO_BASE + (0x68 + (n)*0x100)) /* Direction Clear Register */
113 #define GPIO_PXTRG(n) \
114 (JZ4740_GPIO_BASE + (0x70 + (n)*0x100)) /* Trigger Register */
115 #define GPIO_PXTRGS(n) \
116 (JZ4740_GPIO_BASE + (0x74 + (n)*0x100)) /* Trigger Set Register */
117 #define GPIO_PXTRGC(n) \
118 (JZ4740_GPIO_BASE + (0x78 + (n)*0x100)) /* Trigger Set Register */
119
120 /* Static Memory Control Register */
121 #define EMC_SMCR_STRV_BIT 24
122 #define EMC_SMCR_STRV_MASK (0x0f << EMC_SMCR_STRV_BIT)
123 #define EMC_SMCR_TAW_BIT 20
124 #define EMC_SMCR_TAW_MASK (0x0f << EMC_SMCR_TAW_BIT)
125 #define EMC_SMCR_TBP_BIT 16
126 #define EMC_SMCR_TBP_MASK (0x0f << EMC_SMCR_TBP_BIT)
127 #define EMC_SMCR_TAH_BIT 12
128 #define EMC_SMCR_TAH_MASK (0x07 << EMC_SMCR_TAH_BIT)
129 #define EMC_SMCR_TAS_BIT 8
130 #define EMC_SMCR_TAS_MASK (0x07 << EMC_SMCR_TAS_BIT)
131 #define EMC_SMCR_BW_BIT 6
132 #define EMC_SMCR_BW_MASK (0x03 << EMC_SMCR_BW_BIT)
133 #define EMC_SMCR_BW_8BIT (0 << EMC_SMCR_BW_BIT)
134 #define EMC_SMCR_BW_16BIT (1 << EMC_SMCR_BW_BIT)
135 #define EMC_SMCR_BW_32BIT (2 << EMC_SMCR_BW_BIT)
136 #define EMC_SMCR_BCM (1 << 3)
137 #define EMC_SMCR_BL_BIT 1
138 #define EMC_SMCR_BL_MASK (0x03 << EMC_SMCR_BL_BIT)
139 #define EMC_SMCR_BL_4 (0 << EMC_SMCR_BL_BIT)
140 #define EMC_SMCR_BL_8 (1 << EMC_SMCR_BL_BIT)
141 #define EMC_SMCR_BL_16 (2 << EMC_SMCR_BL_BIT)
142 #define EMC_SMCR_BL_32 (3 << EMC_SMCR_BL_BIT)
143 #define EMC_SMCR_SMT (1 << 0)
144
145 /* Static Memory Bank Addr Config Reg */
146 #define EMC_SACR_BASE_BIT 8
147 #define EMC_SACR_BASE_MASK (0xff << EMC_SACR_BASE_BIT)
148 #define EMC_SACR_MASK_BIT 0
149 #define EMC_SACR_MASK_MASK (0xff << EMC_SACR_MASK_BIT)
150
151 /* NAND Flash Control/Status Register */
152 #define EMC_NFCSR_NFCE4 (1 << 7) /* NAND Flash Enable */
153 #define EMC_NFCSR_NFE4 (1 << 6) /* NAND Flash FCE# Assertion Enable */
154 #define EMC_NFCSR_NFCE3 (1 << 5)
155 #define EMC_NFCSR_NFE3 (1 << 4)
156 #define EMC_NFCSR_NFCE2 (1 << 3)
157 #define EMC_NFCSR_NFE2 (1 << 2)
158 #define EMC_NFCSR_NFCE1 (1 << 1)
159 #define EMC_NFCSR_NFE1 (1 << 0)
160
161 /* NAND Flash ECC Control Register */
162 #define EMC_NFECR_PRDY (1 << 4) /* Parity Ready */
163 #define EMC_NFECR_RS_DECODING (0 << 3) /* RS is in decoding phase */
164 #define EMC_NFECR_RS_ENCODING (1 << 3) /* RS is in encoding phase */
165 #define EMC_NFECR_HAMMING (0 << 2) /* Use HAMMING Correction Algorithm */
166 #define EMC_NFECR_RS (1 << 2) /* Select RS Correction Algorithm */
167 #define EMC_NFECR_ERST (1 << 1) /* ECC Reset */
168 #define EMC_NFECR_ECCE (1 << 0) /* ECC Enable */
169
170 /* NAND Flash ECC Data Register */
171 #define EMC_NFECC_ECC2_BIT 16
172 #define EMC_NFECC_ECC2_MASK (0xff << EMC_NFECC_ECC2_BIT)
173 #define EMC_NFECC_ECC1_BIT 8
174 #define EMC_NFECC_ECC1_MASK (0xff << EMC_NFECC_ECC1_BIT)
175 #define EMC_NFECC_ECC0_BIT 0
176 #define EMC_NFECC_ECC0_MASK (0xff << EMC_NFECC_ECC0_BIT)
177
178 /* NAND Flash Interrupt Status Register */
179 #define EMC_NFINTS_ERRCNT_BIT 29 /* Error Count */
180 #define EMC_NFINTS_ERRCNT_MASK (0x7 << EMC_NFINTS_ERRCNT_BIT)
181 #define EMC_NFINTS_PADF (1 << 4) /* Padding Finished */
182 #define EMC_NFINTS_DECF (1 << 3) /* Decoding Finished */
183 #define EMC_NFINTS_ENCF (1 << 2) /* Encoding Finished */
184 #define EMC_NFINTS_UNCOR (1 << 1) /* Uncorrectable Error Occurred */
185 #define EMC_NFINTS_ERR (1 << 0) /* Error Occurred */
186
187 /* NAND Flash Interrupt Enable Register */
188 #define EMC_NFINTE_PADFE (1 << 4) /* Padding Finished Interrupt */
189 #define EMC_NFINTE_DECFE (1 << 3) /* Decoding Finished Interrupt */
190 #define EMC_NFINTE_ENCFE (1 << 2) /* Encoding Finished Interrupt */
191 #define EMC_NFINTE_UNCORE (1 << 1) /* Uncorrectable Error Occurred Intr */
192 #define EMC_NFINTE_ERRE (1 << 0) /* Error Occurred Interrupt */
193
194 /* NAND Flash RS Error Report Register */
195 #define EMC_NFERR_INDEX_BIT 16 /* Error Symbol Index */
196 #define EMC_NFERR_INDEX_MASK (0x1ff << EMC_NFERR_INDEX_BIT)
197 #define EMC_NFERR_MASK_BIT 0 /* Error Symbol Value */
198 #define EMC_NFERR_MASK_MASK (0x1ff << EMC_NFERR_MASK_BIT)
199
200 /* DRAM Control Register */
201 #define EMC_DMCR_BW_BIT 31
202 #define EMC_DMCR_BW (1 << EMC_DMCR_BW_BIT)
203 #define EMC_DMCR_CA_BIT 26
204 #define EMC_DMCR_CA_MASK (0x07 << EMC_DMCR_CA_BIT)
205 #define EMC_DMCR_CA_8 (0 << EMC_DMCR_CA_BIT)
206 #define EMC_DMCR_CA_9 (1 << EMC_DMCR_CA_BIT)
207 #define EMC_DMCR_CA_10 (2 << EMC_DMCR_CA_BIT)
208 #define EMC_DMCR_CA_11 (3 << EMC_DMCR_CA_BIT)
209 #define EMC_DMCR_CA_12 (4 << EMC_DMCR_CA_BIT)
210 #define EMC_DMCR_RMODE (1 << 25)
211 #define EMC_DMCR_RFSH (1 << 24)
212 #define EMC_DMCR_MRSET (1 << 23)
213 #define EMC_DMCR_RA_BIT 20
214 #define EMC_DMCR_RA_MASK (0x03 << EMC_DMCR_RA_BIT)
215 #define EMC_DMCR_RA_11 (0 << EMC_DMCR_RA_BIT)
216 #define EMC_DMCR_RA_12 (1 << EMC_DMCR_RA_BIT)
217 #define EMC_DMCR_RA_13 (2 << EMC_DMCR_RA_BIT)
218 #define EMC_DMCR_BA_BIT 19
219 #define EMC_DMCR_BA (1 << EMC_DMCR_BA_BIT)
220 #define EMC_DMCR_PDM (1 << 18)
221 #define EMC_DMCR_EPIN (1 << 17)
222 #define EMC_DMCR_TRAS_BIT 13
223 #define EMC_DMCR_TRAS_MASK (0x07 << EMC_DMCR_TRAS_BIT)
224 #define EMC_DMCR_RCD_BIT 11
225 #define EMC_DMCR_RCD_MASK (0x03 << EMC_DMCR_RCD_BIT)
226 #define EMC_DMCR_TPC_BIT 8
227 #define EMC_DMCR_TPC_MASK (0x07 << EMC_DMCR_TPC_BIT)
228 #define EMC_DMCR_TRWL_BIT 5
229 #define EMC_DMCR_TRWL_MASK (0x03 << EMC_DMCR_TRWL_BIT)
230 #define EMC_DMCR_TRC_BIT 2
231 #define EMC_DMCR_TRC_MASK (0x07 << EMC_DMCR_TRC_BIT)
232 #define EMC_DMCR_TCL_BIT 0
233 #define EMC_DMCR_TCL_MASK (0x03 << EMC_DMCR_TCL_BIT)
234
235 /* Refresh Time Control/Status Register */
236 #define EMC_RTCSR_CMF (1 << 7)
237 #define EMC_RTCSR_CKS_BIT 0
238 #define EMC_RTCSR_CKS_MASK (0x07 << EMC_RTCSR_CKS_BIT)
239 #define EMC_RTCSR_CKS_DISABLE (0 << EMC_RTCSR_CKS_BIT)
240 #define EMC_RTCSR_CKS_4 (1 << EMC_RTCSR_CKS_BIT)
241 #define EMC_RTCSR_CKS_16 (2 << EMC_RTCSR_CKS_BIT)
242 #define EMC_RTCSR_CKS_64 (3 << EMC_RTCSR_CKS_BIT)
243 #define EMC_RTCSR_CKS_256 (4 << EMC_RTCSR_CKS_BIT)
244 #define EMC_RTCSR_CKS_1024 (5 << EMC_RTCSR_CKS_BIT)
245 #define EMC_RTCSR_CKS_2048 (6 << EMC_RTCSR_CKS_BIT)
246 #define EMC_RTCSR_CKS_4096 (7 << EMC_RTCSR_CKS_BIT)
247
248 /* SDRAM Bank Address Configuration Register */
249 #define EMC_DMAR_BASE_BIT 8
250 #define EMC_DMAR_BASE_MASK (0xff << EMC_DMAR_BASE_BIT)
251 #define EMC_DMAR_MASK_BIT 0
252 #define EMC_DMAR_MASK_MASK (0xff << EMC_DMAR_MASK_BIT)
253
254 /* Mode Register of SDRAM bank 0 */
255 #define EMC_SDMR_BM (1 << 9) /* Write Burst Mode */
256 #define EMC_SDMR_OM_BIT 7 /* Operating Mode */
257 #define EMC_SDMR_OM_MASK (3 << EMC_SDMR_OM_BIT)
258 #define EMC_SDMR_OM_NORMAL (0 << EMC_SDMR_OM_BIT)
259 #define EMC_SDMR_CAS_BIT 4 /* CAS Latency */
260 #define EMC_SDMR_CAS_MASK (7 << EMC_SDMR_CAS_BIT)
261 #define EMC_SDMR_CAS_1 (1 << EMC_SDMR_CAS_BIT)
262 #define EMC_SDMR_CAS_2 (2 << EMC_SDMR_CAS_BIT)
263 #define EMC_SDMR_CAS_3 (3 << EMC_SDMR_CAS_BIT)
264 #define EMC_SDMR_BT_BIT 3 /* Burst Type */
265 #define EMC_SDMR_BT_MASK (1 << EMC_SDMR_BT_BIT)
266 #define EMC_SDMR_BT_SEQ (0 << EMC_SDMR_BT_BIT) /* Sequential */
267 #define EMC_SDMR_BT_INT (1 << EMC_SDMR_BT_BIT) /* Interleave */
268 #define EMC_SDMR_BL_BIT 0 /* Burst Length */
269 #define EMC_SDMR_BL_MASK (7 << EMC_SDMR_BL_BIT)
270 #define EMC_SDMR_BL_1 (0 << EMC_SDMR_BL_BIT)
271 #define EMC_SDMR_BL_2 (1 << EMC_SDMR_BL_BIT)
272 #define EMC_SDMR_BL_4 (2 << EMC_SDMR_BL_BIT)
273 #define EMC_SDMR_BL_8 (3 << EMC_SDMR_BL_BIT)
274
275 #define EMC_SDMR_CAS2_16BIT \
276 (EMC_SDMR_CAS_2 | EMC_SDMR_BT_SEQ | EMC_SDMR_BL_2)
277 #define EMC_SDMR_CAS2_32BIT \
278 (EMC_SDMR_CAS_2 | EMC_SDMR_BT_SEQ | EMC_SDMR_BL_4)
279 #define EMC_SDMR_CAS3_16BIT \
280 (EMC_SDMR_CAS_3 | EMC_SDMR_BT_SEQ | EMC_SDMR_BL_2)
281 #define EMC_SDMR_CAS3_32BIT \
282 (EMC_SDMR_CAS_3 | EMC_SDMR_BT_SEQ | EMC_SDMR_BL_4)
283
284 /* RTC Control Register */
285 #define RTC_RCR_WRDY (1 << 7) /* Write Ready Flag */
286 #define RTC_RCR_HZ (1 << 6) /* 1Hz Flag */
287 #define RTC_RCR_HZIE (1 << 5) /* 1Hz Interrupt Enable */
288 #define RTC_RCR_AF (1 << 4) /* Alarm Flag */
289 #define RTC_RCR_AIE (1 << 3) /* Alarm Interrupt Enable */
290 #define RTC_RCR_AE (1 << 2) /* Alarm Enable */
291 #define RTC_RCR_RTCE (1 << 0) /* RTC Enable */
292
293 /* RTC Regulator Register */
294 #define RTC_RGR_LOCK (1 << 31) /* Lock Bit */
295 #define RTC_RGR_ADJC_BIT 16
296 #define RTC_RGR_ADJC_MASK (0x3ff << RTC_RGR_ADJC_BIT)
297 #define RTC_RGR_NC1HZ_BIT 0
298 #define RTC_RGR_NC1HZ_MASK (0xffff << RTC_RGR_NC1HZ_BIT)
299
300 /* Hibernate Control Register */
301 #define RTC_HCR_PD (1 << 0) /* Power Down */
302
303 /* Hibernate Wakeup Filter Counter Register */
304 #define RTC_HWFCR_BIT 5
305 #define RTC_HWFCR_MASK (0x7ff << RTC_HWFCR_BIT)
306
307 /* Hibernate Reset Counter Register */
308 #define RTC_HRCR_BIT 5
309 #define RTC_HRCR_MASK (0x7f << RTC_HRCR_BIT)
310
311 /* Hibernate Wakeup Control Register */
312 #define RTC_HWCR_EALM (1 << 0) /* RTC alarm wakeup enable */
313
314 /* Hibernate Wakeup Status Register */
315 #define RTC_HWRSR_HR (1 << 5) /* Hibernate reset */
316 #define RTC_HWRSR_PPR (1 << 4) /* PPR reset */
317 #define RTC_HWRSR_PIN (1 << 1) /* Wakeup pin status bit */
318 #define RTC_HWRSR_ALM (1 << 0) /* RTC alarm status bit */
319
320 /* Clock Control Register */
321 #define CPM_CPCCR_I2CS (1 << 31)
322 #define CPM_CPCCR_CLKOEN (1 << 30)
323 #define CPM_CPCCR_UCS (1 << 29)
324 #define CPM_CPCCR_UDIV_BIT 23
325 #define CPM_CPCCR_UDIV_MASK (0x3f << CPM_CPCCR_UDIV_BIT)
326 #define CPM_CPCCR_CE (1 << 22)
327 #define CPM_CPCCR_PCS (1 << 21)
328 #define CPM_CPCCR_LDIV_BIT 16
329 #define CPM_CPCCR_LDIV_MASK (0x1f << CPM_CPCCR_LDIV_BIT)
330 #define CPM_CPCCR_MDIV_BIT 12
331 #define CPM_CPCCR_MDIV_MASK (0x0f << CPM_CPCCR_MDIV_BIT)
332 #define CPM_CPCCR_PDIV_BIT 8
333 #define CPM_CPCCR_PDIV_MASK (0x0f << CPM_CPCCR_PDIV_BIT)
334 #define CPM_CPCCR_HDIV_BIT 4
335 #define CPM_CPCCR_HDIV_MASK (0x0f << CPM_CPCCR_HDIV_BIT)
336 #define CPM_CPCCR_CDIV_BIT 0
337 #define CPM_CPCCR_CDIV_MASK (0x0f << CPM_CPCCR_CDIV_BIT)
338
339 /* I2S Clock Divider Register */
340 #define CPM_I2SCDR_I2SDIV_BIT 0
341 #define CPM_I2SCDR_I2SDIV_MASK (0x1ff << CPM_I2SCDR_I2SDIV_BIT)
342
343 /* LCD Pixel Clock Divider Register */
344 #define CPM_LPCDR_PIXDIV_BIT 0
345 #define CPM_LPCDR_PIXDIV_MASK (0x1ff << CPM_LPCDR_PIXDIV_BIT)
346
347 /* MSC Clock Divider Register */
348 #define CPM_MSCCDR_MSCDIV_BIT 0
349 #define CPM_MSCCDR_MSCDIV_MASK (0x1f << CPM_MSCCDR_MSCDIV_BIT)
350
351 /* PLL Control Register */
352 #define CPM_CPPCR_PLLM_BIT 23
353 #define CPM_CPPCR_PLLM_MASK (0x1ff << CPM_CPPCR_PLLM_BIT)
354 #define CPM_CPPCR_PLLN_BIT 18
355 #define CPM_CPPCR_PLLN_MASK (0x1f << CPM_CPPCR_PLLN_BIT)
356 #define CPM_CPPCR_PLLOD_BIT 16
357 #define CPM_CPPCR_PLLOD_MASK (0x03 << CPM_CPPCR_PLLOD_BIT)
358 #define CPM_CPPCR_PLLS (1 << 10)
359 #define CPM_CPPCR_PLLBP (1 << 9)
360 #define CPM_CPPCR_PLLEN (1 << 8)
361 #define CPM_CPPCR_PLLST_BIT 0
362 #define CPM_CPPCR_PLLST_MASK (0xff << CPM_CPPCR_PLLST_BIT)
363
364 /* Low Power Control Register */
365 #define CPM_LCR_DOZE_DUTY_BIT 3
366 #define CPM_LCR_DOZE_DUTY_MASK (0x1f << CPM_LCR_DOZE_DUTY_BIT)
367 #define CPM_LCR_DOZE_ON (1 << 2)
368 #define CPM_LCR_LPM_BIT 0
369 #define CPM_LCR_LPM_MASK (0x3 << CPM_LCR_LPM_BIT)
370 #define CPM_LCR_LPM_IDLE (0x0 << CPM_LCR_LPM_BIT)
371 #define CPM_LCR_LPM_SLEEP (0x1 << CPM_LCR_LPM_BIT)
372
373 /* Clock Gate Register */
374 #define CPM_CLKGR_UART1 (1 << 15)
375 #define CPM_CLKGR_UHC (1 << 14)
376 #define CPM_CLKGR_IPU (1 << 13)
377 #define CPM_CLKGR_DMAC (1 << 12)
378 #define CPM_CLKGR_UDC (1 << 11)
379 #define CPM_CLKGR_LCD (1 << 10)
380 #define CPM_CLKGR_CIM (1 << 9)
381 #define CPM_CLKGR_SADC (1 << 8)
382 #define CPM_CLKGR_MSC (1 << 7)
383 #define CPM_CLKGR_AIC1 (1 << 6)
384 #define CPM_CLKGR_AIC2 (1 << 5)
385 #define CPM_CLKGR_SSI (1 << 4)
386 #define CPM_CLKGR_I2C (1 << 3)
387 #define CPM_CLKGR_RTC (1 << 2)
388 #define CPM_CLKGR_TCU (1 << 1)
389 #define CPM_CLKGR_UART0 (1 << 0)
390
391 /* Sleep Control Register */
392 #define CPM_SCR_O1ST_BIT 8
393 #define CPM_SCR_O1ST_MASK (0xff << CPM_SCR_O1ST_BIT)
394 #define CPM_SCR_UDCPHY_ENABLE (1 << 6)
395 #define CPM_SCR_USBPHY_DISABLE (1 << 7)
396 #define CPM_SCR_OSC_ENABLE (1 << 4)
397
398 /* Hibernate Control Register */
399 #define CPM_HCR_PD (1 << 0)
400
401 /* Wakeup Filter Counter Register in Hibernate Mode */
402 #define CPM_HWFCR_TIME_BIT 0
403 #define CPM_HWFCR_TIME_MASK (0x3ff << CPM_HWFCR_TIME_BIT)
404
405 /* Reset Counter Register in Hibernate Mode */
406 #define CPM_HRCR_TIME_BIT 0
407 #define CPM_HRCR_TIME_MASK (0x7f << CPM_HRCR_TIME_BIT)
408
409 /* Wakeup Control Register in Hibernate Mode */
410 #define CPM_HWCR_WLE_LOW (0 << 2)
411 #define CPM_HWCR_WLE_HIGH (1 << 2)
412 #define CPM_HWCR_PIN_WAKEUP (1 << 1)
413 #define CPM_HWCR_RTC_WAKEUP (1 << 0)
414
415 /* Wakeup Status Register in Hibernate Mode */
416 #define CPM_HWSR_WSR_PIN (1 << 1)
417 #define CPM_HWSR_WSR_RTC (1 << 0)
418
419 /* Reset Status Register */
420 #define CPM_RSR_HR (1 << 2)
421 #define CPM_RSR_WR (1 << 1)
422 #define CPM_RSR_PR (1 << 0)
423
424 /* Register definitions */
425 #define TCU_TCSR_PWM_SD (1 << 9)
426 #define TCU_TCSR_PWM_INITL_HIGH (1 << 8)
427 #define TCU_TCSR_PWM_EN (1 << 7)
428 #define TCU_TCSR_PRESCALE_BIT 3
429 #define TCU_TCSR_PRESCALE_MASK (0x7 << TCU_TCSR_PRESCALE_BIT)
430 #define TCU_TCSR_PRESCALE1 (0x0 << TCU_TCSR_PRESCALE_BIT)
431 #define TCU_TCSR_PRESCALE4 (0x1 << TCU_TCSR_PRESCALE_BIT)
432 #define TCU_TCSR_PRESCALE16 (0x2 << TCU_TCSR_PRESCALE_BIT)
433 #define TCU_TCSR_PRESCALE64 (0x3 << TCU_TCSR_PRESCALE_BIT)
434 #define TCU_TCSR_PRESCALE256 (0x4 << TCU_TCSR_PRESCALE_BIT)
435 #define TCU_TCSR_PRESCALE1024 (0x5 << TCU_TCSR_PRESCALE_BIT)
436 #define TCU_TCSR_EXT_EN (1 << 2)
437 #define TCU_TCSR_RTC_EN (1 << 1)
438 #define TCU_TCSR_PCK_EN (1 << 0)
439
440 #define TCU_TER_TCEN5 (1 << 5)
441 #define TCU_TER_TCEN4 (1 << 4)
442 #define TCU_TER_TCEN3 (1 << 3)
443 #define TCU_TER_TCEN2 (1 << 2)
444 #define TCU_TER_TCEN1 (1 << 1)
445 #define TCU_TER_TCEN0 (1 << 0)
446
447 #define TCU_TESR_TCST5 (1 << 5)
448 #define TCU_TESR_TCST4 (1 << 4)
449 #define TCU_TESR_TCST3 (1 << 3)
450 #define TCU_TESR_TCST2 (1 << 2)
451 #define TCU_TESR_TCST1 (1 << 1)
452 #define TCU_TESR_TCST0 (1 << 0)
453
454 #define TCU_TECR_TCCL5 (1 << 5)
455 #define TCU_TECR_TCCL4 (1 << 4)
456 #define TCU_TECR_TCCL3 (1 << 3)
457 #define TCU_TECR_TCCL2 (1 << 2)
458 #define TCU_TECR_TCCL1 (1 << 1)
459 #define TCU_TECR_TCCL0 (1 << 0)
460
461 #define TCU_TFR_HFLAG5 (1 << 21)
462 #define TCU_TFR_HFLAG4 (1 << 20)
463 #define TCU_TFR_HFLAG3 (1 << 19)
464 #define TCU_TFR_HFLAG2 (1 << 18)
465 #define TCU_TFR_HFLAG1 (1 << 17)
466 #define TCU_TFR_HFLAG0 (1 << 16)
467 #define TCU_TFR_FFLAG5 (1 << 5)
468 #define TCU_TFR_FFLAG4 (1 << 4)
469 #define TCU_TFR_FFLAG3 (1 << 3)
470 #define TCU_TFR_FFLAG2 (1 << 2)
471 #define TCU_TFR_FFLAG1 (1 << 1)
472 #define TCU_TFR_FFLAG0 (1 << 0)
473
474 #define TCU_TFSR_HFLAG5 (1 << 21)
475 #define TCU_TFSR_HFLAG4 (1 << 20)
476 #define TCU_TFSR_HFLAG3 (1 << 19)
477 #define TCU_TFSR_HFLAG2 (1 << 18)
478 #define TCU_TFSR_HFLAG1 (1 << 17)
479 #define TCU_TFSR_HFLAG0 (1 << 16)
480 #define TCU_TFSR_FFLAG5 (1 << 5)
481 #define TCU_TFSR_FFLAG4 (1 << 4)
482 #define TCU_TFSR_FFLAG3 (1 << 3)
483 #define TCU_TFSR_FFLAG2 (1 << 2)
484 #define TCU_TFSR_FFLAG1 (1 << 1)
485 #define TCU_TFSR_FFLAG0 (1 << 0)
486
487 #define TCU_TFCR_HFLAG5 (1 << 21)
488 #define TCU_TFCR_HFLAG4 (1 << 20)
489 #define TCU_TFCR_HFLAG3 (1 << 19)
490 #define TCU_TFCR_HFLAG2 (1 << 18)
491 #define TCU_TFCR_HFLAG1 (1 << 17)
492 #define TCU_TFCR_HFLAG0 (1 << 16)
493 #define TCU_TFCR_FFLAG5 (1 << 5)
494 #define TCU_TFCR_FFLAG4 (1 << 4)
495 #define TCU_TFCR_FFLAG3 (1 << 3)
496 #define TCU_TFCR_FFLAG2 (1 << 2)
497 #define TCU_TFCR_FFLAG1 (1 << 1)
498 #define TCU_TFCR_FFLAG0 (1 << 0)
499
500 #define TCU_TMR_HMASK5 (1 << 21)
501 #define TCU_TMR_HMASK4 (1 << 20)
502 #define TCU_TMR_HMASK3 (1 << 19)
503 #define TCU_TMR_HMASK2 (1 << 18)
504 #define TCU_TMR_HMASK1 (1 << 17)
505 #define TCU_TMR_HMASK0 (1 << 16)
506 #define TCU_TMR_FMASK5 (1 << 5)
507 #define TCU_TMR_FMASK4 (1 << 4)
508 #define TCU_TMR_FMASK3 (1 << 3)
509 #define TCU_TMR_FMASK2 (1 << 2)
510 #define TCU_TMR_FMASK1 (1 << 1)
511 #define TCU_TMR_FMASK0 (1 << 0)
512
513 #define TCU_TMSR_HMST5 (1 << 21)
514 #define TCU_TMSR_HMST4 (1 << 20)
515 #define TCU_TMSR_HMST3 (1 << 19)
516 #define TCU_TMSR_HMST2 (1 << 18)
517 #define TCU_TMSR_HMST1 (1 << 17)
518 #define TCU_TMSR_HMST0 (1 << 16)
519 #define TCU_TMSR_FMST5 (1 << 5)
520 #define TCU_TMSR_FMST4 (1 << 4)
521 #define TCU_TMSR_FMST3 (1 << 3)
522 #define TCU_TMSR_FMST2 (1 << 2)
523 #define TCU_TMSR_FMST1 (1 << 1)
524 #define TCU_TMSR_FMST0 (1 << 0)
525
526 #define TCU_TMCR_HMCL5 (1 << 21)
527 #define TCU_TMCR_HMCL4 (1 << 20)
528 #define TCU_TMCR_HMCL3 (1 << 19)
529 #define TCU_TMCR_HMCL2 (1 << 18)
530 #define TCU_TMCR_HMCL1 (1 << 17)
531 #define TCU_TMCR_HMCL0 (1 << 16)
532 #define TCU_TMCR_FMCL5 (1 << 5)
533 #define TCU_TMCR_FMCL4 (1 << 4)
534 #define TCU_TMCR_FMCL3 (1 << 3)
535 #define TCU_TMCR_FMCL2 (1 << 2)
536 #define TCU_TMCR_FMCL1 (1 << 1)
537 #define TCU_TMCR_FMCL0 (1 << 0)
538
539 #define TCU_TSR_WDTS (1 << 16)
540 #define TCU_TSR_STOP5 (1 << 5)
541 #define TCU_TSR_STOP4 (1 << 4)
542 #define TCU_TSR_STOP3 (1 << 3)
543 #define TCU_TSR_STOP2 (1 << 2)
544 #define TCU_TSR_STOP1 (1 << 1)
545 #define TCU_TSR_STOP0 (1 << 0)
546
547 #define TCU_TSSR_WDTSS (1 << 16)
548 #define TCU_TSSR_STPS5 (1 << 5)
549 #define TCU_TSSR_STPS4 (1 << 4)
550 #define TCU_TSSR_STPS3 (1 << 3)
551 #define TCU_TSSR_STPS2 (1 << 2)
552 #define TCU_TSSR_STPS1 (1 << 1)
553 #define TCU_TSSR_STPS0 (1 << 0)
554
555 #define TCU_TSSR_WDTSC (1 << 16)
556 #define TCU_TSSR_STPC5 (1 << 5)
557 #define TCU_TSSR_STPC4 (1 << 4)
558 #define TCU_TSSR_STPC3 (1 << 3)
559 #define TCU_TSSR_STPC2 (1 << 2)
560 #define TCU_TSSR_STPC1 (1 << 1)
561 #define TCU_TSSR_STPC0 (1 << 0)
562
563 /* Register definition */
564 #define WDT_TCSR_PRESCALE_BIT 3
565 #define WDT_TCSR_PRESCALE_MASK (0x7 << WDT_TCSR_PRESCALE_BIT)
566 #define WDT_TCSR_PRESCALE1 (0x0 << WDT_TCSR_PRESCALE_BIT)
567 #define WDT_TCSR_PRESCALE4 (0x1 << WDT_TCSR_PRESCALE_BIT)
568 #define WDT_TCSR_PRESCALE16 (0x2 << WDT_TCSR_PRESCALE_BIT)
569 #define WDT_TCSR_PRESCALE64 (0x3 << WDT_TCSR_PRESCALE_BIT)
570 #define WDT_TCSR_PRESCALE256 (0x4 << WDT_TCSR_PRESCALE_BIT)
571 #define WDT_TCSR_PRESCALE1024 (0x5 << WDT_TCSR_PRESCALE_BIT)
572 #define WDT_TCSR_EXT_EN (1 << 2)
573 #define WDT_TCSR_RTC_EN (1 << 1)
574 #define WDT_TCSR_PCK_EN (1 << 0)
575 #define WDT_TCER_TCEN (1 << 0)
576
577 /*
578 * Define macros for UART_IER
579 * UART Interrupt Enable Register
580 */
581 #define UART_IER_RIE (1 << 0) /* 0: receive fifo full interrupt disable */
582 #define UART_IER_TIE (1 << 1) /* 0: transmit fifo empty interrupt disable */
583 #define UART_IER_RLIE (1 << 2) /* 0: receive line status interrupt disable */
584 #define UART_IER_MIE (1 << 3) /* 0: modem status interrupt disable */
585 #define UART_IER_RTIE (1 << 4) /* 0: receive timeout interrupt disable */
586
587 /*
588 * Define macros for UART_ISR
589 * UART Interrupt Status Register
590 */
591 #define UART_ISR_IP (1 << 0) /* 0: interrupt is pending 1: no interrupt */
592 #define UART_ISR_IID (7 << 1) /* Source of Interrupt */
593 #define UART_ISR_IID_MSI (0 << 1) /* Modem status interrupt */
594 #define UART_ISR_IID_THRI (1 << 1) /* Transmitter holding register empty */
595 #define UART_ISR_IID_RDI (2 << 1) /* Receiver data interrupt */
596 #define UART_ISR_IID_RLSI (3 << 1) /* Receiver line status interrupt */
597 /* FIFO mode select, set when UART_FCR.FE is set to 1 */
598 #define UART_ISR_FFMS (3 << 6)
599 #define UART_ISR_FFMS_NO_FIFO (0 << 6)
600 #define UART_ISR_FFMS_FIFO_MODE (3 << 6)
601
602 /*
603 * Define macros for UART_FCR
604 * UART FIFO Control Register
605 */
606 #define UART_FCR_FE (1 << 0) /* 0: non-FIFO mode 1: FIFO mode */
607 #define UART_FCR_RFLS (1 << 1) /* write 1 to flush receive FIFO */
608 #define UART_FCR_TFLS (1 << 2) /* write 1 to flush transmit FIFO */
609 #define UART_FCR_DMS (1 << 3) /* 0: disable DMA mode */
610 #define UART_FCR_UUE (1 << 4) /* 0: disable UART */
611 #define UART_FCR_RTRG (3 << 6) /* Receive FIFO Data Trigger */
612 #define UART_FCR_RTRG_1 (0 << 6)
613 #define UART_FCR_RTRG_4 (1 << 6)
614 #define UART_FCR_RTRG_8 (2 << 6)
615 #define UART_FCR_RTRG_15 (3 << 6)
616
617 /*
618 * Define macros for UART_LCR
619 * UART Line Control Register
620 */
621 #define UART_LCR_WLEN (3 << 0) /* word length */
622 #define UART_LCR_WLEN_5 (0 << 0)
623 #define UART_LCR_WLEN_6 (1 << 0)
624 #define UART_LCR_WLEN_7 (2 << 0)
625 #define UART_LCR_WLEN_8 (3 << 0)
626 #define UART_LCR_STOP (1 << 2)
627 /* 0: 1 stop bit when word length is 5,6,7,8
628 1: 1.5 stop bits when 5; 2 stop bits when 6,7,8 */
629 #define UART_LCR_STOP_1 (0 << 2)
630 /* 0: 1 stop bit when word length is 5,6,7,8
631 1: 1.5 stop bits when 5; 2 stop bits when 6,7,8 */
632 #define UART_LCR_STOP_2 (1 << 2)
633 /* 0: 1 stop bit when word length is 5,6,7,8
634 1: 1.5 stop bits when 5; 2 stop bits when 6,7,8 */
635
636 #define UART_LCR_PE (1 << 3) /* 0: parity disable */
637 #define UART_LCR_PROE (1 << 4) /* 0: even parity 1: odd parity */
638 #define UART_LCR_SPAR (1 << 5) /* 0: sticky parity disable */
639 #define UART_LCR_SBRK (1 << 6) /* write 0 normal, write 1 send break */
640 /* 0: access UART_RDR/TDR/IER 1: access UART_DLLR/DLHR */
641 #define UART_LCR_DLAB (1 << 7)
642
643 /*
644 * Define macros for UART_LSR
645 * UART Line Status Register
646 */
647 /* 0: receive FIFO is empty 1: receive data is ready */
648 #define UART_LSR_DR (1 << 0)
649 /* 0: no overrun error */
650 #define UART_LSR_ORER (1 << 1)
651 /* 0: no parity error */
652 #define UART_LSR_PER (1 << 2)
653 /* 0; no framing error */
654 #define UART_LSR_FER (1 << 3)
655 /* 0: no break detected 1: receive a break signal */
656 #define UART_LSR_BRK (1 << 4)
657 /* 1: transmit FIFO half "empty" */
658 #define UART_LSR_TDRQ (1 << 5)
659 /* 1: transmit FIFO and shift registers empty */
660 #define UART_LSR_TEMT (1 << 6)
661 /* 0: no receive error 1: receive error in FIFO mode */
662 #define UART_LSR_RFER (1 << 7)
663
664 /*
665 * Define macros for UART_MCR
666 * UART Modem Control Register
667 */
668 #define UART_MCR_DTR (1 << 0) /* 0: DTR_ ouput high */
669 #define UART_MCR_RTS (1 << 1) /* 0: RTS_ output high */
670 /* 0: UART_MSR.RI is set to 0 and RI_ input high */
671 #define UART_MCR_OUT1 (1 << 2)
672 /* 0: UART_MSR.DCD is set to 0 and DCD_ input high */
673 #define UART_MCR_OUT2 (1 << 3)
674 #define UART_MCR_LOOP (1 << 4) /* 0: normal 1: loopback mode */
675 #define UART_MCR_MCE (1 << 7) /* 0: modem function is disable */
676
677 /*
678 * Define macros for UART_MSR
679 * UART Modem Status Register
680 */
681 #define UART_MSR_DCTS (1 << 0) /* 0: no change on CTS_ since last read */
682 #define UART_MSR_DDSR (1 << 1) /* 0: no change on DSR_ since last read */
683 #define UART_MSR_DRI (1 << 2) /* 0: no change on RI_ since last read */
684 #define UART_MSR_DDCD (1 << 3) /* 0: no change on DCD_ since last read */
685 #define UART_MSR_CTS (1 << 4) /* 0: CTS_ pin is high */
686 #define UART_MSR_DSR (1 << 5) /* 0: DSR_ pin is high */
687 #define UART_MSR_RI (1 << 6) /* 0: RI_ pin is high */
688 #define UART_MSR_DCD (1 << 7) /* 0: DCD_ pin is high */
689
690 /*
691 * Define macros for SIRCR
692 * Slow IrDA Control Register
693 */
694 #define SIRCR_TSIRE (1 << 0) /* 0: TX is in UART mode 1: IrDA mode */
695 #define SIRCR_RSIRE (1 << 1) /* 0: RX is in UART mode 1: IrDA mode */
696 #define SIRCR_TPWS (1 << 2) /* 0: transmit 0 pulse width is 3/16 of bit length
697 1: 0 pulse width is 1.6us for 115.2Kbps */
698 #define SIRCR_TXPL (1 << 3) /* 0: encoder generates a positive pulse for 0 */
699 #define SIRCR_RXPL (1 << 4) /* 0: decoder interprets positive pulse as 0 */
700
701 /* MSC Clock and Control Register (MSC_STRPCL) */
702 #define MSC_STRPCL_EXIT_MULTIPLE (1 << 7)
703 #define MSC_STRPCL_EXIT_TRANSFER (1 << 6)
704 #define MSC_STRPCL_START_READWAIT (1 << 5)
705 #define MSC_STRPCL_STOP_READWAIT (1 << 4)
706 #define MSC_STRPCL_RESET (1 << 3)
707 #define MSC_STRPCL_START_OP (1 << 2)
708 #define MSC_STRPCL_CLOCK_CONTROL_BIT 0
709 #define MSC_STRPCL_CLOCK_CONTROL_MASK (0x3 << MSC_STRPCL_CLOCK_CONTROL_BIT)
710 #define MSC_STRPCL_CLOCK_CONTROL_STOP (0x1 << MSC_STRPCL_CLOCK_CONTROL_BIT)
711 #define MSC_STRPCL_CLOCK_CONTROL_START (0x2 << MSC_STRPCL_CLOCK_CONTROL_BIT)
712
713 /* MSC Status Register (MSC_STAT) */
714 #define MSC_STAT_IS_RESETTING (1 << 15)
715 #define MSC_STAT_SDIO_INT_ACTIVE (1 << 14)
716 #define MSC_STAT_PRG_DONE (1 << 13)
717 #define MSC_STAT_DATA_TRAN_DONE (1 << 12)
718 #define MSC_STAT_END_CMD_RES (1 << 11)
719 #define MSC_STAT_DATA_FIFO_AFULL (1 << 10)
720 #define MSC_STAT_IS_READWAIT (1 << 9)
721 #define MSC_STAT_CLK_EN (1 << 8)
722 #define MSC_STAT_DATA_FIFO_FULL (1 << 7)
723 #define MSC_STAT_DATA_FIFO_EMPTY (1 << 6)
724 #define MSC_STAT_CRC_RES_ERR (1 << 5)
725 #define MSC_STAT_CRC_READ_ERROR (1 << 4)
726 #define MSC_STAT_CRC_WRITE_ERROR_BIT 2
727 #define MSC_STAT_CRC_WRITE_ERROR_MASK (0x3 << MSC_STAT_CRC_WRITE_ERROR_BIT)
728 /* No error on transmission of data */
729 #define MSC_STAT_CRC_WRITE_ERROR_NO (0 << MSC_STAT_CRC_WRITE_ERROR_BIT)
730 /* Card observed erroneous transmission of data */
731 #define MSC_STAT_CRC_WRITE_ERROR (1 << MSC_STAT_CRC_WRITE_ERROR_BIT)
732 /* No CRC status is sent back */
733 #define MSC_STAT_CRC_WRITE_ERROR_NOSTS (2 << MSC_STAT_CRC_WRITE_ERROR_BIT)
734 #define MSC_STAT_TIME_OUT_RES (1 << 1)
735 #define MSC_STAT_TIME_OUT_READ (1 << 0)
736
737 /* MSC Bus Clock Control Register (MSC_CLKRT) */
738 #define MSC_CLKRT_CLK_RATE_BIT 0
739 #define MSC_CLKRT_CLK_RATE_MASK (0x7 << MSC_CLKRT_CLK_RATE_BIT)
740 #define MSC_CLKRT_CLK_RATE_DIV_1 (0x0 << MSC_CLKRT_CLK_RATE_BIT)
741 #define MSC_CLKRT_CLK_RATE_DIV_2 (0x1 << MSC_CLKRT_CLK_RATE_BIT)
742 #define MSC_CLKRT_CLK_RATE_DIV_4 (0x2 << MSC_CLKRT_CLK_RATE_BIT)
743 #define MSC_CLKRT_CLK_RATE_DIV_8 (0x3 << MSC_CLKRT_CLK_RATE_BIT)
744 #define MSC_CLKRT_CLK_RATE_DIV_16 (0x4 << MSC_CLKRT_CLK_RATE_BIT)
745 #define MSC_CLKRT_CLK_RATE_DIV_32 (0x5 << MSC_CLKRT_CLK_RATE_BIT)
746 #define MSC_CLKRT_CLK_RATE_DIV_64 (0x6 << MSC_CLKRT_CLK_RATE_BIT)
747 #define MSC_CLKRT_CLK_RATE_DIV_128 (0x7 << MSC_CLKRT_CLK_RATE_BIT)
748
749 /* MSC Command Sequence Control Register (MSC_CMDAT) */
750 #define MSC_CMDAT_IO_ABORT (1 << 11)
751 #define MSC_CMDAT_BUS_WIDTH_BIT 9
752 #define MSC_CMDAT_BUS_WIDTH_MASK (0x3 << MSC_CMDAT_BUS_WIDTH_BIT)
753 #define MSC_CMDAT_BUS_WIDTH_1BIT (0x0 << MSC_CMDAT_BUS_WIDTH_BIT)
754 #define MSC_CMDAT_BUS_WIDTH_4BIT (0x2 << MSC_CMDAT_BUS_WIDTH_BIT)
755 #define MSC_CMDAT_DMA_EN (1 << 8)
756 #define MSC_CMDAT_INIT (1 << 7)
757 #define MSC_CMDAT_BUSY (1 << 6)
758 #define MSC_CMDAT_STREAM_BLOCK (1 << 5)
759 #define MSC_CMDAT_WRITE (1 << 4)
760 #define MSC_CMDAT_READ (0 << 4)
761 #define MSC_CMDAT_DATA_EN (1 << 3)
762 #define MSC_CMDAT_RESPONSE_BIT 0
763 #define MSC_CMDAT_RESPONSE_MASK (0x7 << MSC_CMDAT_RESPONSE_BIT)
764 #define MSC_CMDAT_RESPONSE_NONE (0x0 << MSC_CMDAT_RESPONSE_BIT)
765 #define MSC_CMDAT_RESPONSE_R1 (0x1 << MSC_CMDAT_RESPONSE_BIT)
766 #define MSC_CMDAT_RESPONSE_R2 (0x2 << MSC_CMDAT_RESPONSE_BIT)
767 #define MSC_CMDAT_RESPONSE_R3 (0x3 << MSC_CMDAT_RESPONSE_BIT)
768 #define MSC_CMDAT_RESPONSE_R4 (0x4 << MSC_CMDAT_RESPONSE_BIT)
769 #define MSC_CMDAT_RESPONSE_R5 (0x5 << MSC_CMDAT_RESPONSE_BIT)
770 #define MSC_CMDAT_RESPONSE_R6 (0x6 << MSC_CMDAT_RESPONSE_BIT)
771
772 /* MSC Interrupts Mask Register (MSC_IMASK) */
773 #define MSC_IMASK_SDIO (1 << 7)
774 #define MSC_IMASK_TXFIFO_WR_REQ (1 << 6)
775 #define MSC_IMASK_RXFIFO_RD_REQ (1 << 5)
776 #define MSC_IMASK_END_CMD_RES (1 << 2)
777 #define MSC_IMASK_PRG_DONE (1 << 1)
778 #define MSC_IMASK_DATA_TRAN_DONE (1 << 0)
779
780 #ifndef __ASSEMBLY__
781 /* INTC (Interrupt Controller) */
782 struct jz4740_intc {
783 uint32_t isr; /* interrupt source register */
784 uint32_t imr; /* interrupt mask register */
785 uint32_t imsr; /* interrupt mask set register */
786 uint32_t imcr; /* interrupt mask clear register */
787 uint32_t ipr; /* interrupt pending register */
788 };
789
790 /* RTC */
791 struct jz4740_rtc {
792 uint32_t rcr; /* rtc control register */
793 uint32_t rsr; /* rtc second register */
794 uint32_t rsar; /* rtc second alarm register */
795 uint32_t rgr; /* rtc regulator register */
796 uint32_t hcr; /* hibernate control register */
797 uint32_t hwfcr; /* hibernate wakeup filter counter reg */
798 uint32_t hrcr; /* hibernate reset counter reg */
799 uint32_t hwcr; /* hibernate wakeup control register */
800 uint32_t hwrsr; /* hibernate wakeup status reg */
801 uint32_t hspr; /* scratch pattern register */
802 };
803
804 /* CPM (Clock reset and Power control Management) */
805 struct jz4740_cpm {
806 uint32_t cpccr; /* 0x00 clock control reg */
807 uint32_t lcr; /* 0x04 low power control reg */
808 uint32_t rsr; /* 0x08 reset status reg */
809 uint32_t pad00;
810 uint32_t cppcr; /* 0x10 pll control reg */
811 uint32_t pad01[3];
812 uint32_t clkgr; /* 0x20 clock gate reg */
813 uint32_t scr; /* 0x24 sleep control reg */
814 uint32_t pad02[14];
815 uint32_t i2scd; /* 0x60 I2S device clock divider reg */
816 uint32_t lpcdr; /* 0x64 LCD pix clock divider reg */
817 uint32_t msccdr; /* 0x68 MSC device clock divider reg */
818 uint32_t uhccdr; /* 0x6C UHC 48M clock divider reg */
819 uint32_t uhcts; /* 0x70 UHC PHY test point reg */
820 uint32_t ssicd; /* 0x74 SSI clock divider reg */
821 };
822
823 /* TCU (Timer Counter Unit) */
824 struct jz4740_tcu {
825 uint32_t pad00[4];
826 uint32_t ter; /* 0x10 Timer Counter Enable Register */
827 uint32_t tesr; /* 0x14 Timer Counter Enable Set Register */
828 uint32_t tecr; /* 0x18 Timer Counter Enable Clear Register */
829 uint32_t tsr; /* 0x1C Timer Stop Register */
830 uint32_t tfr; /* 0x20 Timer Flag Register */
831 uint32_t tfsr; /* 0x24 Timer Flag Set Register */
832 uint32_t tfcr; /* 0x28 Timer Flag Clear Register */
833 uint32_t tssr; /* 0x2C Timer Stop Set Register */
834 uint32_t tmr; /* 0x30 Timer Mask Register */
835 uint32_t tmsr; /* 0x34 Timer Mask Set Register */
836 uint32_t tmcr; /* 0x38 Timer Mask Clear Register */
837 uint32_t tscr; /* 0x3C Timer Stop Clear Register */
838 uint32_t tdfr0; /* 0x40 Timer Data Full Register */
839 uint32_t tdhr0; /* 0x44 Timer Data Half Register */
840 uint32_t tcnt0; /* 0x48 Timer Counter Register */
841 uint32_t tcsr0; /* 0x4C Timer Control Register */
842 uint32_t tdfr1; /* 0x50 */
843 uint32_t tdhr1; /* 0x54 */
844 uint32_t tcnt1; /* 0x58 */
845 uint32_t tcsr1; /* 0x5C */
846 uint32_t tdfr2; /* 0x60 */
847 uint32_t tdhr2; /* 0x64 */
848 uint32_t tcnt2; /* 0x68 */
849 uint32_t tcsr2; /* 0x6C */
850 uint32_t tdfr3; /* 0x70 */
851 uint32_t tdhr3; /* 0x74 */
852 uint32_t tcnt3; /* 0x78 */
853 uint32_t tcsr3; /* 0x7C */
854 uint32_t tdfr4; /* 0x80 */
855 uint32_t tdhr4; /* 0x84 */
856 uint32_t tcnt4; /* 0x88 */
857 uint32_t tcsr4; /* 0x8C */
858 uint32_t tdfr5; /* 0x90 */
859 uint32_t tdhr5; /* 0x94 */
860 uint32_t tcnt5; /* 0x98 */
861 uint32_t tcsr5; /* 0x9C */
862 };
863
864 /* WDT (WatchDog Timer) */
865 struct jz4740_wdt {
866 uint16_t tdr; /* 0x00 watchdog timer data reg*/
867 uint16_t pad00;
868 uint8_t tcer; /* 0x04 watchdog counter enable reg*/
869 uint8_t pad01[3];
870 uint16_t tcnt; /* 0x08 watchdog timer counter*/
871 uint16_t pad02;
872 uint16_t tcsr; /* 0x0C watchdog timer control reg*/
873 uint16_t pad03;
874 };
875
876 struct jz4740_uart {
877 uint8_t rbr_thr_dllr;
878 /* 0x00 R 8b receive buffer reg */
879 /* 0x00 W 8b transmit hold reg */
880 /* 0x00 RW 8b divisor latch low reg */
881 uint8_t pad00[3];
882 uint8_t dlhr_ier;
883 /* 0x04 RW 8b divisor latch high reg */
884 /* 0x04 RW 8b interrupt enable reg */
885 uint8_t pad01[3];
886 uint8_t iir_fcr;
887 /* 0x08 R 8b interrupt identification reg */
888 /* 0x08 W 8b FIFO control reg */
889 uint8_t pad02[3];
890 uint8_t lcr; /* 0x0C RW 8b Line control reg */
891 uint8_t pad03[3];
892 uint8_t mcr; /* 0x10 RW 8b modem control reg */
893 uint8_t pad04[3];
894 uint8_t lsr; /* 0x14 R 8b line status reg */
895 uint8_t pad05[3];
896 uint8_t msr; /* 0x18 R 8b modem status reg */
897 uint8_t pad06[3];
898 uint8_t spr; /* 0x1C RW 8b scratch pad reg */
899 uint8_t pad07[3];
900 uint8_t isr; /* 0x20 RW 8b infrared selection reg */
901 uint8_t pad08[3];
902 uint8_t umr; /* 0x24 RW 8b */
903 };
904
905 /* MSC */
906 struct jz4740_msc {
907 uint16_t strpcl;/* 0x00 */
908 uint32_t stat; /* 0x04 */
909 uint16_t clkrt; /* 0x08 */
910 uint32_t cmdat; /* 0x0C */
911 uint16_t resto; /* 0x10 */
912 uint16_t rdto; /* 0x14 */
913 uint16_t blklen;/* 0x18 */
914 uint16_t nob; /* 0x1C */
915 uint16_t snob; /* 0x20 */
916 uint16_t imask; /* 0x24 */
917 uint16_t ireg; /* 0x28 */
918 uint8_t cmd; /* 0x2C */
919 uint32_t arg; /* 0x30 */
920 uint16_t res; /* 0x34 */
921 uint32_t rxfifo;/* 0x38 */
922 uint32_t txfifo;/* 0x3C */
923 };
924
925 /* External Memory Controller */
926 struct jz4740_emc {
927 uint32_t bcr; /* 0x00 BCR */
928 uint32_t pad00[3];
929 uint32_t smcr[5];
930 /* x10 Static Memory Control Register 0 */
931 /* x14 Static Memory Control Register 1 */
932 /* x18 Static Memory Control Register 2 */
933 /* x1c Static Memory Control Register 3 */
934 /* x20 Static Memory Control Register 4 */
935 uint32_t pad01[3];
936 uint32_t sacr[5];
937 /* x30 Static Memory Bank 0 Addr Config Reg */
938 /* x34 Static Memory Bank 1 Addr Config Reg */
939 /* x38 Static Memory Bank 2 Addr Config Reg */
940 /* x3c Static Memory Bank 3 Addr Config Reg */
941 /* x40 Static Memory Bank 4 Addr Config Reg */
942 uint32_t pad02[3];
943 uint32_t nfcsr; /* x050 NAND Flash Control/Status Register */
944
945 uint32_t pad03[11];
946 uint32_t dmcr; /* x80 DRAM Control Register */
947 uint16_t rtcsr; /* x84 Refresh Time Control/Status Register */
948 uint16_t pad04;
949 uint16_t rtcnt; /* x88 Refresh Timer Counter */
950 uint16_t pad05;
951 uint16_t rtcor; /* x8c Refresh Time Constant Register */
952 uint16_t pad06;
953 uint32_t dmar0; /* x90 SDRAM Bank 0 Addr Config Register */
954 uint32_t pad07[27];
955 uint32_t nfecr; /* x100 NAND Flash ECC Control Register */
956 uint32_t nfecc; /* x104 NAND Flash ECC Data Register */
957 uint8_t nfpar[12];
958 /* x108 NAND Flash RS Parity 0 Register */
959 /* x10c NAND Flash RS Parity 1 Register */
960 /* x110 NAND Flash RS Parity 2 Register */
961 uint32_t nfints; /* x114 NAND Flash Interrupt Status Register */
962 uint32_t nfinte; /* x118 NAND Flash Interrupt Enable Register */
963 uint32_t nferr[4];
964 /* x11c NAND Flash RS Error Report 0 Register */
965 /* x120 NAND Flash RS Error Report 1 Register */
966 /* x124 NAND Flash RS Error Report 2 Register */
967 /* x128 NAND Flash RS Error Report 3 Register */
968 };
969
970 #define __gpio_as_nand() \
971 do { \
972 writel(0x02018000, GPIO_PXFUNS(1)); \
973 writel(0x02018000, GPIO_PXSELC(1)); \
974 writel(0x02018000, GPIO_PXPES(1)); \
975 writel(0x30000000, GPIO_PXFUNS(2)); \
976 writel(0x30000000, GPIO_PXSELC(2)); \
977 writel(0x30000000, GPIO_PXPES(2)); \
978 writel(0x40000000, GPIO_PXFUNC(2)); \
979 writel(0x40000000, GPIO_PXSELC(2)); \
980 writel(0x40000000, GPIO_PXDIRC(2)); \
981 writel(0x40000000, GPIO_PXPES(2)); \
982 writel(0x00400000, GPIO_PXFUNS(1)); \
983 writel(0x00400000, GPIO_PXSELC(1)); \
984 } while (0)
985
986 #define __gpio_as_sdram_16bit_4720() \
987 do { \
988 writel(0x5442bfaa, GPIO_PXFUNS(0)); \
989 writel(0x5442bfaa, GPIO_PXSELC(0)); \
990 writel(0x5442bfaa, GPIO_PXPES(0)); \
991 writel(0x81f9ffff, GPIO_PXFUNS(1)); \
992 writel(0x81f9ffff, GPIO_PXSELC(1)); \
993 writel(0x81f9ffff, GPIO_PXPES(1)); \
994 writel(0x01000000, GPIO_PXFUNS(2)); \
995 writel(0x01000000, GPIO_PXSELC(2)); \
996 writel(0x01000000, GPIO_PXPES(2)); \
997 } while (0)
998
999 #define __gpio_as_lcd_18bit() \
1000 do { \
1001 writel(0x003fffff, GPIO_PXFUNS(2)); \
1002 writel(0x003fffff, GPIO_PXSELC(2)); \
1003 writel(0x003fffff, GPIO_PXPES(2)); \
1004 } while (0)
1005
1006 /* MSC_CMD, MSC_CLK, MSC_D0 ~ MSC_D3 */
1007 #define __gpio_as_msc() \
1008 do { \
1009 writel(0x00003f00, GPIO_PXFUNS(3)); \
1010 writel(0x00003f00, GPIO_PXSELC(3)); \
1011 writel(0x00003f00, GPIO_PXPES(3)); \
1012 } while (0)
1013
1014 #define __gpio_get_port(p) (readl(GPIO_PXPIN(p)))
1015
1016 #define __gpio_disable_pull(n) \
1017 do { \
1018 unsigned int p, o; \
1019 p = (n) / 32; \
1020 o = (n) % 32; \
1021 writel((1 << o), GPIO_PXPES(p)); \
1022 } while (0)
1023
1024 #define __gpio_enable_pull(n) \
1025 do { \
1026 unsigned int p, o; \
1027 p = (n) / 32; \
1028 o = (n) % 32; \
1029 writel(1 << (o), GPIO_PXPEC(p)); \
1030 } while (0)
1031
1032 #define __gpio_port_as_output(p, o) \
1033 do { \
1034 writel(1 << (o), GPIO_PXFUNC(p)); \
1035 writel(1 << (o), GPIO_PXSELC(p)); \
1036 writel(1 << (o), GPIO_PXDIRS(p)); \
1037 } while (0)
1038
1039 #define __gpio_port_as_input(p, o) \
1040 do { \
1041 writel(1 << (o), GPIO_PXFUNC(p)); \
1042 writel(1 << (o), GPIO_PXSELC(p)); \
1043 writel(1 << (o), GPIO_PXDIRC(p)); \
1044 } while (0)
1045
1046 #define __gpio_as_output(n) \
1047 do { \
1048 unsigned int p, o; \
1049 p = (n) / 32; \
1050 o = (n) % 32; \
1051 __gpio_port_as_output(p, o); \
1052 } while (0)
1053
1054 #define __gpio_as_input(n) \
1055 do { \
1056 unsigned int p, o; \
1057 p = (n) / 32; \
1058 o = (n) % 32; \
1059 __gpio_port_as_input(p, o); \
1060 } while (0)
1061
1062 #define __gpio_set_pin(n) \
1063 do { \
1064 unsigned int p, o; \
1065 p = (n) / 32; \
1066 o = (n) % 32; \
1067 writel((1 << o), GPIO_PXDATS(p)); \
1068 } while (0)
1069
1070 #define __gpio_clear_pin(n) \
1071 do { \
1072 unsigned int p, o; \
1073 p = (n) / 32; \
1074 o = (n) % 32; \
1075 writel((1 << o), GPIO_PXDATC(p)); \
1076 } while (0)
1077
1078 #define __gpio_get_pin(n) \
1079 ({ \
1080 unsigned int p, o, v; \
1081 p = (n) / 32; \
1082 o = (n) % 32; \
1083 if (__gpio_get_port(p) & (1 << o)) \
1084 v = 1; \
1085 else \
1086 v = 0; \
1087 v; \
1088 })
1089
1090 #define __gpio_as_uart0() \
1091 do { \
1092 writel(0x06000000, GPIO_PXFUNS(3)); \
1093 writel(0x06000000, GPIO_PXSELS(3)); \
1094 writel(0x06000000, GPIO_PXPES(3)); \
1095 } while (0)
1096
1097 #define __gpio_jtag_to_uart0() \
1098 do { \
1099 writel(0x80000000, GPIO_PXSELS(2)); \
1100 } while (0)
1101
1102 /* Clock Control Register */
1103 #define __cpm_get_pllm() \
1104 ((readl(JZ4740_CPM_BASE + 0x10) & CPM_CPPCR_PLLM_MASK) \
1105 >> CPM_CPPCR_PLLM_BIT)
1106 #define __cpm_get_plln() \
1107 ((readl(JZ4740_CPM_BASE + 0x10) & CPM_CPPCR_PLLN_MASK) \
1108 >> CPM_CPPCR_PLLN_BIT)
1109 #define __cpm_get_pllod() \
1110 ((readl(JZ4740_CPM_BASE + 0x10) & CPM_CPPCR_PLLOD_MASK) \
1111 >> CPM_CPPCR_PLLOD_BIT)
1112 #define __cpm_get_hdiv() \
1113 ((readl(JZ4740_CPM_BASE + 0x00) & CPM_CPCCR_HDIV_MASK) \
1114 >> CPM_CPCCR_HDIV_BIT)
1115 #define __cpm_get_pdiv() \
1116 ((readl(JZ4740_CPM_BASE + 0x00) & CPM_CPCCR_PDIV_MASK) \
1117 >> CPM_CPCCR_PDIV_BIT)
1118 #define __cpm_get_cdiv() \
1119 ((readl(JZ4740_CPM_BASE + 0x00) & CPM_CPCCR_CDIV_MASK) \
1120 >> CPM_CPCCR_CDIV_BIT)
1121 #define __cpm_get_mdiv() \
1122 ((readl(JZ4740_CPM_BASE + 0x00) & CPM_CPCCR_MDIV_MASK) \
1123 >> CPM_CPCCR_MDIV_BIT)
1124
1125 static inline unsigned int __cpm_get_pllout(void)
1126 {
1127 uint32_t m, n, no, pllout;
1128 uint32_t od[4] = {1, 2, 2, 4};
1129
1130 struct jz4740_cpm *cpm = (struct jz4740_cpm *)JZ4740_CPM_BASE;
1131 uint32_t cppcr = readl(&cpm->cppcr);
1132
1133 if ((cppcr & CPM_CPPCR_PLLEN) && !(cppcr & CPM_CPPCR_PLLBP)) {
1134 m = __cpm_get_pllm() + 2;
1135 n = __cpm_get_plln() + 2;
1136 no = od[__cpm_get_pllod()];
1137 pllout = (CONFIG_SYS_EXTAL / (n * no)) * m;
1138 } else
1139 pllout = CONFIG_SYS_EXTAL;
1140
1141 return pllout;
1142 }
1143
1144 extern void pll_init(void);
1145 extern void sdram_init(void);
1146 extern void calc_clocks(void);
1147 extern void rtc_init(void);
1148
1149 #endif /* !__ASSEMBLY__ */
1150 #endif /* __JZ4740_H__ */
1151
board/qi/qi_lb60/Makefile
Diff comments   View file @ d8fffa0
File was created 1 #
2 # (C) Copyright 2006
3 # Ingenic Semiconductor, <jlwei@ingenic.cn>
4 #
5 # This program is free software; you can redistribute it and/or
6 # modify it under the terms of the GNU General Public License as
7 # published by the Free Software Foundation; either version 2 of
8 # the License, or (at your option) any later version.
9 #
10 # This program is distributed in the hope that it will be useful,
11 # but WITHOUT ANY WARRANTY; without even the implied warranty of
12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 # GNU General Public License for more details.
14 #
15 # You should have received a copy of the GNU General Public License
16 # along with this program; if not, write to the Free Software
17 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 # MA 02111-1307 USA
19 #
20
21 include $(TOPDIR)/config.mk
22
23 LIB = $(obj)lib$(BOARD).o
24
25 COBJS := $(BOARD).o
26
27 SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
28 OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
29
30 $(LIB): $(obj).depend $(OBJS) $(SOBJS)
31 $(call cmd_link_o_target, $(OBJS))
32
33 clean:
34 rm -f $(SOBJS) $(OBJS)
35
36 distclean: clean
37 rm -f $(LIB) core *.bak $(obj).depend
38 #########################################################################
39
40 # defines $(obj).depend target
41 include $(SRCTREE)/rules.mk
42
43 sinclude $(obj).depend
44
45 #########################################################################
46
board/qi/qi_lb60/config.mk
Diff comments   View file @ d8fffa0
File was created 1 #
2 # (C) Copyright 2006 Qi Hardware, Inc.
3 # Author: Xiangfu Liu <xiangfu.z@gmail.com>
4 #
5 # This program is free software; you can redistribute it and/or
6 # modify it under the terms of the GNU General Public License as
7 # published by the Free Software Foundation; either version 2 of
8 # the License, or (at your option) any later version.
9 #
10 # This program is distributed in the hope that it will be useful,
11 # but WITHOUT ANY WARRANTY; without even the implied warranty of
12 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 # GNU General Public License for more details.
14 #
15 # You should have received a copy of the GNU General Public License
16 # along with this program; if not, write to the Free Software
17 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 # MA 02111-1307 USA
19 #
20
21 #
22 # Qi Hardware, Inc. Ben NanoNote (QI_LB60)
23 #
24
25 ifndef TEXT_BASE
26 # ROM version
27 # TEXT_BASE = 0x88000000
28
29 # RAM version
30 TEXT_BASE = 0x80100000
31 endif
32
board/qi/qi_lb60/qi_lb60.c
Diff comments   View file @ d8fffa0
File was created 1 /*
2 * Authors: Xiangfu Liu <xiangfu@sharism.cc>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 3 of the License, or (at your option) any later version.
8 */
9
10 #include <common.h>
11 #include <asm/io.h>
12 #include <asm/jz4740.h>
13
14 DECLARE_GLOBAL_DATA_PTR;
15
16 static void gpio_init(void)
17 {
18 unsigned int i;
19
20 /* Initialize NAND Flash Pins */
21 __gpio_as_nand();
22
23 /* Initialize SDRAM pins */
24 __gpio_as_sdram_16bit_4720();
25
26 /* Initialize LCD pins */
27 __gpio_as_lcd_18bit();
28
29 /* Initialize MSC pins */
30 __gpio_as_msc();
31
32 /* Initialize Other pins */
33 for (i = 0; i < 7; i++) {
34 __gpio_as_input(GPIO_KEYIN_BASE + i);
35 __gpio_enable_pull(GPIO_KEYIN_BASE + i);
36 }
37
38 for (i = 0; i < 8; i++) {
39 __gpio_as_output(GPIO_KEYOUT_BASE + i);
40 __gpio_clear_pin(GPIO_KEYOUT_BASE + i);
41 }
42
43 __gpio_as_input(GPIO_KEYIN_8);
44 __gpio_enable_pull(GPIO_KEYIN_8);
45
46 /* enable the TP4, TP5 as UART0 */
47 __gpio_jtag_to_uart0();
48
49 __gpio_as_output(GPIO_AUDIO_POP);
50 __gpio_set_pin(GPIO_AUDIO_POP);
51
52 __gpio_as_output(GPIO_LCD_CS);
53 __gpio_clear_pin(GPIO_LCD_CS);
54
55 __gpio_as_output(GPIO_AMP_EN);
56 __gpio_clear_pin(GPIO_AMP_EN);
57
58 __gpio_as_output(GPIO_SDPW_EN);
59 __gpio_disable_pull(GPIO_SDPW_EN);
60 __gpio_clear_pin(GPIO_SDPW_EN);
61
62 __gpio_as_input(GPIO_SD_DETECT);
63 __gpio_disable_pull(GPIO_SD_DETECT);
64
65 __gpio_as_input(GPIO_USB_DETECT);
66 __gpio_enable_pull(GPIO_USB_DETECT);
67 }
68
69 static void cpm_init(void)
70 {
71 struct jz4740_cpm *cpm = (struct jz4740_cpm *)JZ4740_CPM_BASE;
72 uint32_t reg = readw(&cpm->clkgr);
73
74 reg |= CPM_CLKGR_IPU |
75 CPM_CLKGR_CIM |
76 CPM_CLKGR_I2C |
77 CPM_CLKGR_SSI |
78 CPM_CLKGR_UART1 |
79 CPM_CLKGR_SADC |
80 CPM_CLKGR_UHC |
81 CPM_CLKGR_UDC |
82 CPM_CLKGR_AIC1;
83
84 writew(reg, &cpm->clkgr);
85 }
86
87 int board_early_init_f(void)
88 {
89 gpio_init();
90 cpm_init();
91 calc_clocks(); /* calc the clocks */
92 rtc_init(); /* init rtc on any reset */
93
94 return 0;
95 }
96
97 /* U-Boot common routines */
98 int checkboard(void)
99 {
100 printf("Board: Qi LB60 (Ingenic XBurst Jz4740 SoC, Speed %ld MHz)\n",
101 gd->cpu_clk / 1000000);
102
103 return 0;
104 }
105
board/qi/qi_lb60/u-boot.lds
Diff comments   View file @ d8fffa0
File was created 1 /*
2 * (C) Copyright 2006
3 * Ingenic Semiconductor, <jlwei@ingenic.cn>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20
21 OUTPUT_FORMAT("elf32-tradlittlemips", "elf32-tradlittlemips", "elf32-tradlittlemips")
22
23 OUTPUT_ARCH(mips)
24 ENTRY(_start)
25 SECTIONS
26 {
27 . = 0x00000000;
28
29 . = ALIGN(4);
30 .text :
31 {
32 *(.text*)
33 }
34
35 . = ALIGN(4);
36 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
37
38 . = ALIGN(4);
39 .data : { *(.data*) }
40
41 . = .;
42 _gp = ALIGN(16) + 0x7ff0;
43
44 __got_start = .;
45 .got : { *(.got) }
46 __got_end = .;
47
48 .sdata : { *(.sdata*) }
49
50 __u_boot_cmd_start = .;
51 .u_boot_cmd : { *(.u_boot_cmd) }
52 __u_boot_cmd_end = .;
53
54 uboot_end_data = .;
55 num_got_entries = (__got_end - __got_start) >> 2;
56
57 . = ALIGN(4);
58 .sbss : { *(.sbss*) }
59 .bss : { *(.bss*) . = ALIGN(4); }
60 uboot_end = .;
61 }
62
1 # 1 #
2 # List of boards 2 # List of boards
3 # 3 #
4 # Syntax: 4 # Syntax:
5 # white-space separated list of entries; 5 # white-space separated list of entries;
6 # each entry has the fields documented below. 6 # each entry has the fields documented below.
7 # 7 #
8 # Unused fields can be specified as "-", or omitted if they 8 # Unused fields can be specified as "-", or omitted if they
9 # are the last field on the line. 9 # are the last field on the line.
10 # 10 #
11 # Lines starting with '#' are comments. 11 # Lines starting with '#' are comments.
12 # Blank lines are ignored. 12 # Blank lines are ignored.
13 # 13 #
14 # The options field takes the form: 14 # The options field takes the form:
15 # <board config name>[:comma separated config options] 15 # <board config name>[:comma separated config options]
16 # Each config option has the form (value defaults to "1"): 16 # Each config option has the form (value defaults to "1"):
17 # option[=value] 17 # option[=value]
18 # So if you have: 18 # So if you have:
19 # FOO:HAS_BAR,BAZ=64 19 # FOO:HAS_BAR,BAZ=64
20 # The file include/configs/FOO.h will be used, and these defines created: 20 # The file include/configs/FOO.h will be used, and these defines created:
21 # #define CONFIG_HAS_BAR 1 21 # #define CONFIG_HAS_BAR 1
22 # #define CONFIG_BAZ 64 22 # #define CONFIG_BAZ 64
23 # 23 #
24 # The list should be ordered according to the following fields, 24 # The list should be ordered according to the following fields,
25 # from most to least significant: 25 # from most to least significant:
26 # 26 #
27 # ARCH, CPU, SoC, Vendor, Target 27 # ARCH, CPU, SoC, Vendor, Target
28 # 28 #
29 # To keep the list sorted, use something like 29 # To keep the list sorted, use something like
30 # :.,$! sort -bdf -k2,2 -k3,3 -k6,6 -k5,5 -k1,1 30 # :.,$! sort -bdf -k2,2 -k3,3 -k6,6 -k5,5 -k1,1
31 # 31 #
32 # To reformat the list, use something like 32 # To reformat the list, use something like
33 # :.,$! column -t 33 # :.,$! column -t
34 # 34 #
35 # Target ARCH CPU Board name Vendor SoC Options 35 # Target ARCH CPU Board name Vendor SoC Options
36 ########################################################################################################### 36 ###########################################################################################################
37 37
38 integratorcp_cm1136 arm arm1136 integrator armltd - integratorcp 38 integratorcp_cm1136 arm arm1136 integrator armltd - integratorcp
39 qong arm arm1136 - davedenx mx31 39 qong arm arm1136 - davedenx mx31
40 mx31ads arm arm1136 - freescale mx31 40 mx31ads arm arm1136 - freescale mx31
41 imx31_litekit arm arm1136 - logicpd mx31 41 imx31_litekit arm arm1136 - logicpd mx31
42 imx31_phycore arm arm1136 - - mx31 42 imx31_phycore arm arm1136 - - mx31
43 imx31_phycore_eet arm arm1136 imx31_phycore - mx31 imx31_phycore:IMX31_PHYCORE_EET 43 imx31_phycore_eet arm arm1136 imx31_phycore - mx31 imx31_phycore:IMX31_PHYCORE_EET
44 mx31pdk_nand arm arm1136 mx31pdk freescale mx31 mx31pdk:NAND_U_BOOT 44 mx31pdk_nand arm arm1136 mx31pdk freescale mx31 mx31pdk:NAND_U_BOOT
45 mx31pdk arm arm1136 - freescale mx31 mx31pdk:SKIP_LOWLEVEL_INIT 45 mx31pdk arm arm1136 - freescale mx31 mx31pdk:SKIP_LOWLEVEL_INIT
46 mx35pdk arm arm1136 - freescale mx35 46 mx35pdk arm arm1136 - freescale mx35
47 omap2420h4 arm arm1136 - ti omap24xx 47 omap2420h4 arm arm1136 - ti omap24xx
48 tnetv107x_evm arm arm1176 tnetv107xevm ti tnetv107x 48 tnetv107x_evm arm arm1176 tnetv107xevm ti tnetv107x
49 integratorap_cm720t arm arm720t integrator armltd - integratorap 49 integratorap_cm720t arm arm720t integrator armltd - integratorap
50 integratorap_cm920t arm arm920t integrator armltd - integratorap 50 integratorap_cm920t arm arm920t integrator armltd - integratorap
51 integratorcp_cm920t arm arm920t integrator armltd - integratorcp 51 integratorcp_cm920t arm arm920t integrator armltd - integratorcp
52 a320evb arm arm920t - faraday a320 52 a320evb arm arm920t - faraday a320
53 at91rm9200ek arm arm920t at91rm9200ek atmel at91 at91rm9200ek 53 at91rm9200ek arm arm920t at91rm9200ek atmel at91 at91rm9200ek
54 at91rm9200ek_ram arm arm920t at91rm9200ek atmel at91 at91rm9200ek:RAMBOOT 54 at91rm9200ek_ram arm arm920t at91rm9200ek atmel at91 at91rm9200ek:RAMBOOT
55 eb_cpux9k2 arm arm920t - BuS at91 55 eb_cpux9k2 arm arm920t - BuS at91
56 cpuat91 arm arm920t cpuat91 eukrea at91 cpuat91 56 cpuat91 arm arm920t cpuat91 eukrea at91 cpuat91
57 cpuat91_ram arm arm920t cpuat91 eukrea at91 cpuat91:RAMBOOT 57 cpuat91_ram arm arm920t cpuat91 eukrea at91 cpuat91:RAMBOOT
58 mx1ads arm arm920t - - imx 58 mx1ads arm arm920t - - imx
59 scb9328 arm arm920t - - imx 59 scb9328 arm arm920t - - imx
60 cm4008 arm arm920t - - ks8695 60 cm4008 arm arm920t - - ks8695
61 cm41xx arm arm920t - - ks8695 61 cm41xx arm arm920t - - ks8695
62 VCMA9 arm arm920t vcma9 mpl s3c24x0 62 VCMA9 arm arm920t vcma9 mpl s3c24x0
63 smdk2410 arm arm920t - samsung s3c24x0 63 smdk2410 arm arm920t - samsung s3c24x0
64 omap1510inn arm arm925t - ti 64 omap1510inn arm arm925t - ti
65 integratorap_cm926ejs arm arm926ejs integrator armltd - integratorap 65 integratorap_cm926ejs arm arm926ejs integrator armltd - integratorap
66 integratorcp_cm926ejs arm arm926ejs integrator armltd - integratorcp 66 integratorcp_cm926ejs arm arm926ejs integrator armltd - integratorcp
67 versatileqemu arm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB 67 versatileqemu arm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_QEMU,ARCH_VERSATILE_PB
68 versatilepb arm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_PB 68 versatilepb arm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_PB
69 versatileab arm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_AB 69 versatileab arm arm926ejs versatile armltd versatile versatile:ARCH_VERSATILE_AB
70 aspenite arm arm926ejs - Marvell armada100 70 aspenite arm arm926ejs - Marvell armada100
71 gplugd arm arm926ejs - Marvell armada100 71 gplugd arm arm926ejs - Marvell armada100
72 afeb9260 arm arm926ejs - - at91 72 afeb9260 arm arm926ejs - - at91
73 at91sam9260ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_NANDFLASH 73 at91sam9260ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_NANDFLASH
74 at91sam9260ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS0 74 at91sam9260ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS0
75 at91sam9260ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS1 75 at91sam9260ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS1
76 at91sam9261ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_NANDFLASH 76 at91sam9261ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_NANDFLASH
77 at91sam9261ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS0 77 at91sam9261ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS0
78 at91sam9261ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS3 78 at91sam9261ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9261,SYS_USE_DATAFLASH_CS3
79 at91sam9263ek_nandflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_NANDFLASH 79 at91sam9263ek_nandflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_NANDFLASH
80 at91sam9263ek_dataflash_cs0 arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_DATAFLASH 80 at91sam9263ek_dataflash_cs0 arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_DATAFLASH
81 at91sam9263ek_dataflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_DATAFLASH 81 at91sam9263ek_dataflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_DATAFLASH
82 at91sam9263ek_norflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_NORFLASH 82 at91sam9263ek_norflash arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_NORFLASH
83 at91sam9263ek_norflash_boot arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_BOOT_NORFLASH 83 at91sam9263ek_norflash_boot arm arm926ejs at91sam9263ek atmel at91 at91sam9263ek:AT91SAM9263,SYS_USE_BOOT_NORFLASH
84 at91sam9g10ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_NANDFLASH 84 at91sam9g10ek_nandflash arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_NANDFLASH
85 at91sam9g10ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS0 85 at91sam9g10ek_dataflash_cs0 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS0
86 at91sam9g10ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS3 86 at91sam9g10ek_dataflash_cs3 arm arm926ejs at91sam9261ek atmel at91 at91sam9261ek:AT91SAM9G10,SYS_USE_DATAFLASH_CS3
87 at91sam9g20ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_NANDFLASH 87 at91sam9g20ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_NANDFLASH
88 at91sam9g20ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS0 88 at91sam9g20ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS0
89 at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS1 89 at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS1
90 at91sam9m10g45ek_nandflash arm arm926ejs at91sam9m10g45ek atmel at91 at91sam9m10g45ek:AT91SAM9M10G45,SYS_USE_NANDFLASH 90 at91sam9m10g45ek_nandflash arm arm926ejs at91sam9m10g45ek atmel at91 at91sam9m10g45ek:AT91SAM9M10G45,SYS_USE_NANDFLASH
91 at91sam9rlek_nandflash arm arm926ejs at91sam9rlek atmel at91 at91sam9rlek:AT91SAM9RL,SYS_USE_NANDFLASH 91 at91sam9rlek_nandflash arm arm926ejs at91sam9rlek atmel at91 at91sam9rlek:AT91SAM9RL,SYS_USE_NANDFLASH
92 at91sam9rlek_dataflash arm arm926ejs at91sam9rlek atmel at91 at91sam9rlek:AT91SAM9RL,SYS_USE_DATAFLASH 92 at91sam9rlek_dataflash arm arm926ejs at91sam9rlek atmel at91 at91sam9rlek:AT91SAM9RL,SYS_USE_DATAFLASH
93 at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH 93 at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH
94 at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0 94 at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0
95 at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1 95 at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1
96 snapper9260 arm arm926ejs - bluewater at91 snapper9260:AT91SAM9260 96 snapper9260 arm arm926ejs - bluewater at91 snapper9260:AT91SAM9260
97 snapper9g20 arm arm926ejs snapper9260 bluewater at91 snapper9260:AT91SAM9G20 97 snapper9g20 arm arm926ejs snapper9260 bluewater at91 snapper9260:AT91SAM9G20
98 sbc35_a9g20_nandflash arm arm926ejs sbc35_a9g20 calao at91 sbc35_a9g20:AT91SAM9G20,SYS_USE_NANDFLASH 98 sbc35_a9g20_nandflash arm arm926ejs sbc35_a9g20 calao at91 sbc35_a9g20:AT91SAM9G20,SYS_USE_NANDFLASH
99 sbc35_a9g20_eeprom arm arm926ejs sbc35_a9g20 calao at91 sbc35_a9g20:AT91SAM9G20,SYS_USE_EEPROM 99 sbc35_a9g20_eeprom arm arm926ejs sbc35_a9g20 calao at91 sbc35_a9g20:AT91SAM9G20,SYS_USE_EEPROM
100 tny_a9g20_nandflash arm arm926ejs tny_a9260 calao at91 tny_a9260:AT91SAM9G20,SYS_USE_NANDFLASH 100 tny_a9g20_nandflash arm arm926ejs tny_a9260 calao at91 tny_a9260:AT91SAM9G20,SYS_USE_NANDFLASH
101 tny_a9g20_eeprom arm arm926ejs tny_a9260 calao at91 tny_a9260:AT91SAM9G20,SYS_USE_EEPROM 101 tny_a9g20_eeprom arm arm926ejs tny_a9260 calao at91 tny_a9260:AT91SAM9G20,SYS_USE_EEPROM
102 tny_a9260_nandflash arm arm926ejs tny_a9260 calao at91 tny_a9260:AT91SAM9260,SYS_USE_NANDFLASH 102 tny_a9260_nandflash arm arm926ejs tny_a9260 calao at91 tny_a9260:AT91SAM9260,SYS_USE_NANDFLASH
103 tny_a9260_eeprom arm arm926ejs tny_a9260 calao at91 tny_a9260:AT91SAM9260,SYS_USE_EEPROM 103 tny_a9260_eeprom arm arm926ejs tny_a9260 calao at91 tny_a9260:AT91SAM9260,SYS_USE_EEPROM
104 cpu9260 arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260 104 cpu9260 arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260
105 cpu9260_nand arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260,NANDBOOT 105 cpu9260_nand arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260,NANDBOOT
106 cpu9260_128M arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260,CPU9260_128M 106 cpu9260_128M arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260,CPU9260_128M
107 cpu9260_nand_128M arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260,CPU9260_128M,NANDBOOT 107 cpu9260_nand_128M arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260,CPU9260_128M,NANDBOOT
108 cpu9G20 arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9G20 108 cpu9G20 arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9G20
109 cpu9G20_nand arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9G20,NANDBOOT 109 cpu9G20_nand arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9G20,NANDBOOT
110 cpu9G20_128M arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9G20,CPU9G20_128M 110 cpu9G20_128M arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9G20,CPU9G20_128M
111 cpu9G20_nand_128M arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9G20,CPU9G20_128M,NANDBOOT 111 cpu9G20_nand_128M arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9G20,CPU9G20_128M,NANDBOOT
112 top9000eval_xe arm arm926ejs top9000 emk at91 top9000:EVAL9000 112 top9000eval_xe arm arm926ejs top9000 emk at91 top9000:EVAL9000
113 top9000su_xe arm arm926ejs top9000 emk at91 top9000:SU9000 113 top9000su_xe arm arm926ejs top9000 emk at91 top9000:SU9000
114 meesc arm arm926ejs meesc esd at91 meesc:AT91SAM9263,SYS_USE_NANDFLASH 114 meesc arm arm926ejs meesc esd at91 meesc:AT91SAM9263,SYS_USE_NANDFLASH
115 meesc_dataflash arm arm926ejs meesc esd at91 meesc:AT91SAM9263,SYS_USE_DATAFLASH 115 meesc_dataflash arm arm926ejs meesc esd at91 meesc:AT91SAM9263,SYS_USE_DATAFLASH
116 otc570 arm arm926ejs otc570 esd at91 otc570:AT91SAM9263,SYS_USE_NANDFLASH 116 otc570 arm arm926ejs otc570 esd at91 otc570:AT91SAM9263,SYS_USE_NANDFLASH
117 otc570_dataflash arm arm926ejs otc570 esd at91 otc570:AT91SAM9263,SYS_USE_DATAFLASH 117 otc570_dataflash arm arm926ejs otc570 esd at91 otc570:AT91SAM9263,SYS_USE_DATAFLASH
118 pm9261 arm arm926ejs pm9261 ronetix at91 pm9261:AT91SAM9261 118 pm9261 arm arm926ejs pm9261 ronetix at91 pm9261:AT91SAM9261
119 pm9263 arm arm926ejs pm9263 ronetix at91 pm9263:AT91SAM9263 119 pm9263 arm arm926ejs pm9263 ronetix at91 pm9263:AT91SAM9263
120 pm9g45 arm arm926ejs pm9g45 ronetix at91 pm9g45:AT91SAM9G45 120 pm9g45 arm arm926ejs pm9g45 ronetix at91 pm9g45:AT91SAM9G45
121 da830evm arm arm926ejs da8xxevm davinci davinci 121 da830evm arm arm926ejs da8xxevm davinci davinci
122 da850evm arm arm926ejs da8xxevm davinci davinci 122 da850evm arm arm926ejs da8xxevm davinci davinci
123 hawkboard arm arm926ejs da8xxevm davinci davinci 123 hawkboard arm arm926ejs da8xxevm davinci davinci
124 hawkboard_nand arm arm926ejs da8xxevm davinci davinci hawkboard:NAND_U_BOOT 124 hawkboard_nand arm arm926ejs da8xxevm davinci davinci hawkboard:NAND_U_BOOT
125 hawkboard_uart arm arm926ejs da8xxevm davinci davinci hawkboard:UART_U_BOOT 125 hawkboard_uart arm arm926ejs da8xxevm davinci davinci hawkboard:UART_U_BOOT
126 ea20 arm arm926ejs ea20 davinci davinci 126 ea20 arm arm926ejs ea20 davinci davinci
127 davinci_dm355evm arm arm926ejs dm355evm davinci davinci 127 davinci_dm355evm arm arm926ejs dm355evm davinci davinci
128 davinci_dm355leopard arm arm926ejs dm355leopard davinci davinci 128 davinci_dm355leopard arm arm926ejs dm355leopard davinci davinci
129 davinci_dm365evm arm arm926ejs dm365evm davinci davinci 129 davinci_dm365evm arm arm926ejs dm365evm davinci davinci
130 davinci_dm6467evm arm arm926ejs dm6467evm davinci davinci 130 davinci_dm6467evm arm arm926ejs dm6467evm davinci davinci
131 davinci_dvevm arm arm926ejs dvevm davinci davinci 131 davinci_dvevm arm arm926ejs dvevm davinci davinci
132 davinci_schmoogie arm arm926ejs schmoogie davinci davinci 132 davinci_schmoogie arm arm926ejs schmoogie davinci davinci
133 davinci_sffsdr arm arm926ejs sffsdr davinci davinci 133 davinci_sffsdr arm arm926ejs sffsdr davinci davinci
134 davinci_sonata arm arm926ejs sonata davinci davinci 134 davinci_sonata arm arm926ejs sonata davinci davinci
135 km_kirkwood arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_DISABLE_PCI 135 km_kirkwood arm arm926ejs km_arm keymile kirkwood km_kirkwood:KM_DISABLE_PCI
136 km_kirkwood_pci arm arm926ejs km_arm keymile kirkwood km_kirkwood 136 km_kirkwood_pci arm arm926ejs km_arm keymile kirkwood km_kirkwood
137 mgcoge3un arm arm926ejs km_arm keymile kirkwood 137 mgcoge3un arm arm926ejs km_arm keymile kirkwood
138 portl2 arm arm926ejs km_arm keymile kirkwood 138 portl2 arm arm926ejs km_arm keymile kirkwood
139 inetspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:INETSPACE_V2 139 inetspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:INETSPACE_V2
140 netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_V2 140 netspace_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_V2
141 netspace_max_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_MAX_V2 141 netspace_max_v2 arm arm926ejs netspace_v2 LaCie kirkwood netspace_v2:NETSPACE_MAX_V2
142 guruplug arm arm926ejs - Marvell kirkwood 142 guruplug arm arm926ejs - Marvell kirkwood
143 mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood 143 mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood
144 openrd_base arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_BASE 144 openrd_base arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_BASE
145 openrd_client arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_CLIENT 145 openrd_client arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_CLIENT
146 openrd_ultimate arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_ULTIMATE 146 openrd_ultimate arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_ULTIMATE
147 rd6281a arm arm926ejs - Marvell kirkwood 147 rd6281a arm arm926ejs - Marvell kirkwood
148 sheevaplug arm arm926ejs - Marvell kirkwood 148 sheevaplug arm arm926ejs - Marvell kirkwood
149 dockstar arm arm926ejs - Seagate kirkwood 149 dockstar arm arm926ejs - Seagate kirkwood
150 jadecpu arm arm926ejs jadecpu syteco mb86r0x 150 jadecpu arm arm926ejs jadecpu syteco mb86r0x
151 mx25pdk arm arm926ejs mx25pdk freescale mx25 mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg 151 mx25pdk arm arm926ejs mx25pdk freescale mx25 mx25pdk:IMX_CONFIG=board/freescale/mx25pdk/imximage.cfg
152 tx25 arm arm926ejs tx25 karo mx25 152 tx25 arm arm926ejs tx25 karo mx25
153 zmx25 arm arm926ejs zmx25 syteco mx25 153 zmx25 arm arm926ejs zmx25 syteco mx25
154 imx27lite arm arm926ejs imx27lite logicpd mx27 154 imx27lite arm arm926ejs imx27lite logicpd mx27
155 magnesium arm arm926ejs imx27lite logicpd mx27 155 magnesium arm arm926ejs imx27lite logicpd mx27
156 nhk8815 arm arm926ejs nhk8815 st nomadik 156 nhk8815 arm arm926ejs nhk8815 st nomadik
157 nhk8815_onenand arm arm926ejs nhk8815 st nomadik nhk8815:BOOT_ONENAND 157 nhk8815_onenand arm arm926ejs nhk8815 st nomadik nhk8815:BOOT_ONENAND
158 omap5912osk arm arm926ejs - ti omap 158 omap5912osk arm arm926ejs - ti omap
159 edminiv2 arm arm926ejs - LaCie orion5x 159 edminiv2 arm arm926ejs - LaCie orion5x
160 dkb arm arm926ejs - Marvell pantheon 160 dkb arm arm926ejs - Marvell pantheon
161 integratorap_cm946es arm arm946es integrator armltd - integratorap 161 integratorap_cm946es arm arm946es integrator armltd - integratorap
162 integratorcp_cm946es arm arm946es integrator armltd - integratorcp 162 integratorcp_cm946es arm arm946es integrator armltd - integratorcp
163 ca9x4_ct_vxp arm armv7 vexpress armltd 163 ca9x4_ct_vxp arm armv7 vexpress armltd
164 efikamx arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/efikamx/imximage_mx.cfg 164 efikamx arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKAMX,IMX_CONFIG=board/efikamx/imximage_mx.cfg
165 efikasb arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/efikamx/imximage_sb.cfg 165 efikasb arm armv7 efikamx - mx5 efikamx:MACH_TYPE=MACH_TYPE_MX51_EFIKASB,IMX_CONFIG=board/efikamx/imximage_sb.cfg
166 mx51evk arm armv7 mx51evk freescale mx5 mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg 166 mx51evk arm armv7 mx51evk freescale mx5 mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg
167 mx53ard arm armv7 mx53ard freescale mx5 mx53ard:IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg 167 mx53ard arm armv7 mx53ard freescale mx5 mx53ard:IMX_CONFIG=board/freescale/mx53ard/imximage_dd3.cfg
168 mx53evk arm armv7 mx53evk freescale mx5 mx53evk:IMX_CONFIG=board/freescale/mx53evk/imximage.cfg 168 mx53evk arm armv7 mx53evk freescale mx5 mx53evk:IMX_CONFIG=board/freescale/mx53evk/imximage.cfg
169 mx53loco arm armv7 mx53loco freescale mx5 mx53loco:IMX_CONFIG=board/freescale/mx53loco/imximage.cfg 169 mx53loco arm armv7 mx53loco freescale mx5 mx53loco:IMX_CONFIG=board/freescale/mx53loco/imximage.cfg
170 mx53smd arm armv7 mx53smd freescale mx5 mx53smd:IMX_CONFIG=board/freescale/mx53smd/imximage.cfg 170 mx53smd arm armv7 mx53smd freescale mx5 mx53smd:IMX_CONFIG=board/freescale/mx53smd/imximage.cfg
171 vision2 arm armv7 vision2 ttcontrol mx5 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg 171 vision2 arm armv7 vision2 ttcontrol mx5 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg
172 cm_t35 arm armv7 cm_t35 - omap3 172 cm_t35 arm armv7 cm_t35 - omap3
173 omap3_overo arm armv7 overo - omap3 173 omap3_overo arm armv7 overo - omap3
174 omap3_pandora arm armv7 pandora - omap3 174 omap3_pandora arm armv7 pandora - omap3
175 igep0020 arm armv7 igep0020 isee omap3 175 igep0020 arm armv7 igep0020 isee omap3
176 igep0030 arm armv7 igep0030 isee omap3 176 igep0030 arm armv7 igep0030 isee omap3
177 am3517_crane arm armv7 am3517crane ti omap3 177 am3517_crane arm armv7 am3517crane ti omap3
178 am3517_evm arm armv7 am3517evm logicpd omap3 178 am3517_evm arm armv7 am3517evm logicpd omap3
179 dig297 arm armv7 dig297 comelit omap3 179 dig297 arm armv7 dig297 comelit omap3
180 omap3_zoom1 arm armv7 zoom1 logicpd omap3 180 omap3_zoom1 arm armv7 zoom1 logicpd omap3
181 omap3_zoom2 arm armv7 zoom2 logicpd omap3 181 omap3_zoom2 arm armv7 zoom2 logicpd omap3
182 omap3_beagle arm armv7 beagle ti omap3 182 omap3_beagle arm armv7 beagle ti omap3
183 omap3_evm arm armv7 evm ti omap3 183 omap3_evm arm armv7 evm ti omap3
184 omap3_sdp3430 arm armv7 sdp3430 ti omap3 184 omap3_sdp3430 arm armv7 sdp3430 ti omap3
185 devkit8000 arm armv7 devkit8000 timll omap3 185 devkit8000 arm armv7 devkit8000 timll omap3
186 omap4_panda arm armv7 panda ti omap4 186 omap4_panda arm armv7 panda ti omap4
187 omap4_sdp4430 arm armv7 sdp4430 ti omap4 187 omap4_sdp4430 arm armv7 sdp4430 ti omap4
188 s5p_goni arm armv7 goni samsung s5pc1xx 188 s5p_goni arm armv7 goni samsung s5pc1xx
189 smdkc100 arm armv7 smdkc100 samsung s5pc1xx 189 smdkc100 arm armv7 smdkc100 samsung s5pc1xx
190 origen arm armv7 origen samsung s5pc2xx 190 origen arm armv7 origen samsung s5pc2xx
191 s5pc210_universal arm armv7 universal_c210 samsung s5pc2xx 191 s5pc210_universal arm armv7 universal_c210 samsung s5pc2xx
192 smdkv310 arm armv7 smdkv310 samsung s5pc2xx 192 smdkv310 arm armv7 smdkv310 samsung s5pc2xx
193 harmony arm armv7 harmony nvidia tegra2 193 harmony arm armv7 harmony nvidia tegra2
194 seaboard arm armv7 seaboard nvidia tegra2 194 seaboard arm armv7 seaboard nvidia tegra2
195 u8500_href arm armv7 u8500 st-ericsson u8500 195 u8500_href arm armv7 u8500 st-ericsson u8500
196 actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2 196 actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2
197 actux1_8_16 arm ixp actux1 - - actux1:FLASH1X8 197 actux1_8_16 arm ixp actux1 - - actux1:FLASH1X8
198 actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB 198 actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB
199 actux1_8_32 arm ixp actux1 - - actux1:FLASH1X8,RAM_32MB 199 actux1_8_32 arm ixp actux1 - - actux1:FLASH1X8,RAM_32MB
200 actux2 arm ixp 200 actux2 arm ixp
201 actux3 arm ixp 201 actux3 arm ixp
202 actux4 arm ixp 202 actux4 arm ixp
203 dvlhost arm ixp 203 dvlhost arm ixp
204 balloon3 arm pxa 204 balloon3 arm pxa
205 cerf250 arm pxa 205 cerf250 arm pxa
206 colibri_pxa270 arm pxa 206 colibri_pxa270 arm pxa
207 cradle arm pxa 207 cradle arm pxa
208 csb226 arm pxa 208 csb226 arm pxa
209 innokom arm pxa 209 innokom arm pxa
210 lubbock arm pxa 210 lubbock arm pxa
211 palmld arm pxa 211 palmld arm pxa
212 palmtc arm pxa 212 palmtc arm pxa
213 pleb2 arm pxa 213 pleb2 arm pxa
214 polaris arm pxa trizepsiv - - trizepsiv:POLARIS 214 polaris arm pxa trizepsiv - - trizepsiv:POLARIS
215 pxa255_idp arm pxa 215 pxa255_idp arm pxa
216 trizepsiv arm pxa 216 trizepsiv arm pxa
217 vpac270_nor_128 arm pxa vpac270 - - vpac270:NOR,RAM_128M 217 vpac270_nor_128 arm pxa vpac270 - - vpac270:NOR,RAM_128M
218 vpac270_nor_256 arm pxa vpac270 - - vpac270:NOR,RAM_256M 218 vpac270_nor_256 arm pxa vpac270 - - vpac270:NOR,RAM_256M
219 vpac270_ond_256 arm pxa vpac270 - - vpac270:ONENAND,RAM_256M 219 vpac270_ond_256 arm pxa vpac270 - - vpac270:ONENAND,RAM_256M
220 xaeniax arm pxa 220 xaeniax arm pxa
221 xm250 arm pxa 221 xm250 arm pxa
222 zipitz2 arm pxa 222 zipitz2 arm pxa
223 jornada arm sa1100 223 jornada arm sa1100
224 atngw100 avr32 at32ap - atmel at32ap700x 224 atngw100 avr32 at32ap - atmel at32ap700x
225 atstk1002 avr32 at32ap atstk1000 atmel at32ap700x 225 atstk1002 avr32 at32ap atstk1000 atmel at32ap700x
226 atstk1003 avr32 at32ap atstk1000 atmel at32ap700x 226 atstk1003 avr32 at32ap atstk1000 atmel at32ap700x
227 atstk1004 avr32 at32ap atstk1000 atmel at32ap700x 227 atstk1004 avr32 at32ap atstk1000 atmel at32ap700x
228 atstk1006 avr32 at32ap atstk1000 atmel at32ap700x 228 atstk1006 avr32 at32ap atstk1000 atmel at32ap700x
229 favr-32-ezkit avr32 at32ap - earthlcd at32ap700x 229 favr-32-ezkit avr32 at32ap - earthlcd at32ap700x
230 grasshopper avr32 at32ap - in-circuit at32ap700x 230 grasshopper avr32 at32ap - in-circuit at32ap700x
231 mimc200 avr32 at32ap - mimc at32ap700x 231 mimc200 avr32 at32ap - mimc at32ap700x
232 hammerhead avr32 at32ap - miromico at32ap700x 232 hammerhead avr32 at32ap - miromico at32ap700x
233 bct-brettl2 blackfin blackfin 233 bct-brettl2 blackfin blackfin
234 bf506f-ezkit blackfin blackfin 234 bf506f-ezkit blackfin blackfin
235 bf518f-ezbrd blackfin blackfin 235 bf518f-ezbrd blackfin blackfin
236 bf525-ucr2 blackfin blackfin 236 bf525-ucr2 blackfin blackfin
237 bf526-ezbrd blackfin blackfin 237 bf526-ezbrd blackfin blackfin
238 bf527-ad7160-eval blackfin blackfin 238 bf527-ad7160-eval blackfin blackfin
239 bf527-ezkit blackfin blackfin 239 bf527-ezkit blackfin blackfin
240 bf527-ezkit-v2 blackfin blackfin bf527-ezkit - - bf527-ezkit:BF527_EZKIT_REV_2_1 240 bf527-ezkit-v2 blackfin blackfin bf527-ezkit - - bf527-ezkit:BF527_EZKIT_REV_2_1
241 bf527-sdp blackfin blackfin 241 bf527-sdp blackfin blackfin
242 bf533-ezkit blackfin blackfin 242 bf533-ezkit blackfin blackfin
243 bf533-stamp blackfin blackfin 243 bf533-stamp blackfin blackfin
244 bf537-minotaur blackfin blackfin 244 bf537-minotaur blackfin blackfin
245 bf537-pnav blackfin blackfin 245 bf537-pnav blackfin blackfin
246 bf537-srv1 blackfin blackfin 246 bf537-srv1 blackfin blackfin
247 bf537-stamp blackfin blackfin 247 bf537-stamp blackfin blackfin
248 bf538f-ezkit blackfin blackfin 248 bf538f-ezkit blackfin blackfin
249 bf548-ezkit blackfin blackfin 249 bf548-ezkit blackfin blackfin
250 bf561-acvilon blackfin blackfin 250 bf561-acvilon blackfin blackfin
251 bf561-ezkit blackfin blackfin 251 bf561-ezkit blackfin blackfin
252 blackstamp blackfin blackfin 252 blackstamp blackfin blackfin
253 blackvme blackfin blackfin 253 blackvme blackfin blackfin
254 cm-bf527 blackfin blackfin 254 cm-bf527 blackfin blackfin
255 cm-bf533 blackfin blackfin 255 cm-bf533 blackfin blackfin
256 cm-bf537e blackfin blackfin 256 cm-bf537e blackfin blackfin
257 cm-bf537u blackfin blackfin 257 cm-bf537u blackfin blackfin
258 cm-bf548 blackfin blackfin 258 cm-bf548 blackfin blackfin
259 cm-bf561 blackfin blackfin 259 cm-bf561 blackfin blackfin
260 dnp5370 blackfin blackfin 260 dnp5370 blackfin blackfin
261 ibf-dsp561 blackfin blackfin 261 ibf-dsp561 blackfin blackfin
262 ip04 blackfin blackfin 262 ip04 blackfin blackfin
263 tcm-bf518 blackfin blackfin 263 tcm-bf518 blackfin blackfin
264 tcm-bf537 blackfin blackfin 264 tcm-bf537 blackfin blackfin
265 eNET x86 x86 eNET - sc520 eNET:SYS_TEXT_BASE=0x38040000 265 eNET x86 x86 eNET - sc520 eNET:SYS_TEXT_BASE=0x38040000
266 eNET_SRAM x86 x86 eNET - sc520 eNET:SYS_TEXT_BASE=0x19000000 266 eNET_SRAM x86 x86 eNET - sc520 eNET:SYS_TEXT_BASE=0x19000000
267 idmr m68k mcf52x2 267 idmr m68k mcf52x2
268 TASREG m68k mcf52x2 tasreg esd 268 TASREG m68k mcf52x2 tasreg esd
269 M5208EVBE m68k mcf52x2 m5208evbe freescale 269 M5208EVBE m68k mcf52x2 m5208evbe freescale
270 M5249EVB m68k mcf52x2 m5249evb freescale 270 M5249EVB m68k mcf52x2 m5249evb freescale
271 M5253DEMO m68k mcf52x2 m5253demo freescale 271 M5253DEMO m68k mcf52x2 m5253demo freescale
272 M5253EVBE m68k mcf52x2 m5253evbe freescale 272 M5253EVBE m68k mcf52x2 m5253evbe freescale
273 M5271EVB m68k mcf52x2 m5271evb freescale 273 M5271EVB m68k mcf52x2 m5271evb freescale
274 M5272C3 m68k mcf52x2 m5272c3 freescale 274 M5272C3 m68k mcf52x2 m5272c3 freescale
275 M5275EVB m68k mcf52x2 m5275evb freescale 275 M5275EVB m68k mcf52x2 m5275evb freescale
276 M5282EVB m68k mcf52x2 m5282evb freescale 276 M5282EVB m68k mcf52x2 m5282evb freescale
277 M53017EVB m68k mcf532x m53017evb freescale 277 M53017EVB m68k mcf532x m53017evb freescale
278 EP2500 m68k mcf52x2 ep2500 Mercury 278 EP2500 m68k mcf52x2 ep2500 Mercury
279 microblaze-generic microblaze microblaze microblaze-generic xilinx 279 microblaze-generic microblaze microblaze microblaze-generic xilinx
280 dbau1000 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1000 280 dbau1000 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1000
281 dbau1100 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1100 281 dbau1100 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1100
282 dbau1500 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1500 282 dbau1500 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1500
283 dbau1550 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550 283 dbau1550 mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550
284 dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550 284 dbau1550_el mips mips32 dbau1x00 - au1x00 dbau1x00:DBAU1550
285 gth2 mips mips32 - - au1x00 285 gth2 mips mips32 - - au1x00
286 incaip mips mips32 incaip - incaip 286 incaip mips mips32 incaip - incaip
287 incaip_100MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=100000000 287 incaip_100MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=100000000
288 incaip_133MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=133000000 288 incaip_133MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=133000000
289 incaip_150MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=150000000 289 incaip_150MHz mips mips32 incaip - incaip incaip:CPU_CLOCK_RATE=150000000
290 pb1000 mips mips32 pb1x00 - au1x00 pb1x00:PB1000 290 pb1000 mips mips32 pb1x00 - au1x00 pb1x00:PB1000
291 qemu_mips mips mips32 qemu-mips - - qemu-mips 291 qemu_mips mips mips32 qemu-mips - - qemu-mips
292 tb0229 mips mips32 292 tb0229 mips mips32
293 vct_premium mips mips32 vct micronas - vct:VCT_PREMIUM 293 vct_premium mips mips32 vct micronas - vct:VCT_PREMIUM
294 vct_premium_small mips mips32 vct micronas - vct:VCT_PREMIUM,VCT_SMALL_IMAGE 294 vct_premium_small mips mips32 vct micronas - vct:VCT_PREMIUM,VCT_SMALL_IMAGE
295 vct_premium_onenand mips mips32 vct micronas - vct:VCT_PREMIUM,VCT_ONENAND 295 vct_premium_onenand mips mips32 vct micronas - vct:VCT_PREMIUM,VCT_ONENAND
296 vct_premium_onenand_small mips mips32 vct micronas - vct:VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE 296 vct_premium_onenand_small mips mips32 vct micronas - vct:VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE
297 vct_platinum mips mips32 vct micronas - vct:VCT_PLATINUM 297 vct_platinum mips mips32 vct micronas - vct:VCT_PLATINUM
298 vct_platinum_small mips mips32 vct micronas - vct:VCT_PLATINUM,VCT_SMALL_IMAGE 298 vct_platinum_small mips mips32 vct micronas - vct:VCT_PLATINUM,VCT_SMALL_IMAGE
299 vct_platinum_onenand mips mips32 vct micronas - vct:VCT_PLATINUM,VCT_ONENAND 299 vct_platinum_onenand mips mips32 vct micronas - vct:VCT_PLATINUM,VCT_ONENAND
300 vct_platinum_onenand_small mips mips32 vct micronas - vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE 300 vct_platinum_onenand_small mips mips32 vct micronas - vct:VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE
301 vct_platinumavc mips mips32 vct micronas - vct:VCT_PLATINUMAVC 301 vct_platinumavc mips mips32 vct micronas - vct:VCT_PLATINUMAVC
302 vct_platinumavc_small mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE 302 vct_platinumavc_small mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_SMALL_IMAGE
303 vct_platinumavc_onenand mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND 303 vct_platinumavc_onenand mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND
304 vct_platinumavc_onenand_small mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE 304 vct_platinumavc_onenand_small mips mips32 vct micronas - vct:VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE
305 qi_lb60 mips xburst qi_lb60 qi
305 nios2-generic nios2 nios2 nios2-generic altera 306 nios2-generic nios2 nios2 nios2-generic altera
306 PCI5441 nios2 nios2 pci5441 psyent 307 PCI5441 nios2 nios2 pci5441 psyent
307 PK1C20 nios2 nios2 pk1c20 psyent 308 PK1C20 nios2 nios2 pk1c20 psyent
308 EVB64260 powerpc 74xx_7xx evb64260 - - EVB64260 309 EVB64260 powerpc 74xx_7xx evb64260 - - EVB64260
309 EVB64260_750CX powerpc 74xx_7xx evb64260 - - EVB64260 310 EVB64260_750CX powerpc 74xx_7xx evb64260 - - EVB64260
310 P3G4 powerpc 74xx_7xx evb64260 311 P3G4 powerpc 74xx_7xx evb64260
311 PCIPPC2 powerpc 74xx_7xx pcippc2 312 PCIPPC2 powerpc 74xx_7xx pcippc2
312 PCIPPC6 powerpc 74xx_7xx pcippc2 313 PCIPPC6 powerpc 74xx_7xx pcippc2
313 ppmc7xx powerpc 74xx_7xx 314 ppmc7xx powerpc 74xx_7xx
314 ZUMA powerpc 74xx_7xx evb64260 315 ZUMA powerpc 74xx_7xx evb64260
315 BAB7xx powerpc 74xx_7xx bab7xx eltec 316 BAB7xx powerpc 74xx_7xx bab7xx eltec
316 ELPPC powerpc 74xx_7xx elppc eltec 317 ELPPC powerpc 74xx_7xx elppc eltec
317 CPCI750 powerpc 74xx_7xx cpci750 esd 318 CPCI750 powerpc 74xx_7xx cpci750 esd
318 mpc7448hpc2 powerpc 74xx_7xx mpc7448hpc2 freescale 319 mpc7448hpc2 powerpc 74xx_7xx mpc7448hpc2 freescale
319 DB64360 powerpc 74xx_7xx db64360 Marvell 320 DB64360 powerpc 74xx_7xx db64360 Marvell
320 DB64460 powerpc 74xx_7xx db64460 Marvell 321 DB64460 powerpc 74xx_7xx db64460 Marvell
321 p3m7448 powerpc 74xx_7xx p3mx prodrive - p3mx:P3M7448 322 p3m7448 powerpc 74xx_7xx p3mx prodrive - p3mx:P3M7448
322 p3m750 powerpc 74xx_7xx p3mx prodrive - p3mx:P3M750 323 p3m750 powerpc 74xx_7xx p3mx prodrive - p3mx:P3M750
323 pdm360ng powerpc mpc512x 324 pdm360ng powerpc mpc512x
324 aria powerpc mpc512x - davedenx 325 aria powerpc mpc512x - davedenx
325 mecp5123 powerpc mpc512x - esd 326 mecp5123 powerpc mpc512x - esd
326 mpc5121ads powerpc mpc512x mpc5121ads freescale 327 mpc5121ads powerpc mpc512x mpc5121ads freescale
327 mpc5121ads_rev2 powerpc mpc512x mpc5121ads freescale - mpc5121ads:MPC5121ADS_REV2 328 mpc5121ads_rev2 powerpc mpc512x mpc5121ads freescale - mpc5121ads:MPC5121ADS_REV2
328 cmi_mpc5xx powerpc mpc5xx cmi 329 cmi_mpc5xx powerpc mpc5xx cmi
329 PATI powerpc mpc5xx pati mpl 330 PATI powerpc mpc5xx pati mpl
330 a4m072 powerpc mpc5xxx a4m072 331 a4m072 powerpc mpc5xxx a4m072
331 BC3450 powerpc mpc5xxx bc3450 332 BC3450 powerpc mpc5xxx bc3450
332 canmb powerpc mpc5xxx 333 canmb powerpc mpc5xxx
333 cm5200 powerpc mpc5xxx 334 cm5200 powerpc mpc5xxx
334 digsy_mtc powerpc mpc5xxx digsy_mtc intercontrol 335 digsy_mtc powerpc mpc5xxx digsy_mtc intercontrol
335 digsy_mtc_RAMBOOT powerpc mpc5xxx digsy_mtc intercontrol - digsy_mtc:SYS_TEXT_BASE=0x00100000 336 digsy_mtc_RAMBOOT powerpc mpc5xxx digsy_mtc intercontrol - digsy_mtc:SYS_TEXT_BASE=0x00100000
336 digsy_mtc_rev5 powerpc mpc5xxx digsy_mtc intercontrol - digsy_mtc:DIGSY_REV5 337 digsy_mtc_rev5 powerpc mpc5xxx digsy_mtc intercontrol - digsy_mtc:DIGSY_REV5
337 digsy_mtc_rev5_RAMBOOT powerpc mpc5xxx digsy_mtc intercontrol - digsy_mtc:SYS_TEXT_BASE=0x00100000,DIGSY_REV5 338 digsy_mtc_rev5_RAMBOOT powerpc mpc5xxx digsy_mtc intercontrol - digsy_mtc:SYS_TEXT_BASE=0x00100000,DIGSY_REV5
338 galaxy5200 powerpc mpc5xxx galaxy5200 - - galaxy5200:galaxy5200 339 galaxy5200 powerpc mpc5xxx galaxy5200 - - galaxy5200:galaxy5200
339 galaxy5200_LOWBOOT powerpc mpc5xxx galaxy5200 - - galaxy5200:galaxy5200_LOWBOOT 340 galaxy5200_LOWBOOT powerpc mpc5xxx galaxy5200 - - galaxy5200:galaxy5200_LOWBOOT
340 icecube_5200 powerpc mpc5xxx icecube - - IceCube 341 icecube_5200 powerpc mpc5xxx icecube - - IceCube
341 icecube_5200_DDR powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR 342 icecube_5200_DDR powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR
342 icecube_5200_DDR_LOWBOOT powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000,MPC5200_DDR 343 icecube_5200_DDR_LOWBOOT powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000,MPC5200_DDR
343 icecube_5200_DDR_LOWBOOT08 powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000,MPC5200_DDR 344 icecube_5200_DDR_LOWBOOT08 powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000,MPC5200_DDR
344 icecube_5200_LOWBOOT powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF000000 345 icecube_5200_LOWBOOT powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF000000
345 icecube_5200_LOWBOOT08 powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000 346 icecube_5200_LOWBOOT08 powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000
346 inka4x0 powerpc mpc5xxx 347 inka4x0 powerpc mpc5xxx
347 ipek01 powerpc mpc5xxx 348 ipek01 powerpc mpc5xxx
348 jupiter powerpc mpc5xxx 349 jupiter powerpc mpc5xxx
349 Lite5200 powerpc mpc5xxx icecube - - IceCube 350 Lite5200 powerpc mpc5xxx icecube - - IceCube
350 lite5200b powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR,LITE5200B 351 lite5200b powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR,LITE5200B
351 lite5200b_LOWBOOT powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR,LITE5200B,SYS_TEXT_BASE=0xFF000000 352 lite5200b_LOWBOOT powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR,LITE5200B,SYS_TEXT_BASE=0xFF000000
352 lite5200b_PM powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR,LITE5200B,LITE5200B_PM 353 lite5200b_PM powerpc mpc5xxx icecube - - IceCube:MPC5200_DDR,LITE5200B,LITE5200B_PM
353 Lite5200_LOWBOOT powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF000000 354 Lite5200_LOWBOOT powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF000000
354 Lite5200_LOWBOOT08 powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000 355 Lite5200_LOWBOOT08 powerpc mpc5xxx icecube - - IceCube:SYS_TEXT_BASE=0xFF800000
355 mcc200 powerpc mpc5xxx mcc200 - - mcc200 356 mcc200 powerpc mpc5xxx mcc200 - - mcc200
356 mcc200_COM12 powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12 357 mcc200_COM12 powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12
357 mcc200_COM12_highboot powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000 358 mcc200_COM12_highboot powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000
358 mcc200_COM12_highboot_SDRAM powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM 359 mcc200_COM12_highboot_SDRAM powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM
359 mcc200_COM12_SDRAM powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12,MCC200_SDRAM 360 mcc200_COM12_SDRAM powerpc mpc5xxx mcc200 - - mcc200:CONSOLE_COM12,MCC200_SDRAM
360 mcc200_highboot powerpc mpc5xxx mcc200 - - mcc200:SYS_TEXT_BASE=0xFFF00000 361 mcc200_highboot powerpc mpc5xxx mcc200 - - mcc200:SYS_TEXT_BASE=0xFFF00000
361 mcc200_highboot_SDRAM powerpc mpc5xxx mcc200 - - mcc200:SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM 362 mcc200_highboot_SDRAM powerpc mpc5xxx mcc200 - - mcc200:SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM
362 mcc200_SDRAM powerpc mpc5xxx mcc200 - - mcc200:MCC200_SDRAM 363 mcc200_SDRAM powerpc mpc5xxx mcc200 - - mcc200:MCC200_SDRAM
363 motionpro powerpc mpc5xxx 364 motionpro powerpc mpc5xxx
364 munices powerpc mpc5xxx 365 munices powerpc mpc5xxx
365 o2dnt powerpc mpc5xxx 366 o2dnt powerpc mpc5xxx
366 PM520 powerpc mpc5xxx pm520 367 PM520 powerpc mpc5xxx pm520
367 PM520_DDR powerpc mpc5xxx pm520 - - PM520:MPC5200_DDR 368 PM520_DDR powerpc mpc5xxx pm520 - - PM520:MPC5200_DDR
368 PM520_ROMBOOT powerpc mpc5xxx pm520 - - PM520:BOOT_ROM 369 PM520_ROMBOOT powerpc mpc5xxx pm520 - - PM520:BOOT_ROM
369 PM520_ROMBOOT_DDR powerpc mpc5xxx pm520 - - PM520:MPC5200_DDR,BOOT_ROM 370 PM520_ROMBOOT_DDR powerpc mpc5xxx pm520 - - PM520:MPC5200_DDR,BOOT_ROM
370 prs200 powerpc mpc5xxx mcc200 - - mcc200:PRS200,MCC200_SDRAM 371 prs200 powerpc mpc5xxx mcc200 - - mcc200:PRS200,MCC200_SDRAM
371 prs200_DDR powerpc mpc5xxx mcc200 - - mcc200:PRS200 372 prs200_DDR powerpc mpc5xxx mcc200 - - mcc200:PRS200
372 prs200_highboot powerpc mpc5xxx mcc200 - - mcc200:PRS200,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM 373 prs200_highboot powerpc mpc5xxx mcc200 - - mcc200:PRS200,SYS_TEXT_BASE=0xFFF00000,MCC200_SDRAM
373 prs200_highboot_DDR powerpc mpc5xxx mcc200 - - mcc200:PRS200,SYS_TEXT_BASE=0xFFF00000 374 prs200_highboot_DDR powerpc mpc5xxx mcc200 - - mcc200:PRS200,SYS_TEXT_BASE=0xFFF00000
374 Total5200 powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=1 375 Total5200 powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=1
375 Total5200_lowboot powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=1,SYS_TEXT_BASE=0xFE000000 376 Total5200_lowboot powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=1,SYS_TEXT_BASE=0xFE000000
376 Total5200_Rev2 powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=2 377 Total5200_Rev2 powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=2
377 Total5200_Rev2_lowboot powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=2,SYS_TEXT_BASE=0xFE000000 378 Total5200_Rev2_lowboot powerpc mpc5xxx total5200 - - Total5200:TOTAL5200_REV=2,SYS_TEXT_BASE=0xFE000000
378 v38b powerpc mpc5xxx 379 v38b powerpc mpc5xxx
379 EVAL5200 powerpc mpc5xxx top5200 emk - TOP5200:EVAL5200 380 EVAL5200 powerpc mpc5xxx top5200 emk - TOP5200:EVAL5200
380 MINI5200 powerpc mpc5xxx top5200 emk - TOP5200:MINI5200 381 MINI5200 powerpc mpc5xxx top5200 emk - TOP5200:MINI5200
381 TOP5200 powerpc mpc5xxx top5200 emk - TOP5200:TOP5200 382 TOP5200 powerpc mpc5xxx top5200 emk - TOP5200:TOP5200
382 cpci5200 powerpc mpc5xxx - esd 383 cpci5200 powerpc mpc5xxx - esd
383 mecp5200 powerpc mpc5xxx - esd 384 mecp5200 powerpc mpc5xxx - esd
384 pf5200 powerpc mpc5xxx - esd 385 pf5200 powerpc mpc5xxx - esd
385 hmi1001 powerpc mpc5xxx - manroland 386 hmi1001 powerpc mpc5xxx - manroland
386 mucmc52 powerpc mpc5xxx - manroland 387 mucmc52 powerpc mpc5xxx - manroland
387 uc101 powerpc mpc5xxx - manroland 388 uc101 powerpc mpc5xxx - manroland
388 MVBC_P powerpc mpc5xxx mvbc_p matrix_vision - MVBC_P:MVBC_P 389 MVBC_P powerpc mpc5xxx mvbc_p matrix_vision - MVBC_P:MVBC_P
389 MVSMR powerpc mpc5xxx mvsmr matrix_vision 390 MVSMR powerpc mpc5xxx mvsmr matrix_vision
390 pcm030 powerpc mpc5xxx pcm030 phytec - pcm030 391 pcm030 powerpc mpc5xxx pcm030 phytec - pcm030
391 pcm030_LOWBOOT powerpc mpc5xxx pcm030 phytec - pcm030:SYS_TEXT_BASE=0xFF000000 392 pcm030_LOWBOOT powerpc mpc5xxx pcm030 phytec - pcm030:SYS_TEXT_BASE=0xFF000000
392 aev powerpc mpc5xxx tqm5200 tqc 393 aev powerpc mpc5xxx tqm5200 tqc
393 cam5200 powerpc mpc5xxx tqm5200 tqc - TQM5200:CAM5200,TQM5200S,TQM5200_B 394 cam5200 powerpc mpc5xxx tqm5200 tqc - TQM5200:CAM5200,TQM5200S,TQM5200_B
394 cam5200_niosflash powerpc mpc5xxx tqm5200 tqc - TQM5200:CAM5200,TQM5200S,TQM5200_B,CAM5200_NIOSFLASH 395 cam5200_niosflash powerpc mpc5xxx tqm5200 tqc - TQM5200:CAM5200,TQM5200S,TQM5200_B,CAM5200_NIOSFLASH
395 charon powerpc mpc5xxx tqm5200 tqc - charon 396 charon powerpc mpc5xxx tqm5200 tqc - charon
396 fo300 powerpc mpc5xxx tqm5200 tqc - TQM5200:FO300 397 fo300 powerpc mpc5xxx tqm5200 tqc - TQM5200:FO300
397 MiniFAP powerpc mpc5xxx tqm5200 tqc - TQM5200:MINIFAP 398 MiniFAP powerpc mpc5xxx tqm5200 tqc - TQM5200:MINIFAP
398 TB5200 powerpc mpc5xxx tqm5200 tqc 399 TB5200 powerpc mpc5xxx tqm5200 tqc
399 TB5200_B powerpc mpc5xxx tqm5200 tqc - TB5200:TQM5200_B 400 TB5200_B powerpc mpc5xxx tqm5200 tqc - TB5200:TQM5200_B
400 TQM5200 powerpc mpc5xxx tqm5200 tqc - TQM5200: 401 TQM5200 powerpc mpc5xxx tqm5200 tqc - TQM5200:
401 TQM5200_B powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B 402 TQM5200_B powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B
402 TQM5200_B_HIGHBOOT powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B,SYS_TEXT_BASE=0xFFF00000 403 TQM5200_B_HIGHBOOT powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B,SYS_TEXT_BASE=0xFFF00000
403 TQM5200S powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B,TQM5200S 404 TQM5200S powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B,TQM5200S
404 TQM5200S_HIGHBOOT powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B,TQM5200S,SYS_TEXT_BASE=0xFFF00000 405 TQM5200S_HIGHBOOT powerpc mpc5xxx tqm5200 tqc - TQM5200:TQM5200_B,TQM5200S,SYS_TEXT_BASE=0xFFF00000
405 TQM5200_STK100 powerpc mpc5xxx tqm5200 tqc - TQM5200:STK52XX_REV100 406 TQM5200_STK100 powerpc mpc5xxx tqm5200 tqc - TQM5200:STK52XX_REV100
406 Alaska8220 powerpc mpc8220 alaska 407 Alaska8220 powerpc mpc8220 alaska
407 sorcery powerpc mpc8220 408 sorcery powerpc mpc8220
408 Yukon8220 powerpc mpc8220 alaska 409 Yukon8220 powerpc mpc8220 alaska
409 A3000 powerpc mpc824x a3000 410 A3000 powerpc mpc824x a3000
410 BMW powerpc mpc824x bmw 411 BMW powerpc mpc824x bmw
411 CPC45 powerpc mpc824x cpc45 - - CPC45 412 CPC45 powerpc mpc824x cpc45 - - CPC45
412 CPC45_ROMBOOT powerpc mpc824x cpc45 - - CPC45:BOOT_ROM 413 CPC45_ROMBOOT powerpc mpc824x cpc45 - - CPC45:BOOT_ROM
413 CU824 powerpc mpc824x cu824 414 CU824 powerpc mpc824x cu824
414 eXalion powerpc mpc824x eXalion 415 eXalion powerpc mpc824x eXalion
415 HIDDEN_DRAGON powerpc mpc824x hidden_dragon 416 HIDDEN_DRAGON powerpc mpc824x hidden_dragon
416 linkstation_HGLAN powerpc mpc824x linkstation - - linkstation:HGLAN=1 417 linkstation_HGLAN powerpc mpc824x linkstation - - linkstation:HGLAN=1
417 MOUSSE powerpc mpc824x mousse 418 MOUSSE powerpc mpc824x mousse
418 MUSENKI powerpc mpc824x musenki 419 MUSENKI powerpc mpc824x musenki
419 MVBLUE powerpc mpc824x mvblue 420 MVBLUE powerpc mpc824x mvblue
420 OXC powerpc mpc824x oxc 421 OXC powerpc mpc824x oxc
421 PN62 powerpc mpc824x pn62 422 PN62 powerpc mpc824x pn62
422 Sandpoint8240 powerpc mpc824x sandpoint 423 Sandpoint8240 powerpc mpc824x sandpoint
423 Sandpoint8245 powerpc mpc824x sandpoint 424 Sandpoint8245 powerpc mpc824x sandpoint
424 utx8245 powerpc mpc824x 425 utx8245 powerpc mpc824x
425 debris powerpc mpc824x - etin 426 debris powerpc mpc824x - etin
426 kvme080 powerpc mpc824x - etin 427 kvme080 powerpc mpc824x - etin
427 atc powerpc mpc8260 428 atc powerpc mpc8260
428 cogent_mpc8260 powerpc mpc8260 cogent 429 cogent_mpc8260 powerpc mpc8260 cogent
429 CPU86 powerpc mpc8260 cpu86 - - CPU86 430 CPU86 powerpc mpc8260 cpu86 - - CPU86
430 CPU86_ROMBOOT powerpc mpc8260 cpu86 - - CPU86:BOOT_ROM 431 CPU86_ROMBOOT powerpc mpc8260 cpu86 - - CPU86:BOOT_ROM
431 CPU87 powerpc mpc8260 cpu87 - - CPU87 432 CPU87 powerpc mpc8260 cpu87 - - CPU87
432 CPU87_ROMBOOT powerpc mpc8260 cpu87 - - CPU87:BOOT_ROM 433 CPU87_ROMBOOT powerpc mpc8260 cpu87 - - CPU87:BOOT_ROM
433 ep8248 powerpc mpc8260 ep8248 434 ep8248 powerpc mpc8260 ep8248
434 ep8248E powerpc mpc8260 ep8248 - - ep8248 435 ep8248E powerpc mpc8260 ep8248 - - ep8248
435 ep8260 powerpc mpc8260 436 ep8260 powerpc mpc8260
436 ep82xxm powerpc mpc8260 437 ep82xxm powerpc mpc8260
437 gw8260 powerpc mpc8260 438 gw8260 powerpc mpc8260
438 hymod powerpc mpc8260 439 hymod powerpc mpc8260
439 IDS8247 powerpc mpc8260 ids8247 440 IDS8247 powerpc mpc8260 ids8247
440 IPHASE4539 powerpc mpc8260 iphase4539 441 IPHASE4539 powerpc mpc8260 iphase4539
441 ISPAN powerpc mpc8260 ispan 442 ISPAN powerpc mpc8260 ispan
442 ISPAN_REVB powerpc mpc8260 ispan - - ISPAN:SYS_REV_B 443 ISPAN_REVB powerpc mpc8260 ispan - - ISPAN:SYS_REV_B
443 muas3001 powerpc mpc8260 muas3001 444 muas3001 powerpc mpc8260 muas3001
444 muas3001_dev powerpc mpc8260 muas3001 - - muas3001:MUAS_DEV_BOARD 445 muas3001_dev powerpc mpc8260 muas3001 - - muas3001:MUAS_DEV_BOARD
445 PM825 powerpc mpc8260 pm826 - - PM826:PCI,SYS_TEXT_BASE=0xFF000000 446 PM825 powerpc mpc8260 pm826 - - PM826:PCI,SYS_TEXT_BASE=0xFF000000
446 PM825_BIGFLASH powerpc mpc8260 pm826 - - PM826:PCI,FLASH_32MB,SYS_TEXT_BASE=0x40000000 447 PM825_BIGFLASH powerpc mpc8260 pm826 - - PM826:PCI,FLASH_32MB,SYS_TEXT_BASE=0x40000000
447 PM825_ROMBOOT powerpc mpc8260 pm826 - - PM826:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000 448 PM825_ROMBOOT powerpc mpc8260 pm826 - - PM826:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000
448 PM825_ROMBOOT_BIGFLASH powerpc mpc8260 pm826 - - PM826:PCI,BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000 449 PM825_ROMBOOT_BIGFLASH powerpc mpc8260 pm826 - - PM826:PCI,BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000
449 PM826 powerpc mpc8260 pm826 - - PM826:SYS_TEXT_BASE=0xFF000000 450 PM826 powerpc mpc8260 pm826 - - PM826:SYS_TEXT_BASE=0xFF000000
450 PM826_BIGFLASH powerpc mpc8260 pm826 - - PM826:FLASH_32MB,SYS_TEXT_BASE=0x40000000 451 PM826_BIGFLASH powerpc mpc8260 pm826 - - PM826:FLASH_32MB,SYS_TEXT_BASE=0x40000000
451 PM826_ROMBOOT powerpc mpc8260 pm826 - - PM826:BOOT_ROM,SYS_TEXT_BASE=0xFF800000 452 PM826_ROMBOOT powerpc mpc8260 pm826 - - PM826:BOOT_ROM,SYS_TEXT_BASE=0xFF800000
452 PM826_ROMBOOT_BIGFLASH powerpc mpc8260 pm826 - - PM826:BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000 453 PM826_ROMBOOT_BIGFLASH powerpc mpc8260 pm826 - - PM826:BOOT_ROM,FLASH_32MB,SYS_TEXT_BASE=0xFF800000
453 PM828 powerpc mpc8260 pm828 - - PM828 454 PM828 powerpc mpc8260 pm828 - - PM828
454 PM828_PCI powerpc mpc8260 pm828 - - PM828:PCI 455 PM828_PCI powerpc mpc8260 pm828 - - PM828:PCI
455 PM828_ROMBOOT powerpc mpc8260 pm828 - - PM828:BOOT_ROM,SYS_TEXT_BASE=0xFF800000 456 PM828_ROMBOOT powerpc mpc8260 pm828 - - PM828:BOOT_ROM,SYS_TEXT_BASE=0xFF800000
456 PM828_ROMBOOT_PCI powerpc mpc8260 pm828 - - PM828:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000 457 PM828_ROMBOOT_PCI powerpc mpc8260 pm828 - - PM828:PCI,BOOT_ROM,SYS_TEXT_BASE=0xFF800000
457 ppmc8260 powerpc mpc8260 458 ppmc8260 powerpc mpc8260
458 Rattler powerpc mpc8260 rattler - - Rattler 459 Rattler powerpc mpc8260 rattler - - Rattler
459 Rattler8248 powerpc mpc8260 rattler - - Rattler:MPC8248 460 Rattler8248 powerpc mpc8260 rattler - - Rattler:MPC8248
460 RPXsuper powerpc mpc8260 rpxsuper 461 RPXsuper powerpc mpc8260 rpxsuper
461 rsdproto powerpc mpc8260 462 rsdproto powerpc mpc8260
462 sacsng powerpc mpc8260 463 sacsng powerpc mpc8260
463 ZPC1900 powerpc mpc8260 zpc1900 464 ZPC1900 powerpc mpc8260 zpc1900
464 MPC8260ADS powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS 465 MPC8260ADS powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS
465 MPC8260ADS_33MHz powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=33000000 466 MPC8260ADS_33MHz powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=33000000
466 MPC8260ADS_33MHz_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=33000000,SYS_TEXT_BASE=0xFF800000 467 MPC8260ADS_33MHz_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=33000000,SYS_TEXT_BASE=0xFF800000
467 MPC8260ADS_40MHz powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=40000000 468 MPC8260ADS_40MHz powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=40000000
468 MPC8260ADS_40MHz_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=40000000,SYS_TEXT_BASE=0xFF800000 469 MPC8260ADS_40MHz_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,8260_CLKIN=40000000,SYS_TEXT_BASE=0xFF800000
469 MPC8260ADS_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,SYS_TEXT_BASE=0xFF800000 470 MPC8260ADS_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8260ADS,SYS_TEXT_BASE=0xFF800000
470 MPC8266ADS powerpc mpc8260 mpc8266ads freescale 471 MPC8266ADS powerpc mpc8260 mpc8266ads freescale
471 MPC8272ADS powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8272ADS 472 MPC8272ADS powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8272ADS
472 MPC8272ADS_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8272ADS,SYS_TEXT_BASE=0xFF800000 473 MPC8272ADS_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_8272ADS,SYS_TEXT_BASE=0xFF800000
473 PQ2FADS powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS 474 PQ2FADS powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS
474 PQ2FADS_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,SYS_TEXT_BASE=0xFF800000 475 PQ2FADS_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,SYS_TEXT_BASE=0xFF800000
475 PQ2FADS-VR powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000 476 PQ2FADS-VR powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000
476 PQ2FADS-VR_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000,SYS_TEXT_BASE=0xFF800000 477 PQ2FADS-VR_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000,SYS_TEXT_BASE=0xFF800000
477 PQ2FADS-ZU powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS 478 PQ2FADS-ZU powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS
478 PQ2FADS-ZU_66MHz powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000 479 PQ2FADS-ZU_66MHz powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000
479 PQ2FADS-ZU_66MHz_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000,SYS_TEXT_BASE=0xFF800000 480 PQ2FADS-ZU_66MHz_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,8260_CLKIN=66000000,SYS_TEXT_BASE=0xFF800000
480 PQ2FADS-ZU_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,SYS_TEXT_BASE=0xFF800000 481 PQ2FADS-ZU_lowboot powerpc mpc8260 mpc8260ads freescale - MPC8260ADS:ADSTYPE=CONFIG_SYS_PQ2FADS,SYS_TEXT_BASE=0xFF800000
481 VoVPN-GW_66MHz powerpc mpc8260 vovpn-gw funkwerk - VoVPN-GW:CLKIN_66MHz 482 VoVPN-GW_66MHz powerpc mpc8260 vovpn-gw funkwerk - VoVPN-GW:CLKIN_66MHz
482 mgcoge powerpc mpc8260 km82xx keymile 483 mgcoge powerpc mpc8260 km82xx keymile
483 mgcoge3ne powerpc mpc8260 km82xx keymile 484 mgcoge3ne powerpc mpc8260 km82xx keymile
484 SCM powerpc mpc8260 - siemens 485 SCM powerpc mpc8260 - siemens
485 TQM8255_AA powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8255,300MHz 486 TQM8255_AA powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8255,300MHz
486 TQM8260_AA powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,200MHz 487 TQM8260_AA powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,200MHz
487 TQM8260_AB powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,200MHz,L2_CACHE,BUSMODE_60x 488 TQM8260_AB powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,200MHz,L2_CACHE,BUSMODE_60x
488 TQM8260_AC powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,200MHz,L2_CACHE,BUSMODE_60x 489 TQM8260_AC powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,200MHz,L2_CACHE,BUSMODE_60x
489 TQM8260_AD powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,BUSMODE_60x 490 TQM8260_AD powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,BUSMODE_60x
490 TQM8260_AE powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,266MHz 491 TQM8260_AE powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,266MHz
491 TQM8260_AF powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,BUSMODE_60x 492 TQM8260_AF powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,BUSMODE_60x
492 TQM8260_AG powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz 493 TQM8260_AG powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz
493 TQM8260_AH powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,L2_CACHE,BUSMODE_60x 494 TQM8260_AH powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,L2_CACHE,BUSMODE_60x
494 TQM8260_AI powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,BUSMODE_60x 495 TQM8260_AI powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8260,300MHz,BUSMODE_60x
495 TQM8265_AA powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8265,300MHz,BUSMODE_60x 496 TQM8265_AA powerpc mpc8260 tqm8260 tqc - TQM8260:MPC8265,300MHz,BUSMODE_60x
496 TQM8272 powerpc mpc8260 tqm8272 tqc 497 TQM8272 powerpc mpc8260 tqm8272 tqc
497 mpc8308_p1m powerpc mpc83xx 498 mpc8308_p1m powerpc mpc83xx
498 sbc8349 powerpc mpc83xx sbc8349 - - sbc8349 499 sbc8349 powerpc mpc83xx sbc8349 - - sbc8349
499 sbc8349_PCI_33 powerpc mpc83xx sbc8349 - - sbc8349:PCI,PCI_33M 500 sbc8349_PCI_33 powerpc mpc83xx sbc8349 - - sbc8349:PCI,PCI_33M
500 sbc8349_PCI_66 powerpc mpc83xx sbc8349 - - sbc8349:PCI,PCI_66M 501 sbc8349_PCI_66 powerpc mpc83xx sbc8349 - - sbc8349:PCI,PCI_66M
501 ve8313 powerpc mpc83xx ve8313 502 ve8313 powerpc mpc83xx ve8313
502 caddy2 powerpc mpc83xx vme8349 esd - vme8349:CADDY2 503 caddy2 powerpc mpc83xx vme8349 esd - vme8349:CADDY2
503 vme8349 powerpc mpc83xx vme8349 esd - vme8349 504 vme8349 powerpc mpc83xx vme8349 esd - vme8349
504 MPC8308RDB powerpc mpc83xx mpc8308rdb freescale 505 MPC8308RDB powerpc mpc83xx mpc8308rdb freescale
505 MPC8313ERDB_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ 506 MPC8313ERDB_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ
506 MPC8313ERDB_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ 507 MPC8313ERDB_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ
507 MPC8313ERDB_NAND_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ,NAND_U_BOOT 508 MPC8313ERDB_NAND_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ,NAND_U_BOOT
508 MPC8313ERDB_NAND_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ,NAND_U_BOOT 509 MPC8313ERDB_NAND_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ,NAND_U_BOOT
509 MPC8315ERDB powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB 510 MPC8315ERDB powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB
510 MPC8315ERDB_NAND powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB:NAND_U_BOOT 511 MPC8315ERDB_NAND powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB:NAND_U_BOOT
511 MPC8323ERDB powerpc mpc83xx mpc8323erdb freescale 512 MPC8323ERDB powerpc mpc83xx mpc8323erdb freescale
512 MPC832XEMDS powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS: 513 MPC832XEMDS powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:
513 MPC832XEMDS_ATM powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 514 MPC832XEMDS_ATM powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1
514 MPC832XEMDS_HOST_33 powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PCI,PCI_33M,PQ_MDS_PIB=1 515 MPC832XEMDS_HOST_33 powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PCI,PCI_33M,PQ_MDS_PIB=1
515 MPC832XEMDS_HOST_66 powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PCI,PCI_66M,PQ_MDS_PIB=1 516 MPC832XEMDS_HOST_66 powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PCI,PCI_66M,PQ_MDS_PIB=1
516 MPC832XEMDS_SLAVE powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PCI,PCISLAVE 517 MPC832XEMDS_SLAVE powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PCI,PCISLAVE
517 MPC8349EMDS powerpc mpc83xx mpc8349emds freescale 518 MPC8349EMDS powerpc mpc83xx mpc8349emds freescale
518 MPC8349ITX powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITX 519 MPC8349ITX powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITX
519 MPC8349ITXGP powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000 520 MPC8349ITXGP powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITXGP,SYS_TEXT_BASE=0xFE000000
520 MPC8349ITX_LOWBOOT powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITX,SYS_TEXT_BASE=0xFE000000 521 MPC8349ITX_LOWBOOT powerpc mpc83xx mpc8349itx freescale - MPC8349ITX:MPC8349ITX,SYS_TEXT_BASE=0xFE000000
521 MPC8360EMDS powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS: 522 MPC8360EMDS powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:
522 MPC8360EMDS_ATM powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1 523 MPC8360EMDS_ATM powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1
523 MPC8360EMDS_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_33M,PQ_MDS_PIB=1 524 MPC8360EMDS_HOST_33 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_33M,PQ_MDS_PIB=1
524 MPC8360EMDS_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_66M,PQ_MDS_PIB=1 525 MPC8360EMDS_HOST_66 powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCI_66M,PQ_MDS_PIB=1
525 MPC8360EMDS_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCISLAVE 526 MPC8360EMDS_SLAVE powerpc mpc83xx mpc8360emds freescale - MPC8360EMDS:PCI,PCISLAVE
526 MPC8360ERDK powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK 527 MPC8360ERDK powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK
527 MPC8360ERDK_33 powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK:CLKIN_33MHZ 528 MPC8360ERDK_33 powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK:CLKIN_33MHZ
528 MPC8360ERDK_66 powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK 529 MPC8360ERDK_66 powerpc mpc83xx mpc8360erdk freescale - MPC8360ERDK
529 MPC837XEMDS powerpc mpc83xx mpc837xemds freescale - MPC837XEMDS 530 MPC837XEMDS powerpc mpc83xx mpc837xemds freescale - MPC837XEMDS
530 MPC837XEMDS_HOST powerpc mpc83xx mpc837xemds freescale - MPC837XEMDS:PCI 531 MPC837XEMDS_HOST powerpc mpc83xx mpc837xemds freescale - MPC837XEMDS:PCI
531 MPC837XERDB powerpc mpc83xx mpc837xerdb freescale 532 MPC837XERDB powerpc mpc83xx mpc837xerdb freescale
532 kmeter1 powerpc mpc83xx km83xx keymile 533 kmeter1 powerpc mpc83xx km83xx keymile
533 MERGERBOX powerpc mpc83xx mergerbox matrix_vision 534 MERGERBOX powerpc mpc83xx mergerbox matrix_vision
534 MVBLM7 powerpc mpc83xx mvblm7 matrix_vision 535 MVBLM7 powerpc mpc83xx mvblm7 matrix_vision
535 SIMPC8313_LP powerpc mpc83xx simpc8313 sheldon - SIMPC8313:NAND_LP 536 SIMPC8313_LP powerpc mpc83xx simpc8313 sheldon - SIMPC8313:NAND_LP
536 SIMPC8313_SP powerpc mpc83xx simpc8313 sheldon - SIMPC8313:NAND_SP 537 SIMPC8313_SP powerpc mpc83xx simpc8313 sheldon - SIMPC8313:NAND_SP
537 kmsupx5 powerpc mpc83xx km83xx keymile 538 kmsupx5 powerpc mpc83xx km83xx keymile
538 suvd3 powerpc mpc83xx km83xx keymile 539 suvd3 powerpc mpc83xx km83xx keymile
539 TQM834x powerpc mpc83xx tqm834x tqc 540 TQM834x powerpc mpc83xx tqm834x tqc
540 tuda1 powerpc mpc83xx km83xx keymile 541 tuda1 powerpc mpc83xx km83xx keymile
541 tuxa1 powerpc mpc83xx km83xx keymile 542 tuxa1 powerpc mpc83xx km83xx keymile
542 sbc8540 powerpc mpc85xx sbc8560 - - SBC8540 543 sbc8540 powerpc mpc85xx sbc8560 - - SBC8540
543 sbc8540_33 powerpc mpc85xx sbc8560 - - SBC8540 544 sbc8540_33 powerpc mpc85xx sbc8560 - - SBC8540
544 sbc8540_66 powerpc mpc85xx sbc8560 - - SBC8540 545 sbc8540_66 powerpc mpc85xx sbc8560 - - SBC8540
545 sbc8548 powerpc mpc85xx sbc8548 - - sbc8548 546 sbc8548 powerpc mpc85xx sbc8548 - - sbc8548
546 sbc8548_PCI_33 powerpc mpc85xx sbc8548 - - sbc8548:PCI,33 547 sbc8548_PCI_33 powerpc mpc85xx sbc8548 - - sbc8548:PCI,33
547 sbc8548_PCI_33_PCIE powerpc mpc85xx sbc8548 - - sbc8548:PCI,33,PCIE 548 sbc8548_PCI_33_PCIE powerpc mpc85xx sbc8548 - - sbc8548:PCI,33,PCIE
548 sbc8548_PCI_66 powerpc mpc85xx sbc8548 - - sbc8548:PCI,66 549 sbc8548_PCI_66 powerpc mpc85xx sbc8548 - - sbc8548:PCI,66
549 sbc8548_PCI_66_PCIE powerpc mpc85xx sbc8548 - - sbc8548:PCI,66,PCIE 550 sbc8548_PCI_66_PCIE powerpc mpc85xx sbc8548 - - sbc8548:PCI,66,PCIE
550 sbc8560 powerpc mpc85xx sbc8560 - - sbc8560 551 sbc8560 powerpc mpc85xx sbc8560 - - sbc8560
551 sbc8560_33 powerpc mpc85xx sbc8560 - - sbc8560 552 sbc8560_33 powerpc mpc85xx sbc8560 - - sbc8560
552 sbc8560_66 powerpc mpc85xx sbc8560 - - sbc8560 553 sbc8560_66 powerpc mpc85xx sbc8560 - - sbc8560
553 socrates powerpc mpc85xx socrates 554 socrates powerpc mpc85xx socrates
554 MPC8536DS powerpc mpc85xx mpc8536ds freescale - MPC8536DS 555 MPC8536DS powerpc mpc85xx mpc8536ds freescale - MPC8536DS
555 MPC8536DS_36BIT powerpc mpc85xx mpc8536ds freescale - MPC8536DS:36BIT 556 MPC8536DS_36BIT powerpc mpc85xx mpc8536ds freescale - MPC8536DS:36BIT
556 MPC8536DS_NAND powerpc mpc85xx mpc8536ds freescale - MPC8536DS:NAND 557 MPC8536DS_NAND powerpc mpc85xx mpc8536ds freescale - MPC8536DS:NAND
557 MPC8536DS_SDCARD powerpc mpc85xx mpc8536ds freescale - MPC8536DS:SDCARD 558 MPC8536DS_SDCARD powerpc mpc85xx mpc8536ds freescale - MPC8536DS:SDCARD
558 MPC8536DS_SPIFLASH powerpc mpc85xx mpc8536ds freescale - MPC8536DS:SPIFLASH 559 MPC8536DS_SPIFLASH powerpc mpc85xx mpc8536ds freescale - MPC8536DS:SPIFLASH
559 MPC8540ADS powerpc mpc85xx mpc8540ads freescale 560 MPC8540ADS powerpc mpc85xx mpc8540ads freescale
560 MPC8541CDS powerpc mpc85xx mpc8541cds freescale - MPC8541CDS 561 MPC8541CDS powerpc mpc85xx mpc8541cds freescale - MPC8541CDS
561 MPC8541CDS_legacy powerpc mpc85xx mpc8541cds freescale - MPC8541CDS:LEGACY 562 MPC8541CDS_legacy powerpc mpc85xx mpc8541cds freescale - MPC8541CDS:LEGACY
562 MPC8544DS powerpc mpc85xx mpc8544ds freescale 563 MPC8544DS powerpc mpc85xx mpc8544ds freescale
563 MPC8548CDS powerpc mpc85xx mpc8548cds freescale - MPC8548CDS 564 MPC8548CDS powerpc mpc85xx mpc8548cds freescale - MPC8548CDS
564 MPC8548CDS_legacy powerpc mpc85xx mpc8548cds freescale - MPC8548CDS:LEGACY 565 MPC8548CDS_legacy powerpc mpc85xx mpc8548cds freescale - MPC8548CDS:LEGACY
565 MPC8555CDS powerpc mpc85xx mpc8555cds freescale - MPC8555CDS 566 MPC8555CDS powerpc mpc85xx mpc8555cds freescale - MPC8555CDS
566 MPC8555CDS_legacy powerpc mpc85xx mpc8555cds freescale - MPC8555CDS:LEGACY 567 MPC8555CDS_legacy powerpc mpc85xx mpc8555cds freescale - MPC8555CDS:LEGACY
567 MPC8560ADS powerpc mpc85xx mpc8560ads freescale 568 MPC8560ADS powerpc mpc85xx mpc8560ads freescale
568 MPC8568MDS powerpc mpc85xx mpc8568mds freescale 569 MPC8568MDS powerpc mpc85xx mpc8568mds freescale
569 MPC8569MDS powerpc mpc85xx mpc8569mds freescale - MPC8569MDS 570 MPC8569MDS powerpc mpc85xx mpc8569mds freescale - MPC8569MDS
570 MPC8569MDS_ATM powerpc mpc85xx mpc8569mds freescale - MPC8569MDS:ATM 571 MPC8569MDS_ATM powerpc mpc85xx mpc8569mds freescale - MPC8569MDS:ATM
571 MPC8569MDS_NAND powerpc mpc85xx mpc8569mds freescale - MPC8569MDS:NAND 572 MPC8569MDS_NAND powerpc mpc85xx mpc8569mds freescale - MPC8569MDS:NAND
572 MPC8572DS powerpc mpc85xx mpc8572ds freescale - MPC8572DS 573 MPC8572DS powerpc mpc85xx mpc8572ds freescale - MPC8572DS
573 MPC8572DS_36BIT powerpc mpc85xx mpc8572ds freescale - MPC8572DS:36BIT 574 MPC8572DS_36BIT powerpc mpc85xx mpc8572ds freescale - MPC8572DS:36BIT
574 MPC8572DS_NAND powerpc mpc85xx mpc8572ds freescale - MPC8572DS:NAND 575 MPC8572DS_NAND powerpc mpc85xx mpc8572ds freescale - MPC8572DS:NAND
575 P1010RDB_NOR powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB 576 P1010RDB_NOR powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB
576 P1010RDB_NOR_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,SECURE_BOOT 577 P1010RDB_NOR_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,SECURE_BOOT
577 P1010RDB_36BIT_NOR powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT 578 P1010RDB_36BIT_NOR powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT
578 P1010RDB_36BIT_NOR_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,SECURE_BOOT 579 P1010RDB_36BIT_NOR_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,SECURE_BOOT
579 P1010RDB_NAND powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,NAND 580 P1010RDB_NAND powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,NAND
580 P1010RDB_NAND_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,NAND_SECBOOT,SECURE_BOOT 581 P1010RDB_NAND_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,NAND_SECBOOT,SECURE_BOOT
581 P1010RDB_36BIT_NAND powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,NAND 582 P1010RDB_36BIT_NAND powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,NAND
582 P1010RDB_36BIT_NAND_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,NAND_SECBOOT,SECURE_BOOT 583 P1010RDB_36BIT_NAND_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,NAND_SECBOOT,SECURE_BOOT
583 P1010RDB_SDCARD powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,SDCARD 584 P1010RDB_SDCARD powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,SDCARD
584 P1010RDB_SPIFLASH powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,SPIFLASH 585 P1010RDB_SPIFLASH powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,SPIFLASH
585 P1010RDB_SPIFLASH_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,SPIFLASH,SECURE_BOOT 586 P1010RDB_SPIFLASH_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,SPIFLASH,SECURE_BOOT
586 P1010RDB_36BIT_SDCARD powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,SDCARD 587 P1010RDB_36BIT_SDCARD powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,SDCARD
587 P1010RDB_36BIT_SPIFLASH powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,SPIFLASH 588 P1010RDB_36BIT_SPIFLASH powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,SPIFLASH
588 P1010RDB_36BIT_SPIFLASH_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,SPIFLASH,SECURE_BOOT 589 P1010RDB_36BIT_SPIFLASH_SECBOOT powerpc mpc85xx p1010rdb freescale - P1010RDB:P1010RDB,36BIT,SPIFLASH,SECURE_BOOT
589 P1011RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB 590 P1011RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB
590 P1011RDB_36BIT powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,36BIT 591 P1011RDB_36BIT powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,36BIT
591 P1011RDB_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,36BIT,SDCARD 592 P1011RDB_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,36BIT,SDCARD
592 P1011RDB_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,36BIT,SPIFLASH 593 P1011RDB_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,36BIT,SPIFLASH
593 P1011RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,NAND 594 P1011RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,NAND
594 P1011RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,SDCARD 595 P1011RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,SDCARD
595 P1011RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,SPIFLASH 596 P1011RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1011RDB,SPIFLASH
596 P1020MBG-PC powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020MBG 597 P1020MBG-PC powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020MBG
597 P1020MBG-PC_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020MBG,36BIT 598 P1020MBG-PC_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020MBG,36BIT
598 P1020MBG-PC_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020MBG,SDCARD 599 P1020MBG-PC_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020MBG,SDCARD
599 P1020MBG-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020MBG,SDCARD,36BIT 600 P1020MBG-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020MBG,SDCARD,36BIT
600 P1020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB 601 P1020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB
601 P1020RDB_36BIT powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,36BIT 602 P1020RDB_36BIT powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,36BIT
602 P1020RDB_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,36BIT,SDCARD 603 P1020RDB_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,36BIT,SDCARD
603 P1020RDB_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,36BIT,SPIFLASH 604 P1020RDB_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,36BIT,SPIFLASH
604 P1020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,NAND 605 P1020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,NAND
605 P1020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SDCARD 606 P1020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SDCARD
606 P1020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SPIFLASH 607 P1020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P1020RDB,SPIFLASH
607 P1020RDB-PC powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB 608 P1020RDB-PC powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB
608 P1020RDB-PC_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,NAND 609 P1020RDB-PC_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,NAND
609 P1020RDB-PC_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,SDCARD 610 P1020RDB-PC_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,SDCARD
610 P1020RDB-PC_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,SPIFLASH 611 P1020RDB-PC_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,SPIFLASH
611 P1020RDB-PC_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,36BIT 612 P1020RDB-PC_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,36BIT
612 P1020RDB-PC_36BIT_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,36BIT,NAND 613 P1020RDB-PC_36BIT_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,36BIT,NAND
613 P1020RDB-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,36BIT,SDCARD 614 P1020RDB-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,36BIT,SDCARD
614 P1020RDB-PC_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,36BIT,SPIFLASH 615 P1020RDB-PC_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020RDB,36BIT,SPIFLASH
615 P1020UTM-PC powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020UTM 616 P1020UTM-PC powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020UTM
616 P1020UTM-PC_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020UTM,SDCARD 617 P1020UTM-PC_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020UTM,SDCARD
617 P1020UTM-PC_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020UTM,36BIT 618 P1020UTM-PC_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020UTM,36BIT
618 P1020UTM-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020UTM,36BIT,SDCARD 619 P1020UTM-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1020UTM,36BIT,SDCARD
619 P1021RDB-PC powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB 620 P1021RDB-PC powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB
620 P1021RDB-PC_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,NAND 621 P1021RDB-PC_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,NAND
621 P1021RDB-PC_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,SDCARD 622 P1021RDB-PC_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,SDCARD
622 P1021RDB-PC_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,SPIFLASH 623 P1021RDB-PC_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,SPIFLASH
623 P1021RDB-PC_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,36BIT 624 P1021RDB-PC_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,36BIT
624 P1021RDB-PC_36BIT_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,36BIT,NAND 625 P1021RDB-PC_36BIT_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,36BIT,NAND
625 P1021RDB-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,36BIT,SDCARD 626 P1021RDB-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,36BIT,SDCARD
626 P1021RDB-PC_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,36BIT,SPIFLASH 627 P1021RDB-PC_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1021RDB,36BIT,SPIFLASH
627 P1022DS powerpc mpc85xx p1022ds freescale 628 P1022DS powerpc mpc85xx p1022ds freescale
628 P1022DS_36BIT powerpc mpc85xx p1022ds freescale - P1022DS:36BIT 629 P1022DS_36BIT powerpc mpc85xx p1022ds freescale - P1022DS:36BIT
629 P1023RDS powerpc mpc85xx p1023rds freescale - P1023RDS 630 P1023RDS powerpc mpc85xx p1023rds freescale - P1023RDS
630 P1023RDS_NAND powerpc mpc85xx p1023rds freescale - P1023RDS:NAND 631 P1023RDS_NAND powerpc mpc85xx p1023rds freescale - P1023RDS:NAND
631 P1024RDB powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1024RDB 632 P1024RDB powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1024RDB
632 P1024RDB_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1024RDB,36BIT 633 P1024RDB_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1024RDB,36BIT
633 P1024RDB_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1024RDB,NAND 634 P1024RDB_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1024RDB,NAND
634 P1024RDB_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1024RDB,SDCARD 635 P1024RDB_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1024RDB,SDCARD
635 P1024RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1024RDB,SPIFLASH 636 P1024RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1024RDB,SPIFLASH
636 P1025RDB powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1025RDB 637 P1025RDB powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1025RDB
637 P1025RDB_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1025RDB,36BIT 638 P1025RDB_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1025RDB,36BIT
638 P1025RDB_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1025RDB,NAND 639 P1025RDB_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1025RDB,NAND
639 P1025RDB_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1025RDB,SDCARD 640 P1025RDB_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1025RDB,SDCARD
640 P1025RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1025RDB,SPIFLASH 641 P1025RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P1025RDB,SPIFLASH
641 P2010RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB 642 P2010RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB
642 P2010RDB_36BIT powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,36BIT 643 P2010RDB_36BIT powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,36BIT
643 P2010RDB_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,36BIT,SDCARD 644 P2010RDB_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,36BIT,SDCARD
644 P2010RDB_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,36BIT,SPIFLASH 645 P2010RDB_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,36BIT,SPIFLASH
645 P2010RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,NAND 646 P2010RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,NAND
646 P2010RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,SDCARD 647 P2010RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,SDCARD
647 P2010RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,SPIFLASH 648 P2010RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2010RDB,SPIFLASH
648 P2020DS powerpc mpc85xx p2020ds freescale 649 P2020DS powerpc mpc85xx p2020ds freescale
649 P2020DS_36BIT powerpc mpc85xx p2020ds freescale - P2020DS:36BIT 650 P2020DS_36BIT powerpc mpc85xx p2020ds freescale - P2020DS:36BIT
650 P2020DS_DDR2 powerpc mpc85xx p2020ds freescale - P2020DS:DDR2 651 P2020DS_DDR2 powerpc mpc85xx p2020ds freescale - P2020DS:DDR2
651 P2020DS_SDCARD powerpc mpc85xx p2020ds freescale - P2020DS:SDCARD 652 P2020DS_SDCARD powerpc mpc85xx p2020ds freescale - P2020DS:SDCARD
652 P2020DS_SPIFLASH powerpc mpc85xx p2020ds freescale - P2020DS:SPIFLASH 653 P2020DS_SPIFLASH powerpc mpc85xx p2020ds freescale - P2020DS:SPIFLASH
653 P2020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB 654 P2020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB
654 P2020RDB_36BIT powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,36BIT 655 P2020RDB_36BIT powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,36BIT
655 P2020RDB_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,36BIT,SDCARD 656 P2020RDB_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,36BIT,SDCARD
656 P2020RDB_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,36BIT,SPIFLASH 657 P2020RDB_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,36BIT,SPIFLASH
657 P2020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,NAND 658 P2020RDB_NAND powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,NAND
658 P2020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,SDCARD 659 P2020RDB_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,SDCARD
659 P2020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,SPIFLASH 660 P2020RDB_SPIFLASH powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,SPIFLASH
660 P2020RDB-PC powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB 661 P2020RDB-PC powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB
661 P2020RDB-PC_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,NAND 662 P2020RDB-PC_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,NAND
662 P2020RDB-PC_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,SDCARD 663 P2020RDB-PC_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,SDCARD
663 P2020RDB-PC_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,SPIFLASH 664 P2020RDB-PC_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,SPIFLASH
664 P2020RDB-PC_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,36BIT 665 P2020RDB-PC_36BIT powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,36BIT
665 P2020RDB-PC_36BIT_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,36BIT,NAND 666 P2020RDB-PC_36BIT_NAND powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,36BIT,NAND
666 P2020RDB-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,36BIT,SDCARD 667 P2020RDB-PC_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,36BIT,SDCARD
667 P2020RDB-PC_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,36BIT,SPIFLASH 668 P2020RDB-PC_36BIT_SPIFLASH powerpc mpc85xx p1_p2_rdb_pc freescale - p1_p2_rdb_pc:P2020RDB,36BIT,SPIFLASH
668 P2041RDB powerpc mpc85xx p2041rdb freescale 669 P2041RDB powerpc mpc85xx p2041rdb freescale
669 P2041RDB_SDCARD powerpc mpc85xx p2041rdb freescale - P2041RDB:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000 670 P2041RDB_SDCARD powerpc mpc85xx p2041rdb freescale - P2041RDB:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
670 P2041RDB_SPIFLASH powerpc mpc85xx p2041rdb freescale - P2041RDB:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 671 P2041RDB_SPIFLASH powerpc mpc85xx p2041rdb freescale - P2041RDB:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
671 P3041DS powerpc mpc85xx corenet_ds freescale 672 P3041DS powerpc mpc85xx corenet_ds freescale
672 P3041DS_NAND powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000 673 P3041DS_NAND powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
673 P3041DS_SDCARD powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000 674 P3041DS_SDCARD powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
674 P3041DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P3041DS:SECURE_BOOT 675 P3041DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P3041DS:SECURE_BOOT
675 P3041DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 676 P3041DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P3041DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
676 P4080DS powerpc mpc85xx corenet_ds freescale 677 P4080DS powerpc mpc85xx corenet_ds freescale
677 P4080DS_SDCARD powerpc mpc85xx corenet_ds freescale - P4080DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000 678 P4080DS_SDCARD powerpc mpc85xx corenet_ds freescale - P4080DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
678 P4080DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P4080DS:SECURE_BOOT 679 P4080DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P4080DS:SECURE_BOOT
679 P4080DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P4080DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 680 P4080DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P4080DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
680 P5020DS powerpc mpc85xx corenet_ds freescale 681 P5020DS powerpc mpc85xx corenet_ds freescale
681 P5020DS_NAND powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000 682 P5020DS_NAND powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,NAND,SYS_TEXT_BASE=0xFFF80000
682 P5020DS_SDCARD powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000 683 P5020DS_SDCARD powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,SDCARD,SYS_TEXT_BASE=0xFFF80000
683 P5020DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P5020DS:SECURE_BOOT 684 P5020DS_SECURE_BOOT powerpc mpc85xx corenet_ds freescale - P5020DS:SECURE_BOOT
684 P5020DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000 685 P5020DS_SPIFLASH powerpc mpc85xx corenet_ds freescale - P5020DS:RAMBOOT_PBL,SPIFLASH,SYS_TEXT_BASE=0xFFF80000
685 mpq101 powerpc mpc85xx mpq101 mercury - mpq101 686 mpq101 powerpc mpc85xx mpq101 mercury - mpq101
686 stxgp3 powerpc mpc85xx stxgp3 stx 687 stxgp3 powerpc mpc85xx stxgp3 stx
687 stxssa powerpc mpc85xx stxssa stx - stxssa 688 stxssa powerpc mpc85xx stxssa stx - stxssa
688 stxssa_4M powerpc mpc85xx stxssa stx - stxssa:STXSSA_4M 689 stxssa_4M powerpc mpc85xx stxssa stx - stxssa:STXSSA_4M
689 TQM8540 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8540,TQM8540=y,HOSTNAME=tqm8540,BOARDNAME="TQM8540" 690 TQM8540 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8540,TQM8540=y,HOSTNAME=tqm8540,BOARDNAME="TQM8540"
690 TQM8541 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8541,TQM8541=y,HOSTNAME=tqm8541,BOARDNAME="TQM8541" 691 TQM8541 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8541,TQM8541=y,HOSTNAME=tqm8541,BOARDNAME="TQM8541"
691 TQM8548 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8548,TQM8548=y,HOSTNAME=tqm8548,BOARDNAME="TQM8548" 692 TQM8548 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8548,TQM8548=y,HOSTNAME=tqm8548,BOARDNAME="TQM8548"
692 TQM8548_AG powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8548,TQM8548_AG=y,HOSTNAME=tqm8485,BOARDNAME="TQM8548_AG" 693 TQM8548_AG powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8548,TQM8548_AG=y,HOSTNAME=tqm8485,BOARDNAME="TQM8548_AG"
693 TQM8548_BE powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8548,TQM8548_BE=y,HOSTNAME=tqm8548,BOARDNAME="TQM8548_BE" 694 TQM8548_BE powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8548,TQM8548_BE=y,HOSTNAME=tqm8548,BOARDNAME="TQM8548_BE"
694 TQM8555 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8555,TQM8555=y,HOSTNAME=tqm8555,BOARDNAME="TQM8555" 695 TQM8555 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8555,TQM8555=y,HOSTNAME=tqm8555,BOARDNAME="TQM8555"
695 TQM8560 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8560,TQM8560=y,HOSTNAME=tqm8560,BOARDNAME="TQM8560" 696 TQM8560 powerpc mpc85xx tqm85xx tqc - TQM85xx:MPC8560,TQM8560=y,HOSTNAME=tqm8560,BOARDNAME="TQM8560"
696 xpedite520x powerpc mpc85xx - xes 697 xpedite520x powerpc mpc85xx - xes
697 xpedite537x powerpc mpc85xx - xes 698 xpedite537x powerpc mpc85xx - xes
698 xpedite550x powerpc mpc85xx - xes 699 xpedite550x powerpc mpc85xx - xes
699 sbc8641d powerpc mpc86xx 700 sbc8641d powerpc mpc86xx
700 MPC8610HPCD powerpc mpc86xx mpc8610hpcd freescale 701 MPC8610HPCD powerpc mpc86xx mpc8610hpcd freescale
701 MPC8641HPCN powerpc mpc86xx mpc8641hpcn freescale - MPC8641HPCN 702 MPC8641HPCN powerpc mpc86xx mpc8641hpcn freescale - MPC8641HPCN
702 MPC8641HPCN_36BIT powerpc mpc86xx mpc8641hpcn freescale - MPC8641HPCN:PHYS_64BIT 703 MPC8641HPCN_36BIT powerpc mpc86xx mpc8641hpcn freescale - MPC8641HPCN:PHYS_64BIT
703 xpedite517x powerpc mpc86xx - xes 704 xpedite517x powerpc mpc86xx - xes
704 Adder powerpc mpc8xx adder 705 Adder powerpc mpc8xx adder
705 Adder87x powerpc mpc8xx adder - - Adder 706 Adder87x powerpc mpc8xx adder - - Adder
706 AdderII powerpc mpc8xx adder - - Adder:MPC852T 707 AdderII powerpc mpc8xx adder - - Adder:MPC852T
707 AdderUSB powerpc mpc8xx adder - - Adder 708 AdderUSB powerpc mpc8xx adder - - Adder
708 ADS860 powerpc mpc8xx fads 709 ADS860 powerpc mpc8xx fads
709 c2mon powerpc mpc8xx 710 c2mon powerpc mpc8xx
710 cogent_mpc8xx powerpc mpc8xx cogent 711 cogent_mpc8xx powerpc mpc8xx cogent
711 EP88x powerpc mpc8xx ep88x 712 EP88x powerpc mpc8xx ep88x
712 ESTEEM192E powerpc mpc8xx esteem192e 713 ESTEEM192E powerpc mpc8xx esteem192e
713 ETX094 powerpc mpc8xx etx094 714 ETX094 powerpc mpc8xx etx094
714 FADS823 powerpc mpc8xx fads 715 FADS823 powerpc mpc8xx fads
715 FADS850SAR powerpc mpc8xx fads 716 FADS850SAR powerpc mpc8xx fads
716 FADS860T powerpc mpc8xx fads 717 FADS860T powerpc mpc8xx fads
717 FLAGADM powerpc mpc8xx flagadm 718 FLAGADM powerpc mpc8xx flagadm
718 GEN860T powerpc mpc8xx gen860t 719 GEN860T powerpc mpc8xx gen860t
719 GEN860T_SC powerpc mpc8xx gen860t - - GEN860T:SC 720 GEN860T_SC powerpc mpc8xx gen860t - - GEN860T:SC
720 GENIETV powerpc mpc8xx genietv 721 GENIETV powerpc mpc8xx genietv
721 hermes powerpc mpc8xx 722 hermes powerpc mpc8xx
722 ICU862 powerpc mpc8xx icu862 723 ICU862 powerpc mpc8xx icu862
723 ICU862_100MHz powerpc mpc8xx icu862 - - ICU862:100MHz 724 ICU862_100MHz powerpc mpc8xx icu862 - - ICU862:100MHz
724 IP860 powerpc mpc8xx ip860 725 IP860 powerpc mpc8xx ip860
725 IVML24 powerpc mpc8xx ivm - - IVML24:IVML24_16M 726 IVML24 powerpc mpc8xx ivm - - IVML24:IVML24_16M
726 IVML24_128 powerpc mpc8xx ivm - - IVML24:IVML24_32M 727 IVML24_128 powerpc mpc8xx ivm - - IVML24:IVML24_32M
727 IVML24_256 powerpc mpc8xx ivm - - IVML24:IVML24_64M 728 IVML24_256 powerpc mpc8xx ivm - - IVML24:IVML24_64M
728 IVMS8 powerpc mpc8xx ivm - - IVMS8:IVMS8_16M 729 IVMS8 powerpc mpc8xx ivm - - IVMS8:IVMS8_16M
729 IVMS8_128 powerpc mpc8xx ivm - - IVMS8:IVMS8_32M 730 IVMS8_128 powerpc mpc8xx ivm - - IVMS8:IVMS8_32M
730 IVMS8_256 powerpc mpc8xx ivm - - IVMS8:IVMS8_64M 731 IVMS8_256 powerpc mpc8xx ivm - - IVMS8:IVMS8_64M
731 LANTEC powerpc mpc8xx lantec 732 LANTEC powerpc mpc8xx lantec
732 lwmon powerpc mpc8xx 733 lwmon powerpc mpc8xx
733 MBX powerpc mpc8xx mbx8xx 734 MBX powerpc mpc8xx mbx8xx
734 MBX860T powerpc mpc8xx mbx8xx 735 MBX860T powerpc mpc8xx mbx8xx
735 MPC86xADS powerpc mpc8xx fads 736 MPC86xADS powerpc mpc8xx fads
736 MPC885ADS powerpc mpc8xx fads 737 MPC885ADS powerpc mpc8xx fads
737 NETPHONE powerpc mpc8xx netphone - - NETPHONE:NETPHONE_VERSION=1 738 NETPHONE powerpc mpc8xx netphone - - NETPHONE:NETPHONE_VERSION=1
738 NETPHONE_V2 powerpc mpc8xx netphone - - NETPHONE:NETPHONE_VERSION=2 739 NETPHONE_V2 powerpc mpc8xx netphone - - NETPHONE:NETPHONE_VERSION=2
739 NETTA powerpc mpc8xx netta - - NETTA 740 NETTA powerpc mpc8xx netta - - NETTA
740 NETTA2 powerpc mpc8xx netta2 - - NETTA2:NETTA2_VERSION=1 741 NETTA2 powerpc mpc8xx netta2 - - NETTA2:NETTA2_VERSION=1
741 NETTA2_V2 powerpc mpc8xx netta2 - - NETTA2:NETTA2_VERSION=2 742 NETTA2_V2 powerpc mpc8xx netta2 - - NETTA2:NETTA2_VERSION=2
742 NETTA_6412 powerpc mpc8xx netta - - NETTA:NETTA_6412=1 743 NETTA_6412 powerpc mpc8xx netta - - NETTA:NETTA_6412=1
743 NETTA_6412_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_6412=1,NETTA_SWAPHOOK=1 744 NETTA_6412_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_6412=1,NETTA_SWAPHOOK=1
744 NETTA_ISDN powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1 745 NETTA_ISDN powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1
745 NETTA_ISDN_6412 powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1,NETTA_6412=1 746 NETTA_ISDN_6412 powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1,NETTA_6412=1
746 NETTA_ISDN_6412_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1,NETTA_6412=1,NETTA_SWAPHOOK=1 747 NETTA_ISDN_6412_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1,NETTA_6412=1,NETTA_SWAPHOOK=1
747 NETTA_ISDN_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1,NETTA_SWAPHOOK=1 748 NETTA_ISDN_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_ISDN=1,NETTA_SWAPHOOK=1
748 NETTA_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_SWAPHOOK=1 749 NETTA_SWAPHOOK powerpc mpc8xx netta - - NETTA:NETTA_SWAPHOOK=1
749 NETVIA powerpc mpc8xx netvia - - NETVIA:NETVIA_VERSION=1 750 NETVIA powerpc mpc8xx netvia - - NETVIA:NETVIA_VERSION=1
750 NETVIA_V2 powerpc mpc8xx netvia - - NETVIA:NETVIA_VERSION=2 751 NETVIA_V2 powerpc mpc8xx netvia - - NETVIA:NETVIA_VERSION=2
751 NX823 powerpc mpc8xx nx823 752 NX823 powerpc mpc8xx nx823
752 quantum powerpc mpc8xx 753 quantum powerpc mpc8xx
753 R360MPI powerpc mpc8xx r360mpi 754 R360MPI powerpc mpc8xx r360mpi
754 RBC823 powerpc mpc8xx rbc823 755 RBC823 powerpc mpc8xx rbc823
755 rmu powerpc mpc8xx 756 rmu powerpc mpc8xx
756 RPXClassic powerpc mpc8xx 757 RPXClassic powerpc mpc8xx
757 RPXlite powerpc mpc8xx 758 RPXlite powerpc mpc8xx
758 RPXlite_DW powerpc mpc8xx RPXlite_dw - - RPXlite_DW 759 RPXlite_DW powerpc mpc8xx RPXlite_dw - - RPXlite_DW
759 RPXlite_DW_64 powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz 760 RPXlite_DW_64 powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz
760 RPXlite_DW_64_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20 761 RPXlite_DW_64_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20
761 RPXlite_DW_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:LCD,NEC_NL6448BC20 762 RPXlite_DW_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:LCD,NEC_NL6448BC20
762 RPXlite_DW_NVRAM powerpc mpc8xx RPXlite_dw - - RPXlite_DW:ENV_IS_IN_NVRAM 763 RPXlite_DW_NVRAM powerpc mpc8xx RPXlite_dw - - RPXlite_DW:ENV_IS_IN_NVRAM
763 RPXlite_DW_NVRAM_64 powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz,ENV_IS_IN_NVRAM 764 RPXlite_DW_NVRAM_64 powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz,ENV_IS_IN_NVRAM
764 RPXlite_DW_NVRAM_64_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20,ENV_IS_IN_NVRAM 765 RPXlite_DW_NVRAM_64_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:RPXlite_64MHz,LCD,NEC_NL6448BC20,ENV_IS_IN_NVRAM
765 RPXlite_DW_NVRAM_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:LCD,NEC_NL6448BC20,ENV_IS_IN_NVRAM 766 RPXlite_DW_NVRAM_LCD powerpc mpc8xx RPXlite_dw - - RPXlite_DW:LCD,NEC_NL6448BC20,ENV_IS_IN_NVRAM
766 RRvision powerpc mpc8xx 767 RRvision powerpc mpc8xx
767 RRvision_LCD powerpc mpc8xx RRvision - - RRvision:LCD,SHARP_LQ104V7DS01 768 RRvision_LCD powerpc mpc8xx RRvision - - RRvision:LCD,SHARP_LQ104V7DS01
768 spc1920 powerpc mpc8xx 769 spc1920 powerpc mpc8xx
769 SPD823TS powerpc mpc8xx spd8xx 770 SPD823TS powerpc mpc8xx spd8xx
770 svm_sc8xx powerpc mpc8xx 771 svm_sc8xx powerpc mpc8xx
771 SXNI855T powerpc mpc8xx sixnet 772 SXNI855T powerpc mpc8xx sixnet
772 v37 powerpc mpc8xx 773 v37 powerpc mpc8xx
773 MHPC powerpc mpc8xx mhpc eltec 774 MHPC powerpc mpc8xx mhpc eltec
774 TOP860 powerpc mpc8xx top860 emk 775 TOP860 powerpc mpc8xx top860 emk
775 KUP4K powerpc mpc8xx kup4k kup 776 KUP4K powerpc mpc8xx kup4k kup
776 KUP4X powerpc mpc8xx kup4x kup 777 KUP4X powerpc mpc8xx kup4x kup
777 ELPT860 powerpc mpc8xx elpt860 LEOX 778 ELPT860 powerpc mpc8xx elpt860 LEOX
778 uc100 powerpc mpc8xx - manroland 779 uc100 powerpc mpc8xx - manroland
779 IAD210 powerpc mpc8xx - siemens 780 IAD210 powerpc mpc8xx - siemens
780 QS823 powerpc mpc8xx qs850 snmc 781 QS823 powerpc mpc8xx qs850 snmc
781 QS850 powerpc mpc8xx qs850 snmc 782 QS850 powerpc mpc8xx qs850 snmc
782 QS860T powerpc mpc8xx qs860t snmc 783 QS860T powerpc mpc8xx qs860t snmc
783 stxxtc powerpc mpc8xx stxxtc stx 784 stxxtc powerpc mpc8xx stxxtc stx
784 FPS850L powerpc mpc8xx tqm8xx tqc 785 FPS850L powerpc mpc8xx tqm8xx tqc
785 FPS860L powerpc mpc8xx tqm8xx tqc 786 FPS860L powerpc mpc8xx tqm8xx tqc
786 NSCU powerpc mpc8xx tqm8xx tqc 787 NSCU powerpc mpc8xx tqm8xx tqc
787 SM850 powerpc mpc8xx tqm8xx tqc 788 SM850 powerpc mpc8xx tqm8xx tqc
788 TK885D powerpc mpc8xx tqm8xx tqc 789 TK885D powerpc mpc8xx tqm8xx tqc
789 TQM823L powerpc mpc8xx tqm8xx tqc 790 TQM823L powerpc mpc8xx tqm8xx tqc
790 TQM823L_LCD powerpc mpc8xx tqm8xx tqc - TQM823L:LCD,NEC_NL6448BC20 791 TQM823L_LCD powerpc mpc8xx tqm8xx tqc - TQM823L:LCD,NEC_NL6448BC20
791 TQM823M powerpc mpc8xx tqm8xx tqc 792 TQM823M powerpc mpc8xx tqm8xx tqc
792 TQM850L powerpc mpc8xx tqm8xx tqc 793 TQM850L powerpc mpc8xx tqm8xx tqc
793 TQM850M powerpc mpc8xx tqm8xx tqc 794 TQM850M powerpc mpc8xx tqm8xx tqc
794 TQM855L powerpc mpc8xx tqm8xx tqc 795 TQM855L powerpc mpc8xx tqm8xx tqc
795 TQM855M powerpc mpc8xx tqm8xx tqc 796 TQM855M powerpc mpc8xx tqm8xx tqc
796 TQM860L powerpc mpc8xx tqm8xx tqc 797 TQM860L powerpc mpc8xx tqm8xx tqc
797 TQM860M powerpc mpc8xx tqm8xx tqc 798 TQM860M powerpc mpc8xx tqm8xx tqc
798 TQM862L powerpc mpc8xx tqm8xx tqc 799 TQM862L powerpc mpc8xx tqm8xx tqc
799 TQM862M powerpc mpc8xx tqm8xx tqc 800 TQM862M powerpc mpc8xx tqm8xx tqc
800 TQM866M powerpc mpc8xx tqm8xx tqc 801 TQM866M powerpc mpc8xx tqm8xx tqc
801 TQM885D powerpc mpc8xx tqm8xx tqc 802 TQM885D powerpc mpc8xx tqm8xx tqc
802 TTTech powerpc mpc8xx tqm8xx tqc - TQM823L:LCD,SHARP_LQ104V7DS01 803 TTTech powerpc mpc8xx tqm8xx tqc - TQM823L:LCD,SHARP_LQ104V7DS01
803 virtlab2 powerpc mpc8xx tqm8xx tqc 804 virtlab2 powerpc mpc8xx tqm8xx tqc
804 wtk powerpc mpc8xx tqm8xx tqc - TQM823L:LCD,SHARP_LQ065T9DR51U 805 wtk powerpc mpc8xx tqm8xx tqc - TQM823L:LCD,SHARP_LQ065T9DR51U
805 AMX860 powerpc mpc8xx amx860 westel 806 AMX860 powerpc mpc8xx amx860 westel
806 csb272 powerpc ppc4xx 807 csb272 powerpc ppc4xx
807 csb472 powerpc ppc4xx 808 csb472 powerpc ppc4xx
808 G2000 powerpc ppc4xx g2000 809 G2000 powerpc ppc4xx g2000
809 JSE powerpc ppc4xx jse 810 JSE powerpc ppc4xx jse
810 korat powerpc ppc4xx 811 korat powerpc ppc4xx
811 korat_perm powerpc ppc4xx korat - - korat:KORAT_PERMANENT 812 korat_perm powerpc ppc4xx korat - - korat:KORAT_PERMANENT
812 lwmon5 powerpc ppc4xx 813 lwmon5 powerpc ppc4xx
813 ML2 powerpc ppc4xx ml2 814 ML2 powerpc ppc4xx ml2
814 pcs440ep powerpc ppc4xx 815 pcs440ep powerpc ppc4xx
815 quad100hd powerpc ppc4xx 816 quad100hd powerpc ppc4xx
816 sbc405 powerpc ppc4xx 817 sbc405 powerpc ppc4xx
817 sc3 powerpc ppc4xx 818 sc3 powerpc ppc4xx
818 t3corp powerpc ppc4xx 819 t3corp powerpc ppc4xx
819 W7OLMC powerpc ppc4xx w7o 820 W7OLMC powerpc ppc4xx w7o
820 W7OLMG powerpc ppc4xx w7o 821 W7OLMG powerpc ppc4xx w7o
821 zeus powerpc ppc4xx 822 zeus powerpc ppc4xx
822 acadia powerpc ppc4xx - amcc 823 acadia powerpc ppc4xx - amcc
823 acadia_nand powerpc ppc4xx acadia amcc - acadia:NAND_U_BOOT,SYS_TEXT_BASE=0x01000000 824 acadia_nand powerpc ppc4xx acadia amcc - acadia:NAND_U_BOOT,SYS_TEXT_BASE=0x01000000
824 arches powerpc ppc4xx canyonlands amcc - canyonlands:ARCHES 825 arches powerpc ppc4xx canyonlands amcc - canyonlands:ARCHES
825 bamboo powerpc ppc4xx - amcc 826 bamboo powerpc ppc4xx - amcc
826 bamboo_nand powerpc ppc4xx bamboo amcc - bamboo:NAND_U_BOOT,SYS_TEXT_BASE=0x01000000 827 bamboo_nand powerpc ppc4xx bamboo amcc - bamboo:NAND_U_BOOT,SYS_TEXT_BASE=0x01000000
827 bluestone powerpc ppc4xx - amcc 828 bluestone powerpc ppc4xx - amcc
828 bubinga powerpc ppc4xx - amcc 829 bubinga powerpc ppc4xx - amcc
829 canyonlands powerpc ppc4xx canyonlands amcc - canyonlands:CANYONLANDS 830 canyonlands powerpc ppc4xx canyonlands amcc - canyonlands:CANYONLANDS
830 canyonlands_nand powerpc ppc4xx canyonlands amcc - canyonlands:CANYONLANDS,NAND_U_BOOT,SYS_TEXT_BASE=0x01000000 831 canyonlands_nand powerpc ppc4xx canyonlands amcc - canyonlands:CANYONLANDS,NAND_U_BOOT,SYS_TEXT_BASE=0x01000000
831 ebony powerpc ppc4xx - amcc 832 ebony powerpc ppc4xx - amcc
832 glacier powerpc ppc4xx canyonlands amcc - canyonlands:GLACIER 833 glacier powerpc ppc4xx canyonlands amcc - canyonlands:GLACIER
833 glacier_nand powerpc ppc4xx canyonlands amcc - canyonlands:GLACIER,NAND_U_BOOT,SYS_TEXT_BASE=0x01000000 834 glacier_nand powerpc ppc4xx canyonlands amcc - canyonlands:GLACIER,NAND_U_BOOT,SYS_TEXT_BASE=0x01000000
834 haleakala powerpc ppc4xx kilauea amcc - kilauea:HALEAKALA 835 haleakala powerpc ppc4xx kilauea amcc - kilauea:HALEAKALA
835 haleakala_nand powerpc ppc4xx kilauea amcc - kilauea:NAND_U_BOOT,SYS_TEXT_BASE=0x01000000 836 haleakala_nand powerpc ppc4xx kilauea amcc - kilauea:NAND_U_BOOT,SYS_TEXT_BASE=0x01000000
836 katmai powerpc ppc4xx - amcc 837 katmai powerpc ppc4xx - amcc
837 kilauea powerpc ppc4xx kilauea amcc - kilauea:KILAUEA 838 kilauea powerpc ppc4xx kilauea amcc - kilauea:KILAUEA
838 kilauea_nand powerpc ppc4xx kilauea amcc - kilauea:NAND_U_BOOT,SYS_TEXT_BASE=0x01000000 839 kilauea_nand powerpc ppc4xx kilauea amcc - kilauea:NAND_U_BOOT,SYS_TEXT_BASE=0x01000000
839 luan powerpc ppc4xx - amcc 840 luan powerpc ppc4xx - amcc
840 makalu powerpc ppc4xx - amcc 841 makalu powerpc ppc4xx - amcc
841 ocotea powerpc ppc4xx - amcc 842 ocotea powerpc ppc4xx - amcc
842 rainier powerpc ppc4xx sequoia amcc - sequoia:RAINIER 843 rainier powerpc ppc4xx sequoia amcc - sequoia:RAINIER
843 rainier_nand powerpc ppc4xx sequoia amcc - sequoia:RAINIER,NAND_U_BOOT,SYS_TEXT_BASE=0x01000000 844 rainier_nand powerpc ppc4xx sequoia amcc - sequoia:RAINIER,NAND_U_BOOT,SYS_TEXT_BASE=0x01000000
844 rainier_ramboot powerpc ppc4xx sequoia amcc - sequoia:RAINIER,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds 845 rainier_ramboot powerpc ppc4xx sequoia amcc - sequoia:RAINIER,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds
845 redwood powerpc ppc4xx - amcc 846 redwood powerpc ppc4xx - amcc
846 sequoia powerpc ppc4xx sequoia amcc - sequoia:SEQUOIA 847 sequoia powerpc ppc4xx sequoia amcc - sequoia:SEQUOIA
847 sequoia_nand powerpc ppc4xx sequoia amcc - sequoia:SEQUOIA,NAND_U_BOOT,SYS_TEXT_BASE=0x01000000 848 sequoia_nand powerpc ppc4xx sequoia amcc - sequoia:SEQUOIA,NAND_U_BOOT,SYS_TEXT_BASE=0x01000000
848 sequoia_ramboot powerpc ppc4xx sequoia amcc - sequoia:SEQUOIA,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds 849 sequoia_ramboot powerpc ppc4xx sequoia amcc - sequoia:SEQUOIA,SYS_RAMBOOT,SYS_TEXT_BASE=0x01000000,SYS_LDSCRIPT=board/amcc/sequoia/u-boot-ram.lds
849 sycamore powerpc ppc4xx walnut amcc - walnut 850 sycamore powerpc ppc4xx walnut amcc - walnut
850 taihu powerpc ppc4xx - amcc 851 taihu powerpc ppc4xx - amcc
851 taishan powerpc ppc4xx - amcc 852 taishan powerpc ppc4xx - amcc
852 walnut powerpc ppc4xx walnut amcc 853 walnut powerpc ppc4xx walnut amcc
853 yellowstone powerpc ppc4xx yosemite amcc - yosemite:YELLOWSTONE 854 yellowstone powerpc ppc4xx yosemite amcc - yosemite:YELLOWSTONE
854 yosemite powerpc ppc4xx yosemite amcc - yosemite:YOSEMITE 855 yosemite powerpc ppc4xx yosemite amcc - yosemite:YOSEMITE
855 yucca powerpc ppc4xx - amcc 856 yucca powerpc ppc4xx - amcc
856 AP1000 powerpc ppc4xx ap1000 amirix 857 AP1000 powerpc ppc4xx ap1000 amirix
857 fx12mm powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,INIT_TLB=board/xilinx/ppc405-generic/init.o 858 fx12mm powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,INIT_TLB=board/xilinx/ppc405-generic/init.o
858 fx12mm_flash powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o 859 fx12mm_flash powerpc ppc4xx fx12mm avnet - fx12mm:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc405-generic/init.o
859 v5fx30teval powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o 860 v5fx30teval powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o
860 v5fx30teval_flash powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o 861 v5fx30teval_flash powerpc ppc4xx v5fx30teval avnet - v5fx30teval:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o
861 CRAYL1 powerpc ppc4xx L1 cray 862 CRAYL1 powerpc ppc4xx L1 cray
862 CATcenter powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1 863 CATcenter powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1
863 CATcenter_25 powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25 864 CATcenter_25 powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25
864 CATcenter_33 powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33 865 CATcenter_33 powerpc ppc4xx PPChameleonEVB dave - CATcenter:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33
865 PPChameleonEVB powerpc ppc4xx PPChameleonEVB dave 866 PPChameleonEVB powerpc ppc4xx PPChameleonEVB dave
866 PPChameleonEVB_BA_25 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_25 867 PPChameleonEVB_BA_25 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_25
867 PPChameleonEVB_BA_33 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_33 868 PPChameleonEVB_BA_33 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=0,PPCHAMELEON_CLK_33
868 PPChameleonEVB_HI_25 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_25 869 PPChameleonEVB_HI_25 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_25
869 PPChameleonEVB_HI_33 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_33 870 PPChameleonEVB_HI_33 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=2,PPCHAMELEON_CLK_33
870 PPChameleonEVB_ME_25 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25 871 PPChameleonEVB_ME_25 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_25
871 PPChameleonEVB_ME_33 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33 872 PPChameleonEVB_ME_33 powerpc ppc4xx PPChameleonEVB dave - PPChameleonEVB:PPCHAMELEON_MODULE_MODEL=1,PPCHAMELEON_CLK_33
872 ADCIOP powerpc ppc4xx adciop esd 873 ADCIOP powerpc ppc4xx adciop esd
873 APC405 powerpc ppc4xx apc405 esd 874 APC405 powerpc ppc4xx apc405 esd
874 AR405 powerpc ppc4xx ar405 esd 875 AR405 powerpc ppc4xx ar405 esd
875 ASH405 powerpc ppc4xx ash405 esd 876 ASH405 powerpc ppc4xx ash405 esd
876 CANBT powerpc ppc4xx canbt esd 877 CANBT powerpc ppc4xx canbt esd
877 CMS700 powerpc ppc4xx cms700 esd 878 CMS700 powerpc ppc4xx cms700 esd
878 CPCI2DP powerpc ppc4xx cpci2dp esd 879 CPCI2DP powerpc ppc4xx cpci2dp esd
879 CPCI405 powerpc ppc4xx cpci405 esd 880 CPCI405 powerpc ppc4xx cpci405 esd
880 CPCI4052 powerpc ppc4xx cpci405 esd 881 CPCI4052 powerpc ppc4xx cpci405 esd
881 CPCI405AB powerpc ppc4xx cpci405 esd 882 CPCI405AB powerpc ppc4xx cpci405 esd
882 CPCI405DT powerpc ppc4xx cpci405 esd 883 CPCI405DT powerpc ppc4xx cpci405 esd
883 CPCIISER4 powerpc ppc4xx cpciiser4 esd 884 CPCIISER4 powerpc ppc4xx cpciiser4 esd
884 DASA_SIM powerpc ppc4xx dasa_sim esd 885 DASA_SIM powerpc ppc4xx dasa_sim esd
885 DP405 powerpc ppc4xx dp405 esd 886 DP405 powerpc ppc4xx dp405 esd
886 DU405 powerpc ppc4xx du405 esd 887 DU405 powerpc ppc4xx du405 esd
887 DU440 powerpc ppc4xx du440 esd 888 DU440 powerpc ppc4xx du440 esd
888 HH405 powerpc ppc4xx hh405 esd 889 HH405 powerpc ppc4xx hh405 esd
889 HUB405 powerpc ppc4xx hub405 esd 890 HUB405 powerpc ppc4xx hub405 esd
890 OCRTC powerpc ppc4xx ocrtc esd 891 OCRTC powerpc ppc4xx ocrtc esd
891 PCI405 powerpc ppc4xx pci405 esd 892 PCI405 powerpc ppc4xx pci405 esd
892 PLU405 powerpc ppc4xx plu405 esd 893 PLU405 powerpc ppc4xx plu405 esd
893 PMC405 powerpc ppc4xx pmc405 esd 894 PMC405 powerpc ppc4xx pmc405 esd
894 PMC405DE powerpc ppc4xx pmc405de esd 895 PMC405DE powerpc ppc4xx pmc405de esd
895 PMC440 powerpc ppc4xx pmc440 esd 896 PMC440 powerpc ppc4xx pmc440 esd
896 VOH405 powerpc ppc4xx voh405 esd 897 VOH405 powerpc ppc4xx voh405 esd
897 VOM405 powerpc ppc4xx vom405 esd 898 VOM405 powerpc ppc4xx vom405 esd
898 WUH405 powerpc ppc4xx wuh405 esd 899 WUH405 powerpc ppc4xx wuh405 esd
899 devconcenter powerpc ppc4xx intip gdsys - intip:DEVCONCENTER 900 devconcenter powerpc ppc4xx intip gdsys - intip:DEVCONCENTER
900 dlvision powerpc ppc4xx - gdsys 901 dlvision powerpc ppc4xx - gdsys
901 dlvision-10g powerpc ppc4xx 405ep gdsys 902 dlvision-10g powerpc ppc4xx 405ep gdsys
902 gdppc440etx powerpc ppc4xx - gdsys 903 gdppc440etx powerpc ppc4xx - gdsys
903 intip powerpc ppc4xx intip gdsys - intip:INTIB 904 intip powerpc ppc4xx intip gdsys - intip:INTIB
904 io powerpc ppc4xx 405ep gdsys 905 io powerpc ppc4xx 405ep gdsys
905 iocon powerpc ppc4xx 405ep gdsys 906 iocon powerpc ppc4xx 405ep gdsys
906 neo powerpc ppc4xx - gdsys 907 neo powerpc ppc4xx - gdsys
907 icon powerpc ppc4xx - mosaixtech 908 icon powerpc ppc4xx - mosaixtech
908 MIP405 powerpc ppc4xx mip405 mpl 909 MIP405 powerpc ppc4xx mip405 mpl
909 MIP405T powerpc ppc4xx mip405 mpl - MIP405:MIP405T 910 MIP405T powerpc ppc4xx mip405 mpl - MIP405:MIP405T
910 PIP405 powerpc ppc4xx pip405 mpl 911 PIP405 powerpc ppc4xx pip405 mpl
911 alpr powerpc ppc4xx - prodrive 912 alpr powerpc ppc4xx - prodrive
912 p3p440 powerpc ppc4xx - prodrive 913 p3p440 powerpc ppc4xx - prodrive
913 KAREF powerpc ppc4xx karef sandburst 914 KAREF powerpc ppc4xx karef sandburst
914 METROBOX powerpc ppc4xx metrobox sandburst 915 METROBOX powerpc ppc4xx metrobox sandburst
915 xpedite1000 powerpc ppc4xx - xes 916 xpedite1000 powerpc ppc4xx - xes
916 ml507 powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o 917 ml507 powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1,INIT_TLB=board/xilinx/ppc440-generic/init.o
917 ml507_flash powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o 918 ml507_flash powerpc ppc4xx ml507 xilinx - ml507:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC,INIT_TLB=board/xilinx/ppc440-generic/init.o
918 xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000 919 xilinx-ppc405-generic powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000
919 xilinx-ppc405-generic_flash powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC 920 xilinx-ppc405-generic_flash powerpc ppc4xx ppc405-generic xilinx - xilinx-ppc405-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC
920 xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1 921 xilinx-ppc440-generic powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0x04000000,RESET_VECTOR_ADDRESS=0x04100000,BOOT_FROM_XMD=1
921 xilinx-ppc440-generic_flash powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC 922 xilinx-ppc440-generic_flash powerpc ppc4xx ppc440-generic xilinx - xilinx-ppc440-generic:SYS_TEXT_BASE=0xF7F60000,RESET_VECTOR_ADDRESS=0xF7FFFFFC
922 rsk7203 sh sh2 rsk7203 renesas - 923 rsk7203 sh sh2 rsk7203 renesas -
923 rsk7264 sh sh2 rsk7264 renesas - 924 rsk7264 sh sh2 rsk7264 renesas -
924 mpr2 sh sh3 mpr2 - - 925 mpr2 sh sh3 mpr2 - -
925 ms7720se sh sh3 ms7720se - - 926 ms7720se sh sh3 ms7720se - -
926 shmin sh sh3 shmin - - 927 shmin sh sh3 shmin - -
927 espt sh sh4 espt - - 928 espt sh sh4 espt - -
928 ms7722se sh sh4 ms7722se - - 929 ms7722se sh sh4 ms7722se - -
929 ms7750se sh sh4 ms7750se - - 930 ms7750se sh sh4 ms7750se - -
930 ap325rxa sh sh4 ap325rxa renesas - 931 ap325rxa sh sh4 ap325rxa renesas -
931 r2dplus sh sh4 r2dplus renesas - 932 r2dplus sh sh4 r2dplus renesas -
932 r7780mp sh sh4 r7780mp renesas - 933 r7780mp sh sh4 r7780mp renesas -
933 sh7757lcr sh sh4 sh7757lcr renesas - 934 sh7757lcr sh sh4 sh7757lcr renesas -
934 sh7763rdp sh sh4 sh7763rdp renesas - 935 sh7763rdp sh sh4 sh7763rdp renesas -
935 sh7785lcr sh sh4 sh7785lcr renesas - 936 sh7785lcr sh sh4 sh7785lcr renesas -
936 sh7785lcr_32bit sh sh4 sh7785lcr renesas - sh7785lcr:SH_32BIT=1 937 sh7785lcr_32bit sh sh4 sh7785lcr renesas - sh7785lcr:SH_32BIT=1
937 MigoR sh sh4 MigoR renesas - 938 MigoR sh sh4 MigoR renesas -
938 grsim_leon2 sparc leon2 - gaisler 939 grsim_leon2 sparc leon2 - gaisler
939 gr_cpci_ax2000 sparc leon3 - gaisler 940 gr_cpci_ax2000 sparc leon3 - gaisler
940 gr_ep2s60 sparc leon3 - gaisler 941 gr_ep2s60 sparc leon3 - gaisler
941 grsim sparc leon3 - gaisler 942 grsim sparc leon3 - gaisler
942 gr_xc3s_1500 sparc leon3 - gaisler 943 gr_xc3s_1500 sparc leon3 - gaisler
943 # Target ARCH CPU Board name Vendor SoC Options 944 # Target ARCH CPU Board name Vendor SoC Options
944 ######################################################################################################################## 945 ########################################################################################################################
945 946
drivers/mtd/nand/Makefile
Diff comments   View file @ d8fffa0
1 # 1 #
2 # (C) Copyright 2006 2 # (C) Copyright 2006
3 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. 3 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 # 4 #
5 # See file CREDITS for list of people who contributed to this 5 # See file CREDITS for list of people who contributed to this
6 # project. 6 # project.
7 # 7 #
8 # This program is free software; you can redistribute it and/or 8 # This program is free software; you can redistribute it and/or
9 # modify it under the terms of the GNU General Public License as 9 # modify it under the terms of the GNU General Public License as
10 # published by the Free Software Foundation; either version 2 of 10 # published by the Free Software Foundation; either version 2 of
11 # the License, or (at your option) any later version. 11 # the License, or (at your option) any later version.
12 # 12 #
13 # This program is distributed in the hope that it will be useful, 13 # This program is distributed in the hope that it will be useful,
14 # but WITHOUT ANY WARRANTY; without even the implied warranty of 14 # but WITHOUT ANY WARRANTY; without even the implied warranty of
15 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 # GNU General Public License for more details. 16 # GNU General Public License for more details.
17 # 17 #
18 # You should have received a copy of the GNU General Public License 18 # You should have received a copy of the GNU General Public License
19 # along with this program; if not, write to the Free Software 19 # along with this program; if not, write to the Free Software
20 # Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 # Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 # MA 02111-1307 USA 21 # MA 02111-1307 USA
22 # 22 #
23 23
24 include $(TOPDIR)/config.mk 24 include $(TOPDIR)/config.mk
25 25
26 LIB := $(obj)libnand.o 26 LIB := $(obj)libnand.o
27 27
28 ifdef CONFIG_CMD_NAND 28 ifdef CONFIG_CMD_NAND
29 ifdef CONFIG_SPL_BUILD 29 ifdef CONFIG_SPL_BUILD
30 ifdef CONFIG_SPL_NAND_SIMPLE 30 ifdef CONFIG_SPL_NAND_SIMPLE
31 COBJS-y += nand_spl_simple.o 31 COBJS-y += nand_spl_simple.o
32 endif 32 endif
33 else 33 else
34 COBJS-y += nand.o 34 COBJS-y += nand.o
35 COBJS-y += nand_bbt.o 35 COBJS-y += nand_bbt.o
36 COBJS-y += nand_ids.o 36 COBJS-y += nand_ids.o
37 COBJS-y += nand_util.o 37 COBJS-y += nand_util.o
38 endif 38 endif
39 COBJS-y += nand_ecc.o 39 COBJS-y += nand_ecc.o
40 COBJS-y += nand_base.o 40 COBJS-y += nand_base.o
41 41
42 COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o 42 COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
43 COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o 43 COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
44 COBJS-$(CONFIG_NAND_DAVINCI) += davinci_nand.o 44 COBJS-$(CONFIG_NAND_DAVINCI) += davinci_nand.o
45 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o 45 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o
46 COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o 46 COBJS-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o
47 COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o 47 COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o
48 COBJS-$(CONFIG_NAND_JZ4740) += jz4740_nand.o
48 COBJS-$(CONFIG_NAND_KB9202) += kb9202_nand.o 49 COBJS-$(CONFIG_NAND_KB9202) += kb9202_nand.o
49 COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o 50 COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o
50 COBJS-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o 51 COBJS-$(CONFIG_NAND_KMETER1) += kmeter1_nand.o
51 COBJS-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o 52 COBJS-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o
52 COBJS-$(CONFIG_NAND_MXC) += mxc_nand.o 53 COBJS-$(CONFIG_NAND_MXC) += mxc_nand.o
53 COBJS-$(CONFIG_NAND_NDFC) += ndfc.o 54 COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
54 COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o 55 COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
55 COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o 56 COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
56 COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o 57 COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
57 COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o 58 COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
58 COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o 59 COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
59 COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o 60 COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o
60 endif 61 endif
61 62
62 COBJS := $(COBJS-y) 63 COBJS := $(COBJS-y)
63 SRCS := $(COBJS:.o=.c) 64 SRCS := $(COBJS:.o=.c)
64 OBJS := $(addprefix $(obj),$(COBJS)) 65 OBJS := $(addprefix $(obj),$(COBJS))
65 66
66 all: $(LIB) 67 all: $(LIB)
67 68
68 $(LIB): $(obj).depend $(OBJS) 69 $(LIB): $(obj).depend $(OBJS)
69 $(call cmd_link_o_target, $(OBJS)) 70 $(call cmd_link_o_target, $(OBJS))
70 71
71 ######################################################################### 72 #########################################################################
72 73
73 # defines $(obj).depend target 74 # defines $(obj).depend target
74 include $(SRCTREE)/rules.mk 75 include $(SRCTREE)/rules.mk
75 76
76 sinclude $(obj).depend 77 sinclude $(obj).depend
77 78
78 ######################################################################### 79 #########################################################################
79 80
drivers/mtd/nand/jz4740_nand.c
Diff comments   View file @ d8fffa0
File was created 1 /*
2 * Platform independend driver for JZ4740.
3 *
4 * Copyright (c) 2007 Ingenic Semiconductor Inc.
5 * Author: <jlwei@ingenic.cn>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 */
12 #include <common.h>
13
14 #include <nand.h>
15 #include <asm/io.h>
16 #include <asm/jz4740.h>
17
18 #define JZ_NAND_DATA_ADDR ((void __iomem *)0xB8000000)
19 #define JZ_NAND_CMD_ADDR (JZ_NAND_DATA_ADDR + 0x8000)
20 #define JZ_NAND_ADDR_ADDR (JZ_NAND_DATA_ADDR + 0x10000)
21
22 #define BIT(x) (1 << (x))
23 #define JZ_NAND_ECC_CTRL_ENCODING BIT(3)
24 #define JZ_NAND_ECC_CTRL_RS BIT(2)
25 #define JZ_NAND_ECC_CTRL_RESET BIT(1)
26 #define JZ_NAND_ECC_CTRL_ENABLE BIT(0)
27
28 #define EMC_SMCR1_OPT_NAND 0x094c4400
29 /* Optimize the timing of nand */
30
31 static struct jz4740_emc * emc = (struct jz4740_emc *)JZ4740_EMC_BASE;
32
33 static struct nand_ecclayout qi_lb60_ecclayout_2gb = {
34 .eccbytes = 72,
35 .eccpos = {
36 12, 13, 14, 15, 16, 17, 18, 19,
37 20, 21, 22, 23, 24, 25, 26, 27,
38 28, 29, 30, 31, 32, 33, 34, 35,
39 36, 37, 38, 39, 40, 41, 42, 43,
40 44, 45, 46, 47, 48, 49, 50, 51,
41 52, 53, 54, 55, 56, 57, 58, 59,
42 60, 61, 62, 63, 64, 65, 66, 67,
43 68, 69, 70, 71, 72, 73, 74, 75,
44 76, 77, 78, 79, 80, 81, 82, 83 },
45 .oobfree = {
46 {.offset = 2,
47 .length = 10 },
48 {.offset = 84,
49 .length = 44 } }
50 };
51
52 static int is_reading;
53
54 static void jz_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
55 {
56 struct nand_chip *this = mtd->priv;
57 uint32_t reg;
58
59 if (ctrl & NAND_CTRL_CHANGE) {
60 if (ctrl & NAND_ALE)
61 this->IO_ADDR_W = JZ_NAND_ADDR_ADDR;
62 else if (ctrl & NAND_CLE)
63 this->IO_ADDR_W = JZ_NAND_CMD_ADDR;
64 else
65 this->IO_ADDR_W = JZ_NAND_DATA_ADDR;
66
67 reg = readl(&emc->nfcsr);
68 if (ctrl & NAND_NCE)
69 reg |= EMC_NFCSR_NFCE1;
70 else
71 reg &= ~EMC_NFCSR_NFCE1;
72 writel(reg, &emc->nfcsr);
73 }
74
75 if (cmd != NAND_CMD_NONE)
76 writeb(cmd, this->IO_ADDR_W);
77 }
78
79 static int jz_nand_device_ready(struct mtd_info *mtd)
80 {
81 return (readl(GPIO_PXPIN(2)) & 0x40000000) ? 1 : 0;
82 }
83
84 void board_nand_select_device(struct nand_chip *nand, int chip)
85 {
86 /*
87 * Don't use "chip" to address the NAND device,
88 * generate the cs from the address where it is encoded.
89 */
90 }
91
92 static int jz_nand_rs_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
93 u_char *ecc_code)
94 {
95 uint32_t status;
96 int i;
97
98 if (is_reading)
99 return 0;
100
101 do {
102 status = readl(&emc->nfints);
103 } while (!(status & EMC_NFINTS_ENCF));
104
105 /* disable ecc */
106 writel(readl(&emc->nfecr) & ~EMC_NFECR_ECCE, &emc->nfecr);
107
108 for (i = 0; i < 9; i++)
109 ecc_code[i] = readb(&emc->nfpar[i]);
110
111 return 0;
112 }
113
114 static void jz_nand_hwctl(struct mtd_info *mtd, int mode)
115 {
116 uint32_t reg;
117
118 writel(0, &emc->nfints);
119 reg = readl(&emc->nfecr);
120 reg |= JZ_NAND_ECC_CTRL_RESET;
121 reg |= JZ_NAND_ECC_CTRL_ENABLE;
122 reg |= JZ_NAND_ECC_CTRL_RS;
123
124 switch (mode) {
125 case NAND_ECC_READ:
126 reg &= ~JZ_NAND_ECC_CTRL_ENCODING;
127 is_reading = 1;
128 break;
129 case NAND_ECC_WRITE:
130 reg |= JZ_NAND_ECC_CTRL_ENCODING;
131 is_reading = 0;
132 break;
133 default:
134 break;
135 }
136
137 writel(reg, &emc->nfecr);
138 }
139
140 /* Correct 1~9-bit errors in 512-bytes data */
141 static void jz_rs_correct(unsigned char *dat, int idx, int mask)
142 {
143 int i;
144
145 idx--;
146
147 i = idx + (idx >> 3);
148 if (i >= 512)
149 return;
150
151 mask <<= (idx & 0x7);
152
153 dat[i] ^= mask & 0xff;
154 if (i < 511)
155 dat[i + 1] ^= (mask >> 8) & 0xff;
156 }
157
158 static int jz_nand_rs_correct_data(struct mtd_info *mtd, u_char *dat,
159 u_char *read_ecc, u_char *calc_ecc)
160 {
161 int k;
162 uint32_t errcnt, index, mask, status;
163
164 /* Set PAR values */
165 const uint8_t all_ff_ecc[] = {
166 0xcd, 0x9d, 0x90, 0x58, 0xf4, 0x8b, 0xff, 0xb7, 0x6f };
167
168 if (read_ecc[0] == 0xff && read_ecc[1] == 0xff &&
169 read_ecc[2] == 0xff && read_ecc[3] == 0xff &&
170 read_ecc[4] == 0xff && read_ecc[5] == 0xff &&
171 read_ecc[6] == 0xff && read_ecc[7] == 0xff &&
172 read_ecc[8] == 0xff) {
173 for (k = 0; k < 9; k++)
174 writeb(all_ff_ecc[k], &emc->nfpar[k]);
175 } else {
176 for (k = 0; k < 9; k++)
177 writeb(read_ecc[k], &emc->nfpar[k]);
178 }
179 /* Set PRDY */
180 writel(readl(&emc->nfecr) | EMC_NFECR_PRDY, &emc->nfecr);
181
182 /* Wait for completion */
183 do {
184 status = readl(&emc->nfints);
185 } while (!(status & EMC_NFINTS_DECF));
186
187 /* disable ecc */
188 writel(readl(&emc->nfecr) & ~EMC_NFECR_ECCE, &emc->nfecr);
189
190 /* Check decoding */
191 if (!(status & EMC_NFINTS_ERR))
192 return 0;
193
194 if (status & EMC_NFINTS_UNCOR) {
195 printf("uncorrectable ecc\n");
196 return -1;
197 }
198
199 errcnt = (status & EMC_NFINTS_ERRCNT_MASK) >> EMC_NFINTS_ERRCNT_BIT;
200
201 switch (errcnt) {
202 case 4:
203 index = (readl(&emc->nferr[3]) & EMC_NFERR_INDEX_MASK) >>
204 EMC_NFERR_INDEX_BIT;
205 mask = (readl(&emc->nferr[3]) & EMC_NFERR_MASK_MASK) >>
206 EMC_NFERR_MASK_BIT;
207 jz_rs_correct(dat, index, mask);
208 case 3:
209 index = (readl(&emc->nferr[2]) & EMC_NFERR_INDEX_MASK) >>
210 EMC_NFERR_INDEX_BIT;
211 mask = (readl(&emc->nferr[2]) & EMC_NFERR_MASK_MASK) >>
212 EMC_NFERR_MASK_BIT;
213 jz_rs_correct(dat, index, mask);
214 case 2:
215 index = (readl(&emc->nferr[1]) & EMC_NFERR_INDEX_MASK) >>
216 EMC_NFERR_INDEX_BIT;
217 mask = (readl(&emc->nferr[1]) & EMC_NFERR_MASK_MASK) >>
218 EMC_NFERR_MASK_BIT;
219 jz_rs_correct(dat, index, mask);
220 case 1:
221 index = (readl(&emc->nferr[0]) & EMC_NFERR_INDEX_MASK) >>
222 EMC_NFERR_INDEX_BIT;
223 mask = (readl(&emc->nferr[0]) & EMC_NFERR_MASK_MASK) >>
224 EMC_NFERR_MASK_BIT;
225 jz_rs_correct(dat, index, mask);
226 default:
227 break;
228 }
229
230 return errcnt;
231 }
232
233 /*
234 * Main initialization routine
235 */
236 int board_nand_init(struct nand_chip *nand)
237 {
238 uint32_t reg;
239
240 reg = readl(&emc->nfcsr);
241 reg |= EMC_NFCSR_NFE1; /* EMC setup, Set NFE bit */
242 writel(reg, &emc->nfcsr);
243
244 writel(EMC_SMCR1_OPT_NAND, &emc->smcr[1]);
245
246 nand->IO_ADDR_R = JZ_NAND_DATA_ADDR;
247 nand->IO_ADDR_W = JZ_NAND_DATA_ADDR;
248 nand->cmd_ctrl = jz_nand_cmd_ctrl;
249 nand->dev_ready = jz_nand_device_ready;
250 nand->ecc.hwctl = jz_nand_hwctl;
251 nand->ecc.correct = jz_nand_rs_correct_data;
252 nand->ecc.calculate = jz_nand_rs_calculate_ecc;
253 nand->ecc.mode = NAND_ECC_HW_OOB_FIRST;
254 nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
255 nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
256 nand->ecc.layout = &qi_lb60_ecclayout_2gb;
257 nand->chip_delay = 50;
258 nand->options = NAND_USE_FLASH_BBT;
259
260 return 0;
261 }
262
include/configs/qi_lb60.h
Diff comments   View file @ d8fffa0
File was created 1 /*
2 * Authors: Xiangfu Liu <xiangfu.z@gmail.com>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 3 of the License, or (at your option) any later version.
8 */
9
10 #ifndef __CONFIG_QI_LB60_H
11 #define __CONFIG_QI_LB60_H
12
13 #define CONFIG_MIPS32 /* MIPS32 CPU core */
14 #define CONFIG_JZSOC /* Jz SoC */
15 #define CONFIG_JZ4740 /* Jz4740 SoC */
16 #define CONFIG_NAND_JZ4740
17
18 #define CONFIG_SYS_CPU_SPEED 336000000 /* CPU clock: 336 MHz */
19 #define CONFIG_SYS_EXTAL 12000000 /* EXTAL freq: 12 MHz */
20 #define CONFIG_SYS_HZ (CONFIG_SYS_EXTAL / 256) /* incrementer freq */
21 #define CONFIG_SYS_MIPS_TIMER_FREQ CONFIG_SYS_CPU_SPEED
22
23 #define CONFIG_SYS_UART_BASE JZ4740_UART0_BASE /* Base of the UART channel */
24 #define CONFIG_BAUDRATE 57600
25 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
26
27 #define CONFIG_SKIP_LOWLEVEL_INIT
28 #define CONFIG_BOARD_EARLY_INIT_F
29 #define CONFIG_SYS_NO_FLASH
30 #define CONFIG_SYS_FLASH_BASE 0 /* init flash_base as 0 */
31 #define CONFIG_ENV_OVERWRITE
32
33 #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAUL)
34 #define CONFIG_BOOTDELAY 0
35 #define CONFIG_BOOTARGS "mem=32M console=tty0 console=ttyS0,57600n8 ubi.mtd=2 rootfstype=ubifs root=ubi0:rootfs rw rootwait"
36 #define CONFIG_BOOTCOMMAND "nand read 0x80600000 0x400000 0x200000;bootm"
37
38 /*
39 * Command line configuration.
40 */
41 #define CONFIG_CMD_BOOTD /* bootd */
42 #define CONFIG_CMD_CONSOLE /* coninfo */
43 #define CONFIG_CMD_ECHO /* echo arguments */
44
45 #define CONFIG_CMD_LOADB /* loadb */
46 #define CONFIG_CMD_LOADS /* loads */
47 #define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */
48 #define CONFIG_CMD_MISC /* Misc functions like sleep etc*/
49 #define CONFIG_CMD_RUN /* run command in env variable */
50 #define CONFIG_CMD_SAVEENV /* saveenv */
51 #define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
52 #define CONFIG_CMD_SOURCE /* "source" command support */
53 #define CONFIG_CMD_NAND
54
55 /*
56 * Serial download configuration
57 */
58 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
59
60 /*
61 * Miscellaneous configurable options
62 */
63 #define CONFIG_SYS_MAXARGS 16
64 #define CONFIG_SYS_LONGHELP
65 #define CONFIG_SYS_PROMPT "NanoNote# "
66 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
67 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
68
69 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
70 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024)
71
72 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
73 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
74 #define CONFIG_SYS_LOAD_ADDR 0x80600000
75 #define CONFIG_SYS_MEMTEST_START 0x80100000
76 #define CONFIG_SYS_MEMTEST_END 0x80800000
77
78 /*
79 * Environment
80 */
81 #define CONFIG_ENV_IS_IN_NAND /* use NAND for environment vars */
82
83 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
84 /*
85 * if board nand flash is 1GB, set to 1
86 * if board nand flash is 2GB, set to 2
87 * for change the PAGE_SIZE and BLOCK_SIZE
88 * will delete when there is no 1GB flash
89 */
90 #define NANONOTE_NAND_SIZE 2
91
92 #define CONFIG_SYS_NAND_PAGE_SIZE (2048 * NANONOTE_NAND_SIZE)
93 #define CONFIG_SYS_NAND_BLOCK_SIZE (256 * NANONOTE_NAND_SIZE << 10)
94 /* nand bad block was marked at this page in a block, start from 0 */
95 #define CONFIG_SYS_NAND_BADBLOCK_PAGE 127
96 #define CONFIG_SYS_NAND_PAGE_COUNT 128
97 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
98 /* ECC offset position in oob area, default value is 6 if it isn't defined */
99 #define CONFIG_SYS_NAND_ECC_POS (6 * NANONOTE_NAND_SIZE)
100 #define CONFIG_SYS_NAND_ECCSIZE 512
101 #define CONFIG_SYS_NAND_ECCBYTES 9
102 #define CONFIG_SYS_NAND_ECCSTEPS \
103 (CONFIG_SYS_NAND_PAGE_SIZE / CONFIG_SYS_NAND_ECCSIZE)
104 #define CONFIG_SYS_NAND_ECCTOTAL \
105 (CONFIG_SYS_NAND_ECCBYTES * CONFIG_SYS_NAND_ECCSTEPS)
106 #define CONFIG_SYS_NAND_ECCPOS \
107 {12, 13, 14, 15, 16, 17, 18, 19,\
108 20, 21, 22, 23, 24, 25, 26, 27, \
109 28, 29, 30, 31, 32, 33, 34, 35, \
110 36, 37, 38, 39, 40, 41, 42, 43, \
111 44, 45, 46, 47, 48, 49, 50, 51, \
112 52, 53, 54, 55, 56, 57, 58, 59, \
113 60, 61, 62, 63, 64, 65, 66, 67, \
114 68, 69, 70, 71, 72, 73, 74, 75, \
115 76, 77, 78, 79, 80, 81, 82, 83}
116
117 #define CONFIG_SYS_NAND_OOBSIZE 128
118 #define CONFIG_SYS_NAND_BASE 0xB8000000
119 #define CONFIG_SYS_ONENAND_BASE CONFIG_SYS_NAND_BASE
120 #define NAND_MAX_CHIPS 1
121 #define CONFIG_SYS_MAX_NAND_DEVICE 1
122 #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl.*/
123 #define CONFIG_NAND_SPL_TEXT_BASE 0x80000000
124
125 /*
126 * IPL (Initial Program Loader, integrated inside CPU)
127 * Will load first 8k from NAND (SPL) into cache and execute it from there.
128 *
129 * SPL (Secondary Program Loader)
130 * Will load special U-Boot version (NUB) from NAND and execute it. This SPL
131 * has to fit into 8kByte. It sets up the CPU and configures the SDRAM
132 * controller and the NAND controller so that the special U-Boot image can be
133 * loaded from NAND to SDRAM.
134 *
135 * NUB (NAND U-Boot)
136 * This NAND U-Boot (NUB) is a special U-Boot version which can be started
137 * from RAM. Therefore it mustn't (re-)configure the SDRAM controller.
138 *
139 */
140 #define CONFIG_SYS_NAND_U_BOOT_DST 0x80100000 /* Load NUB to this addr */
141 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
142 /* Start NUB from this addr*/
143
144 /*
145 * Define the partitioning of the NAND chip (only RAM U-Boot is needed here)
146 */
147 #define CONFIG_SYS_NAND_U_BOOT_OFFS (256 << 10) /* Offset to RAM U-Boot image */
148 #define CONFIG_SYS_NAND_U_BOOT_SIZE (512 << 10) /* Size of RAM U-Boot image */
149
150 #define CONFIG_ENV_SIZE (4 << 10)
151 #define CONFIG_ENV_OFFSET \
152 (CONFIG_SYS_NAND_BLOCK_SIZE + CONFIG_SYS_NAND_U_BOOT_SIZE)
153 #define CONFIG_ENV_OFFSET_REDUND \
154 (CONFIG_ENV_OFFSET + CONFIG_SYS_NAND_BLOCK_SIZE)
155
156 #define CONFIG_SYS_TEXT_BASE 0x80100000
157 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
158
159 /*
160 * SDRAM Info.
161 */
162 #define CONFIG_NR_DRAM_BANKS 1
163
164 /*
165 * Cache Configuration
166 */
167 #define CONFIG_SYS_DCACHE_SIZE 16384
168 #define CONFIG_SYS_ICACHE_SIZE 16384
169 #define CONFIG_SYS_CACHELINE_SIZE 32
170
171 /*
172 * GPIO definition
173 */
174 #define GPIO_LCD_CS (2 * 32 + 21)
175 #define GPIO_AMP_EN (3 * 32 + 4)
176
177 #define GPIO_SDPW_EN (3 * 32 + 2)
178 #define GPIO_SD_DETECT (3 * 32 + 0)
179
180 #define GPIO_BUZZ_PWM (3 * 32 + 27)
181 #define GPIO_USB_DETECT (3 * 32 + 28)
182
183 #define GPIO_AUDIO_POP (1 * 32 + 29)
184 #define GPIO_COB_TEST (1 * 32 + 30)
185
186 #define GPIO_KEYOUT_BASE (2 * 32 + 10)
187 #define GPIO_KEYIN_BASE (3 * 32 + 18)
188 #define GPIO_KEYIN_8 (3 * 32 + 26)
189
190 #define GPIO_SD_CD_N GPIO_SD_DETECT /* SD Card insert detect */
191 #define GPIO_SD_VCC_EN_N GPIO_SDPW_EN /* SD Card Power Enable */
192
193 #define SPEN GPIO_LCD_CS /* LCDCS :Serial command enable */
194 #define SPDA (2 * 32 + 22) /* LCDSCL:Serial command clock input */
195 #define SPCK (2 * 32 + 23) /* LCDSDA:Serial command data input */
196
197 /* SDRAM paramters */
198 #define SDRAM_BW16 1 /* Data bus width: 0-32bit, 1-16bit */
199 #define SDRAM_BANK4 1 /* Banks each chip: 0-2bank, 1-4bank */
200 #define SDRAM_ROW 13 /* Row address: 11 to 13 */
201 #define SDRAM_COL 9 /* Column address: 8 to 12 */
202 #define SDRAM_CASL 2 /* CAS latency: 2 or 3 */
203
204 /* SDRAM Timings, unit: ns */
205 #define SDRAM_TRAS 45 /* RAS# Active Time */
206 #define SDRAM_RCD 20 /* RAS# to CAS# Delay */
207 #define SDRAM_TPC 20 /* RAS# Precharge Time */
208 #define SDRAM_TRWL 7 /* Write Latency Time */
209 #define SDRAM_TREF 15625 /* Refresh period: 8192 cycles/64ms */
210
211 #endif
212