armv8: Move secure_ram variable out of generic global data

Secure_ram variable was put in generic global data. But only ARMv8 uses this variable. Move it to ARM specific data structure. Signed-off-by: York Sun <york.sun@nxp.com>

armv8: Move secure_ram variable out of generic global data
Secure_ram variable was put in generic global data. But only ARMv8 uses this variable. Move it to ARM specific data structure. Signed-off-by: York Sun <york.sun@nxp.com>
York Sun
1 parent 3a592a1349
Showing 11 changed files with 69 additions and 63 deletions Side-by-side Diff
README
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
arch/arm/include/asm/global_data.h
board/freescale/ls1043aqds/ddr.c
board/freescale/ls1043ardb/ddr.c
board/freescale/ls2080a/ddr.c
board/freescale/ls2080aqds/ddr.c
board/freescale/ls2080ardb/ddr.c
cmd/bdinfo.c
common/board_f.c
include/asm-generic/global_data.h
@@ -3766,10 +3766,11 @@
 		You only need to set this if address zero isn't writeable
  
 - CONFIG_SYS_MEM_RESERVE_SECURE
+		Only implemented for ARMv8 for now.
 		If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory
 		is substracted from total RAM and won't be reported to OS.
 		This memory can be used as secure memory. A variable
-		gd->secure_ram is used to track the location. In systems
+		gd->arch.secure_ram is used to track the location. In systems
 		the RAM base is not zero, or RAM is divided into banks,
 		this variable needs to be recalcuated to get the address.
  
@@ -289,8 +289,8 @@
  * These tables are in DRAM. Sub tables are added to enable cache for
  * QBMan and OCRAM.
  *
- * Put the MMU table in secure memory if gd->secure_ram is valid.
- * OCRAM will be not used for this purpose so gd->secure_ram can't be 0.
+ * Put the MMU table in secure memory if gd->arch.secure_ram is valid.
+ * OCRAM will be not used for this purpose so gd->arch.secure_ram can't be 0.
  *
  * Level 1 table 0 contains 512 entries for each 1GB from 0 to 512GB.
  * Level 1 table 1 contains 512 entries for each 1GB from 512GB to 1TB.
  
  
@@ -321,13 +321,13 @@
  
 	if (el == 3) {
 		/*
-		 * Only use gd->secure_ram if the address is recalculated
+		 * Only use gd->arch.secure_ram if the address is recalculated
 		 * Align to 4KB for MMU table
 		 */
-		if (gd->secure_ram & MEM_RESERVE_SECURE_MAINTAINED)
-			level0_table = (u64 *)(gd->secure_ram & ~0xfff);
+		if (gd->arch.secure_ram & MEM_RESERVE_SECURE_MAINTAINED)
+			level0_table = (u64 *)(gd->arch.secure_ram & ~0xfff);
 		else
-			printf("MMU warning: gd->secure_ram is not maintained, disabled.\n");
+			printf("MMU warning: gd->arch.secure_ram is not maintained, disabled.\n");
 	}
 #endif
 	level1_table0 = level0_table + 512;
@@ -374,7 +374,7 @@
 	}
 	/* Set the secure memory to secure in MMU */
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-	if (el == 3 && gd->secure_ram & MEM_RESERVE_SECURE_MAINTAINED) {
+	if (el == 3 && gd->arch.secure_ram & MEM_RESERVE_SECURE_MAINTAINED) {
 #ifdef CONFIG_FSL_LSCH3
 		level2_table_secure = level2_table1 + 512;
 #elif defined(CONFIG_FSL_LSCH2)
  
@@ -382,10 +382,10 @@
 #endif
 		if (!final_secure_ddr(level0_table,
 				      level2_table_secure,
-				      gd->secure_ram & ~0x3)) {
-			gd->secure_ram |= MEM_RESERVE_SECURE_SECURED;
+				      gd->arch.secure_ram & ~0x3)) {
+			gd->arch.secure_ram |= MEM_RESERVE_SECURE_SECURED;
 			debug("Now MMU table is in secured memory at 0x%llx\n",
-			      gd->secure_ram & ~0x3);
+			      gd->arch.secure_ram & ~0x3);
 		} else {
 			printf("MMU warning: Failed to secure DDR\n");
 		}
@@ -44,6 +44,20 @@
 	unsigned long tlb_emerg;
 #endif
 #endif
+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
+#define MEM_RESERVE_SECURE_SECURED	0x1
+#define MEM_RESERVE_SECURE_MAINTAINED	0x2
+#define MEM_RESERVE_SECURE_ADDR_MASK	(~0x3)
+	/*
+	 * Secure memory addr
+	 * This variable needs maintenance if the RAM base is not zero,
+	 * or if RAM splits into non-consecutive banks. It also has a
+	 * flag indicating the secure memory is marked as secure by MMU.
+	 * Flags used: 0x1 secured
+	 *             0x2 maintained
+	 */
+	phys_addr_t secure_ram;
+#endif
  
 #ifdef CONFIG_OMAP_COMMON
 	u32 omap_boot_device;
@@ -128,7 +128,7 @@
 void dram_init_banksize(void)
 {
 	/*
-	 * gd->secure_ram tracks the location of secure memory.
+	 * gd->arch.secure_ram tracks the location of secure memory.
 	 * It was set as if the memory starts from 0.
 	 * The address needs to add the offset of its bank.
 	 */
  
@@ -139,16 +139,17 @@
 		gd->bd->bi_dram[1].size = gd->ram_size -
 					  CONFIG_SYS_DDR_BLOCK1_SIZE;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-		gd->secure_ram = gd->bd->bi_dram[1].start +
-				 gd->secure_ram -
-				 CONFIG_SYS_DDR_BLOCK1_SIZE;
-		gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+		gd->arch.secure_ram = gd->bd->bi_dram[1].start +
+				      gd->arch.secure_ram -
+				      CONFIG_SYS_DDR_BLOCK1_SIZE;
+		gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
 	} else {
 		gd->bd->bi_dram[0].size = gd->ram_size;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-		gd->secure_ram = gd->bd->bi_dram[0].start + gd->secure_ram;
-		gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+		gd->arch.secure_ram = gd->bd->bi_dram[0].start +
+				      gd->arch.secure_ram;
+		gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
 	}
 }
@@ -189,7 +189,7 @@
 void dram_init_banksize(void)
 {
 	/*
-	 * gd->secure_ram tracks the location of secure memory.
+	 * gd->arch.secure_ram tracks the location of secure memory.
 	 * It was set as if the memory starts from 0.
 	 * The address needs to add the offset of its bank.
 	 */
  
@@ -200,16 +200,17 @@
 		gd->bd->bi_dram[1].size = gd->ram_size -
 					  CONFIG_SYS_DDR_BLOCK1_SIZE;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-		gd->secure_ram = gd->bd->bi_dram[1].start +
-				 gd->secure_ram -
-				 CONFIG_SYS_DDR_BLOCK1_SIZE;
-		gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+		gd->arch.secure_ram = gd->bd->bi_dram[1].start +
+				      gd->arch.secure_ram -
+				      CONFIG_SYS_DDR_BLOCK1_SIZE;
+		gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
 	} else {
 		gd->bd->bi_dram[0].size = gd->ram_size;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-		gd->secure_ram = gd->bd->bi_dram[0].start + gd->secure_ram;
-		gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+		gd->arch.secure_ram = gd->bd->bi_dram[0].start +
+				      gd->arch.secure_ram;
+		gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
 	}
 }
@@ -177,7 +177,7 @@
 #endif
  
 	/*
-	 * gd->secure_ram tracks the location of secure memory.
+	 * gd->arch.secure_ram tracks the location of secure memory.
 	 * It was set as if the memory starts from 0.
 	 * The address needs to add the offset of its bank.
 	 */
  
@@ -188,16 +188,17 @@
 		gd->bd->bi_dram[1].size = gd->ram_size -
 					  CONFIG_SYS_LS2_DDR_BLOCK1_SIZE;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-		gd->secure_ram = gd->bd->bi_dram[1].start +
-				 gd->secure_ram -
-				 CONFIG_SYS_LS2_DDR_BLOCK1_SIZE;
-		gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+		gd->arch.secure_ram = gd->bd->bi_dram[1].start +
+				      gd->arch.secure_ram -
+				      CONFIG_SYS_LS2_DDR_BLOCK1_SIZE;
+		gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
 	} else {
 		gd->bd->bi_dram[0].size = gd->ram_size;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-		gd->secure_ram = gd->bd->bi_dram[0].start + gd->secure_ram;
-		gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+		gd->arch.secure_ram = gd->bd->bi_dram[0].start +
+				      gd->arch.secure_ram;
+		gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
 	}
  
@@ -177,7 +177,7 @@
 #endif
  
 	/*
-	 * gd->secure_ram tracks the location of secure memory.
+	 * gd->arch.secure_ram tracks the location of secure memory.
 	 * It was set as if the memory starts from 0.
 	 * The address needs to add the offset of its bank.
 	 */
  
@@ -188,16 +188,17 @@
 		gd->bd->bi_dram[1].size = gd->ram_size -
 					  CONFIG_SYS_LS2_DDR_BLOCK1_SIZE;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-		gd->secure_ram = gd->bd->bi_dram[1].start +
-				 gd->secure_ram -
-				 CONFIG_SYS_LS2_DDR_BLOCK1_SIZE;
-		gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+		gd->arch.secure_ram = gd->bd->bi_dram[1].start +
+				      gd->arch.secure_ram -
+				      CONFIG_SYS_LS2_DDR_BLOCK1_SIZE;
+		gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
 	} else {
 		gd->bd->bi_dram[0].size = gd->ram_size;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-		gd->secure_ram = gd->bd->bi_dram[0].start + gd->secure_ram;
-		gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+		gd->arch.secure_ram = gd->bd->bi_dram[0].start +
+				      gd->arch.secure_ram;
+		gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
 	}
  
@@ -177,7 +177,7 @@
 #endif
  
 	/*
-	 * gd->secure_ram tracks the location of secure memory.
+	 * gd->arch.secure_ram tracks the location of secure memory.
 	 * It was set as if the memory starts from 0.
 	 * The address needs to add the offset of its bank.
 	 */
  
@@ -188,16 +188,17 @@
 		gd->bd->bi_dram[1].size = gd->ram_size -
 					  CONFIG_SYS_LS2_DDR_BLOCK1_SIZE;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-		gd->secure_ram = gd->bd->bi_dram[1].start +
-				 gd->secure_ram -
-				 CONFIG_SYS_LS2_DDR_BLOCK1_SIZE;
-		gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+		gd->arch.secure_ram = gd->bd->bi_dram[1].start +
+				      gd->arch.secure_ram -
+				      CONFIG_SYS_LS2_DDR_BLOCK1_SIZE;
+		gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
 	} else {
 		gd->bd->bi_dram[0].size = gd->ram_size;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-		gd->secure_ram = gd->bd->bi_dram[0].start + gd->secure_ram;
-		gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+		gd->arch.secure_ram = gd->bd->bi_dram[0].start +
+				      gd->arch.secure_ram;
+		gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
 	}
  
@@ -385,9 +385,9 @@
 	}
  
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-	if (gd->secure_ram & MEM_RESERVE_SECURE_SECURED) {
+	if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) {
 		print_num("Secure ram",
-			  gd->secure_ram & MEM_RESERVE_SECURE_ADDR_MASK);
+			  gd->arch.secure_ram & MEM_RESERVE_SECURE_ADDR_MASK);
 	}
 #endif
 #if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
@@ -339,7 +339,7 @@
 	 * Record secure memory location. Need recalcuate if memory splits
 	 * into banks, or the ram base is not zero.
 	 */
-	gd->secure_ram = gd->ram_size;
+	gd->arch.secure_ram = gd->ram_size;
 #endif
 	/*
 	 * Subtract specified amount of memory to hide so that it won't
@@ -55,20 +55,6 @@
  
 	unsigned long relocaddr;	/* Start address of U-Boot in RAM */
 	phys_size_t ram_size;	/* RAM size */
-#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-#define MEM_RESERVE_SECURE_SECURED	0x1
-#define MEM_RESERVE_SECURE_MAINTAINED	0x2
-#define MEM_RESERVE_SECURE_ADDR_MASK	(~0x3)
-	/*
-	 * Secure memory addr
-	 * This variable needs maintenance if the RAM base is not zero,
-	 * or if RAM splits into non-consecutive banks. It also has a
-	 * flag indicating the secure memory is marked as secure by MMU.
-	 * Flags used: 0x1 secured
-	 *             0x2 maintained
-	 */
-	phys_addr_t secure_ram;
-#endif
 	unsigned long mon_len;	/* monitor len */
 	unsigned long irq_sp;		/* irq stack pointer */
 	unsigned long start_addr_sp;	/* start_addr_stackpointer */
...	...	@@ -3766,10 +3766,11 @@
3766	3766	You only need to set this if address zero isn't writeable
3767	3767
3768	3768	- CONFIG_SYS_MEM_RESERVE_SECURE
	3769	+ Only implemented for ARMv8 for now.
3769	3770	If defined, the size of CONFIG_SYS_MEM_RESERVE_SECURE memory
3770	3771	is substracted from total RAM and won't be reported to OS.
3771	3772	This memory can be used as secure memory. A variable
3772		- gd->secure_ram is used to track the location. In systems
	3773	+ gd->arch.secure_ram is used to track the location. In systems
3773	3774	the RAM base is not zero, or RAM is divided into banks,
3774	3775	this variable needs to be recalcuated to get the address.
3775	3776
...	...	@@ -289,8 +289,8 @@
289	289	* These tables are in DRAM. Sub tables are added to enable cache for
290	290	* QBMan and OCRAM.
291	291	*
292		- * Put the MMU table in secure memory if gd->secure_ram is valid.
293		- * OCRAM will be not used for this purpose so gd->secure_ram can't be 0.
	292	+ * Put the MMU table in secure memory if gd->arch.secure_ram is valid.
	293	+ * OCRAM will be not used for this purpose so gd->arch.secure_ram can't be 0.
294	294	*
295	295	* Level 1 table 0 contains 512 entries for each 1GB from 0 to 512GB.
296	296	* Level 1 table 1 contains 512 entries for each 1GB from 512GB to 1TB.
297	297
298	298
...	...	@@ -321,13 +321,13 @@
321	321
322	322	if (el == 3) {
323	323	/*
324		- * Only use gd->secure_ram if the address is recalculated
	324	+ * Only use gd->arch.secure_ram if the address is recalculated
325	325	* Align to 4KB for MMU table
326	326	*/
327		- if (gd->secure_ram & MEM_RESERVE_SECURE_MAINTAINED)
328		- level0_table = (u64 *)(gd->secure_ram & ~0xfff);
	327	+ if (gd->arch.secure_ram & MEM_RESERVE_SECURE_MAINTAINED)
	328	+ level0_table = (u64 *)(gd->arch.secure_ram & ~0xfff);
329	329	else
330		- printf("MMU warning: gd->secure_ram is not maintained, disabled.\n");
	330	+ printf("MMU warning: gd->arch.secure_ram is not maintained, disabled.\n");
331	331	}
332	332	#endif
333	333	level1_table0 = level0_table + 512;
...	...	@@ -374,7 +374,7 @@
374	374	}
375	375	/* Set the secure memory to secure in MMU */
376	376	#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
377		- if (el == 3 && gd->secure_ram & MEM_RESERVE_SECURE_MAINTAINED) {
	377	+ if (el == 3 && gd->arch.secure_ram & MEM_RESERVE_SECURE_MAINTAINED) {
378	378	#ifdef CONFIG_FSL_LSCH3
379	379	level2_table_secure = level2_table1 + 512;
380	380	#elif defined(CONFIG_FSL_LSCH2)
381	381
...	...	@@ -382,10 +382,10 @@
382	382	#endif
383	383	if (!final_secure_ddr(level0_table,
384	384	level2_table_secure,
385		- gd->secure_ram & ~0x3)) {
386		- gd->secure_ram \|= MEM_RESERVE_SECURE_SECURED;
	385	+ gd->arch.secure_ram & ~0x3)) {
	386	+ gd->arch.secure_ram \|= MEM_RESERVE_SECURE_SECURED;
387	387	debug("Now MMU table is in secured memory at 0x%llx\n",
388		- gd->secure_ram & ~0x3);
	388	+ gd->arch.secure_ram & ~0x3);
389	389	} else {
390	390	printf("MMU warning: Failed to secure DDR\n");
391	391	}
...	...	@@ -44,6 +44,20 @@
44	44	unsigned long tlb_emerg;
45	45	#endif
46	46	#endif
	47	+#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
	48	+#define MEM_RESERVE_SECURE_SECURED 0x1
	49	+#define MEM_RESERVE_SECURE_MAINTAINED 0x2
	50	+#define MEM_RESERVE_SECURE_ADDR_MASK (~0x3)
	51	+ /*
	52	+ * Secure memory addr
	53	+ * This variable needs maintenance if the RAM base is not zero,
	54	+ * or if RAM splits into non-consecutive banks. It also has a
	55	+ * flag indicating the secure memory is marked as secure by MMU.
	56	+ * Flags used: 0x1 secured
	57	+ * 0x2 maintained
	58	+ */
	59	+ phys_addr_t secure_ram;
	60	+#endif
47	61
48	62	#ifdef CONFIG_OMAP_COMMON
49	63	u32 omap_boot_device;
...	...	@@ -128,7 +128,7 @@
128	128	void dram_init_banksize(void)
129	129	{
130	130	/*
131		- * gd->secure_ram tracks the location of secure memory.
	131	+ * gd->arch.secure_ram tracks the location of secure memory.
132	132	* It was set as if the memory starts from 0.
133	133	* The address needs to add the offset of its bank.
134	134	*/
135	135
...	...	@@ -139,16 +139,17 @@
139	139	gd->bd->bi_dram[1].size = gd->ram_size -
140	140	CONFIG_SYS_DDR_BLOCK1_SIZE;
141	141	#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
142		- gd->secure_ram = gd->bd->bi_dram[1].start +
143		- gd->secure_ram -
144		- CONFIG_SYS_DDR_BLOCK1_SIZE;
145		- gd->secure_ram \|= MEM_RESERVE_SECURE_MAINTAINED;
	142	+ gd->arch.secure_ram = gd->bd->bi_dram[1].start +
	143	+ gd->arch.secure_ram -
	144	+ CONFIG_SYS_DDR_BLOCK1_SIZE;
	145	+ gd->arch.secure_ram \|= MEM_RESERVE_SECURE_MAINTAINED;
146	146	#endif
147	147	} else {
148	148	gd->bd->bi_dram[0].size = gd->ram_size;
149	149	#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
150		- gd->secure_ram = gd->bd->bi_dram[0].start + gd->secure_ram;
151		- gd->secure_ram \|= MEM_RESERVE_SECURE_MAINTAINED;
	150	+ gd->arch.secure_ram = gd->bd->bi_dram[0].start +
	151	+ gd->arch.secure_ram;
	152	+ gd->arch.secure_ram \|= MEM_RESERVE_SECURE_MAINTAINED;
152	153	#endif
153	154	}
154	155	}
...	...	@@ -189,7 +189,7 @@
189	189	void dram_init_banksize(void)
190	190	{
191	191	/*
192		- * gd->secure_ram tracks the location of secure memory.
	192	+ * gd->arch.secure_ram tracks the location of secure memory.
193	193	* It was set as if the memory starts from 0.
194	194	* The address needs to add the offset of its bank.
195	195	*/
196	196
...	...	@@ -200,16 +200,17 @@
200	200	gd->bd->bi_dram[1].size = gd->ram_size -
201	201	CONFIG_SYS_DDR_BLOCK1_SIZE;
202	202	#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
203		- gd->secure_ram = gd->bd->bi_dram[1].start +
204		- gd->secure_ram -
205		- CONFIG_SYS_DDR_BLOCK1_SIZE;
206		- gd->secure_ram \|= MEM_RESERVE_SECURE_MAINTAINED;
	203	+ gd->arch.secure_ram = gd->bd->bi_dram[1].start +
	204	+ gd->arch.secure_ram -
	205	+ CONFIG_SYS_DDR_BLOCK1_SIZE;
	206	+ gd->arch.secure_ram \|= MEM_RESERVE_SECURE_MAINTAINED;
207	207	#endif
208	208	} else {
209	209	gd->bd->bi_dram[0].size = gd->ram_size;
210	210	#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
211		- gd->secure_ram = gd->bd->bi_dram[0].start + gd->secure_ram;
212		- gd->secure_ram \|= MEM_RESERVE_SECURE_MAINTAINED;
	211	+ gd->arch.secure_ram = gd->bd->bi_dram[0].start +
	212	+ gd->arch.secure_ram;
	213	+ gd->arch.secure_ram \|= MEM_RESERVE_SECURE_MAINTAINED;
213	214	#endif
214	215	}
215	216	}
...	...	@@ -177,7 +177,7 @@
177	177	#endif
178	178
179	179	/*
180		- * gd->secure_ram tracks the location of secure memory.
	180	+ * gd->arch.secure_ram tracks the location of secure memory.
181	181	* It was set as if the memory starts from 0.
182	182	* The address needs to add the offset of its bank.
183	183	*/
184	184
...	...	@@ -188,16 +188,17 @@
188	188	gd->bd->bi_dram[1].size = gd->ram_size -
189	189	CONFIG_SYS_LS2_DDR_BLOCK1_SIZE;
190	190	#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
191		- gd->secure_ram = gd->bd->bi_dram[1].start +
192		- gd->secure_ram -
193		- CONFIG_SYS_LS2_DDR_BLOCK1_SIZE;
194		- gd->secure_ram \|= MEM_RESERVE_SECURE_MAINTAINED;
	191	+ gd->arch.secure_ram = gd->bd->bi_dram[1].start +
	192	+ gd->arch.secure_ram -
	193	+ CONFIG_SYS_LS2_DDR_BLOCK1_SIZE;
	194	+ gd->arch.secure_ram \|= MEM_RESERVE_SECURE_MAINTAINED;
195	195	#endif
196	196	} else {
197	197	gd->bd->bi_dram[0].size = gd->ram_size;
198	198	#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
199		- gd->secure_ram = gd->bd->bi_dram[0].start + gd->secure_ram;
200		- gd->secure_ram \|= MEM_RESERVE_SECURE_MAINTAINED;
	199	+ gd->arch.secure_ram = gd->bd->bi_dram[0].start +
	200	+ gd->arch.secure_ram;
	201	+ gd->arch.secure_ram \|= MEM_RESERVE_SECURE_MAINTAINED;
201	202	#endif
202	203	}
203	204
...	...	@@ -385,9 +385,9 @@
385	385	}
386	386
387	387	#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
388		- if (gd->secure_ram & MEM_RESERVE_SECURE_SECURED) {
	388	+ if (gd->arch.secure_ram & MEM_RESERVE_SECURE_SECURED) {
389	389	print_num("Secure ram",
390		- gd->secure_ram & MEM_RESERVE_SECURE_ADDR_MASK);
	390	+ gd->arch.secure_ram & MEM_RESERVE_SECURE_ADDR_MASK);
391	391	}
392	392	#endif
393	393	#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH)
...	...	@@ -339,7 +339,7 @@
339	339	* Record secure memory location. Need recalcuate if memory splits
340	340	* into banks, or the ram base is not zero.
341	341	*/
342		- gd->secure_ram = gd->ram_size;
	342	+ gd->arch.secure_ram = gd->ram_size;
343	343	#endif
344	344	/*
345	345	* Subtract specified amount of memory to hide so that it won't
...	...	@@ -55,20 +55,6 @@
55	55
56	56	unsigned long relocaddr; /* Start address of U-Boot in RAM */
57	57	phys_size_t ram_size; /* RAM size */
58		-#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
59		-#define MEM_RESERVE_SECURE_SECURED 0x1
60		-#define MEM_RESERVE_SECURE_MAINTAINED 0x2
61		-#define MEM_RESERVE_SECURE_ADDR_MASK (~0x3)
62		- /*
63		- * Secure memory addr
64		- * This variable needs maintenance if the RAM base is not zero,
65		- * or if RAM splits into non-consecutive banks. It also has a
66		- * flag indicating the secure memory is marked as secure by MMU.
67		- * Flags used: 0x1 secured
68		- * 0x2 maintained
69		- */
70		- phys_addr_t secure_ram;
71		-#endif
72	58	unsigned long mon_len; /* monitor len */
73	59	unsigned long irq_sp; /* irq stack pointer */
74	60	unsigned long start_addr_sp; /* start_addr_stackpointer */