13 Feb, 2020

1 commit

  • It's a very rare if at all existing occasion when ARC CPU template
    is used as is w/o any changes - in the end it's a beauty and competitive
    advantage of ARC cores to be tailored for a particular use-case - and
    so it doesn't make a lot of sense to offer template-based "-mcpu" selection.
    Given for each and every platform we end-up adding quite a few more flags
    it's logical to move "-mcpu" selection to platform's definition as well
    which we exactly do here.

    Signed-off-by: Eugeniy Paltsev
    Signed-off-by: Alexey Brodkin

    Eugeniy Paltsev
     

15 Oct, 2018

1 commit

  • By default GCC puts global non-initialized variables in COMMON section.
    And we used to ignore existence of COMMON section in our linker
    scripts though smart LD silently appended it right after .bss.

    And the problem here is variables from COMMON section even though
    require zeroing in run-time were not zeroed as they were placed
    right after __bss_end symbol.

    It was a pure luck we never faced serious problem due to this,
    but now it is fixed.

    Now as for some other architectures we'll just force GCC to put
    those global variables in normal .bss section.

    This solution is much nicer than adding COMMON section to each and
    every linker script.

    Signed-off-by: Alexey Brodkin

    Alexey Brodkin
     

05 Oct, 2018

1 commit


07 May, 2018

1 commit

  • When U-Boot started using SPDX tags we were among the early adopters and
    there weren't a lot of other examples to borrow from. So we picked the
    area of the file that usually had a full license text and replaced it
    with an appropriate SPDX-License-Identifier: entry. Since then, the
    Linux Kernel has adopted SPDX tags and they place it as the very first
    line in a file (except where shebangs are used, then it's second line)
    and with slightly different comment styles than us.

    In part due to community overlap, in part due to better tag visibility
    and in part for other minor reasons, switch over to that style.

    This commit changes all instances where we have a single declared
    license in the tag as both the before and after are identical in tag
    contents. There's also a few places where I found we did not have a tag
    and have introduced one.

    Signed-off-by: Tom Rini

    Tom Rini
     

21 Mar, 2018

1 commit


15 Feb, 2018

1 commit

  • ARC Elf32 tools by default enable usage of so-called "small data"
    section or in ARC PRM parlance "GP-relative addressing".

    The idea is to put up to 2kB of frequently used data into a separate
    location and use indirect addressing via dedicated core register (GP).
    Where GP is used as a base for offset calculation.

    And so if "-msdata" toggle is passed to the compiler either explicitly
    or implicitly (that's Elf32 tools case) it will try to put some data
    in that "small data" area and then to calculate real offset from GP
    to be encoded in instructions we need to know the base value which
    liker gets from __SDATA_BEGIN__ symbol in hte linker script.

    In U-Boot we don't use that feature and linker script doesn't define
    __SDATA_BEGIN__ which gives us the following linkage error if we use
    Elf32 tools:
    ------------------------->8-------------------
    LD u-boot
    .../bin/arc-elf32-ld.bfd: Error: Linker symbol __SDATA_BEGIN__ not found
    .../bin/arc-elf32-ld.bfd: final link failed: Bad value
    ------------------------->8-------------------

    Note if uClibc or glibc tools are used that problem doesn't happen
    because usage of "small data section" is disabled by default as not very
    useful for bigger executables. Moreover GP is just another name of r26
    so we're loosing 1 core register which is not used by the compiler as a
    generic register with "-msdata".

    Signed-off-by: Alexey Brodkin

    Alexey Brodkin
     

16 Sep, 2016

1 commit


04 Jul, 2016

1 commit


13 May, 2015

1 commit

  • As doc/README.ARC says, pre-build ARC toolchains are available at
    the Synopsys GitHub page.

    The bin files are prefixed with arc(eb)-buildroot-linux- for earlier
    releases, but with arc(eb)-snps-linux- for the latest releases.

    The symbolic links prefixed with arc(eb)-linux- are also available
    for all the release, so those prefixes can be used as the default
    CROSS_COMPILE regardless of the toolchains version/variants.

    Signed-off-by: Masahiro Yamada

    Masahiro Yamada
     

28 Mar, 2015

1 commit


13 Feb, 2015

1 commit

  • ARC HS and ARC EM are new cores based on ARCv2 ISA which is binary
    incompatible with ISAv1 (AKA ARCompact).

    Significant difference between ISAv2 and v1 is implementation of
    interrupt vector table.

    In v1 it is implemented in the same way as on many other architectures -
    as a special location where user may put whether code executed in place
    (if machine word of space is enough) or jump to a full-scale interrupt
    handler.

    In v2 interrupt table is just an array of adresses of real interrupt
    handlers. That requires a separate section for IVT that is not encoded
    as code by assembler.

    This change adds support for following cores:
    * ARC EM6 (simple 32-bit microcontroller without MMU)
    * ARC HS36 (advanced 32-bit microcontroller without MMU)
    * ARC HS38 (advanced 32-bit microcontroller with MMU)

    As a part of ARC HS38 new version of MMU (v4) was introduced.

    Also this change adds AXS131 board which is the same DW ARC SDP base board but
    with ARC HS38 CPU tile.

    Signed-off-by: Alexey Brodkin

    Alexey Brodkin
     

09 Feb, 2015

4 commits

  • This way we may have very limited set of functions implemented so we
    save some space.

    Also it allows us to build U-Boot for any ARC core with the same one
    toolchain because we don't rely on pre-built libgcc.

    For example:
    * we may use little-endian toolchain but build U-Boot for ether
    endianess
    * we may use non-multilibbed uClibc toolchain but build U-Boot for
    whatever ARC CPU flavour that current GCC supports

    Private libgcc built from generic C implementation contributes only 144
    bytes to .text section so we don't see significant degradation of size:
    --->8---
    $ arc-linux-size u-boot.libgcc-prebuilt
    text data bss dec hex filename
    222217 24912 214820 461949 70c7d u-boot.libgcc-prebuilt

    $ arc-linux-size u-boot.libgcc-private
    text data bss dec hex filename
    222361 24912 214820 462093 70d0d u-boot.libgcc-private
    --->8---

    Also I don't notice visible performance degradation compared to
    pre-built libgcc (where at least "*div*" functions are had-written in
    assembly) on typical operations of downloading 10Mb uImage over TFTP and
    bootm.

    Signed-off-by: Alexey Brodkin

    Alexey Brodkin
     
  • As a preparation to ARCv2 port submission we're moving CPU slection
    flags to a common location.
    Also it will allow us to have more flexible CPU specification, not only
    ISA version but CPU family as well checking CONFIG_ARC_CPU_xxx.

    Signed-off-by: Alexey Brodkin

    Alexey Brodkin
     
  • This change allows to keep board description clean and minimalistic.
    This is especially helpful if one board may house different CPUs with
    different features.

    It is applicable to both FPGA-based boards or those that have CPUs
    mounted on interchnagable daughter-boards.

    Signed-off-by: Alexey Brodkin

    Alexey Brodkin
     
  • Now we may select a particular version of ARC700:
    * ARC750D or
    * ARC770D

    It allows more flexible (or more fine tuned) configuration of U-Boot.
    Before that change we relied on minimal configuration but now we may
    use specific features of each CPU.

    Moreover allows us to escape manual selection of options that
    exist in both CPUs but may have say different version like MMUv2 in
    ARC750D vs MMUv3 in ARC770D.

    Signed-off-by: Alexey Brodkin

    Alexey Brodkin
     

16 Jan, 2015

1 commit

  • Depending on MMU presence in CPU there're differences in HW behavior.
    For example address of instruction that caused exception is put in
    ECR register if MMU exists and in ERET register otherwise.

    Signed-off-by: Alexey Brodkin
    Signed-off-by: Igor Guryanov

    Alexey Brodkin
     

31 Jul, 2014

1 commit


13 Mar, 2014

1 commit


05 Mar, 2014

1 commit


07 Feb, 2014

1 commit