12 Oct, 2018
1 commit
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Currently it's not possible to authenticate additional boot images in HAB
open configuration.The hab.c code is checking if the SEC_CONFIG[1] fuse is programmed prior
to calling the hab_authenticate_image() API function. Users cannot check
if their additional boot images has been correctly signed prior to closing
their device.Enable hab.c to authenticate additional boot images in open mode so HAB
events can be retrieved through get_hab_status() function.Signed-off-by: Breno Lima
Reviewed-by: Ye Li
10 Oct, 2018
2 commits
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The mmc_get_boot_dev reads from SRC SBMR register. When booting with USB
serial download, this function does not return correctly. Because SBMR won't
reflect the USB boot.The patch adds USB boot checking to this function to fix the issue.
Signed-off-by: Ye Li
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Currently the is_boot_from_usb is checking the USB PHY Powerdown bit. This
way has a defect that if we run any usb function in u-boot the checking will
always return true.This patch improves the way to avoid such problem above. A new arch-specific flag is
added to indicate if it is USB boot. We check the USB PHY PWD bit at early of boot
stage then set that flag. So any following calling of is_boot_from_usb will return
correct value.Signed-off-by: Ye Li
01 Oct, 2018
4 commits
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This is a hack for imx8qm-mek, since the offset of the flash.bin image
on eMMC differs when compared to imx8qxp-mek. Basically, the default value
is 32K, but for 8qm-mek it's 0. This can go away once the qm and qxp get
aligned (again) from this point of view.Signed-off-by: Abel Vesa
Reviewed-by: Ye Li -
Optimize the DDR4 init flow. Split the common flow
with the DDR specific timing config. So the common
flow can be reused.Signed-off-by: Bai Ping
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For LPDDR4 and DDR4, we use the same dram_timing struct
to config parameters. rename the 'lpddr4_timing' to
'dram_timing' for common use.Signed-off-by: Bai Ping
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For LPDDR4 or DDR4, the ddr phy train flow is the same.
So rename the 'lpddr4_ddrphy_train.c' to 'ddrphy_train.c'.
make it more common for reuse and move it to driver/ddr/imx8m/.Signed-off-by: Bai Ping
28 Sep, 2018
2 commits
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Enable SPL support for iMX8QM MEK board.
Signed-off-by: Abel Vesa
Reviewed-by: Ye Li -
Add implementation for ARM2 LPDDR4 board
Signed-off-by: Teo Hall
26 Sep, 2018
2 commits
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Because we power off all devices in board_quiesce_devices which is prior then
executing dm_remove_devices_flags. So any access to HW in dm_remove_devices_flags
will cause problem.
However, some drivers like ethernet which implements the pre_remove callback is always
called without any flags check, and this finally accesses FEC controller.Since we don't need to remove all devices in u-boot before starting kernel, disable
this feature when power domain is enabled.Signed-off-by: Ye Li
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Enable RTC in bootloader to avoid rtc time less than jiffies time
when linux first bootup after RTC lose power.
It will cause the issue as
MA-9554[Android_6DL_SD]RTC: Sometimes the RTC reset to the initial
time 1970 after softare reboot the first time. 40%Change-Id: I048a148003241f73345aeb8ff0fda8fc328c0efb
Signed-off-by: Zhang Bo
25 Sep, 2018
1 commit
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The BOARD_LATE_INIT config does not have input prompt, so we can't
configure it to Y in defconfig. Modify the Kconfig in mx7ulp to select
the BOARD_LATE_INIT when the boards are used.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
21 Sep, 2018
1 commit
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camera sometime can't been open once run M4 image.
ISI-CH0 probe funtion is not called when meet issue.The root cause is:
M4 image set assign resource SC_R_ISI_CH0 into m4 partition
when open camera in m4 side.
Uboot will call update_fdt_with_owned_resources to check the pd
in current dts node. it will call sc_rm_is_resource_owned to
check the pd whether in other partition, If yes, it will delete
the dts node. uboot delete isi_0 node whose pd is SC_R_ISI_CH0.Change-Id: I4e2afbed2c55caad0a9f804fa8d85511c3bfea38
Signed-off-by: zhang sanshan
20 Sep, 2018
1 commit
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When running uuu on iMX8MQ, meet USB enumeration failure in fastboot.
The root cause is a cache issue in dwc3 driver. When the issue happens, the ctrl_req in
gadget driver is allocated at 0xfe932f40, and the usb_composite_dev (cdev)
is allocated at 0xfe932f60. So after we submit the setup request (cache flushed) to USB
controller, any accessing to usb_composite_dev variable will cause the cache refill, then
when setup transfer is completed, reading the setup data in ctrl_req will gets old value from
cache not from memory.The ctrl_req is allocated by API dma_alloc_coherent, but u-boot don't have cohernet memory.
so it still needs cache maintain operations before/after HW accessing. Since the cache flush or
invalidate bases on cache line, so when the allocated memory size is not cache line aligned,
potentially it may meet such issue.This patch modifies the dma_alloc_coherent API to round the size to cache line aligned.
Signed-off-by: Ye Li
Reviewed-by: Peng Fan
18 Sep, 2018
2 commits
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Allow iMX8QXP SPL to boot from QSPI.
Signed-off-by: Abel Vesa
Reviewed-by: Ye Li -
This transforms almost all related functions from mmc specific to device
independent. This allows the container size to be computed from QSPI and other
future devices that will be supported for boot.Signed-off-by: Abel Vesa
Reviewed-by: Ye Li
17 Sep, 2018
1 commit
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add config for emmc, nand and qspi boot
Signed-off-by: Robby Cai
14 Sep, 2018
2 commits
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Add i.MX6ULZ support. the i.MX6ULZ is SW compatible
with i.MX6ULL. so most code of i.MX6ULL can be reused
by i.MX6ULZ.Signed-off-by: Bai Ping
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Default address of earlycon parameter is not correct,
use correct value for imx7ulp_evk.Test: imx7ulp_evk boots ok.
Change-Id: I2cecb6bfacca573013313ba4ae3783784ccfd506
Signed-off-by: Luo Ji
13 Sep, 2018
1 commit
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Android Auto need different bootargs for imx8q, override default
dts node "/chosen/bootargs" to change the bootargs.Change-Id: I32f741624b7d3ed7e91f36a466ae641fe11dfe8e
Signed-off-by: Luo Ji
12 Sep, 2018
9 commits
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Allow iMX8QXP SPL to boot from eMMC.
Signed-off-by: Abel Vesa
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Align the callback to ARM64 environment for
Trusty OS.TEST: AIY-3G & AIY-1G board's TIPC and AVB handler
works.Change-Id: I65806f56267a4a9278db04a462e351da181618cb
Signed-off-by: Haoran.Wang -
Fixes 9486251ced24("MLK-19494 configs: imx8qm mek android audo: correct xen physical memory")
correct text base, IPC address, memmap.
Signed-off-by: Peng Fan
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Remove some unnecessary nodes based on default dts file to reduce
u-boot boot time, add node '/config/load-environment' and set its
value as '0' to tell u-boot not to load environment variables from
eMMC.
This commit can save about 220ms on imx8qxp and about 270ms on imx8qm..Test: Boots ok on both imx8qm/imx8qxp.
Change-Id: If2010e0a537a6ae322f51c771d2eee723a089e50
Signed-off-by: Luo Ji -
When Trusty OS allocates the mem region from 0xfe0000000-0xffffffff, the get_effective_memsize
does not return correct memory size. There is a check in get_effective_memsize to find the memreg
where the u-boot is running, and return the size of that memreg as the result of get_effective_memsize.
When using aligned start, the value is 0x80200000 since it is 2MB aligned. Thus the finding of memreg
will fail and return the PHYS_SDRAM_1_SIZE because u-boot text base is 0x80020000.
This cause u-boot relocating to the high memory where has been occupied by Trusty OS.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
CPU 2/3 are fused on iMX8MD, power down the two cores in SPL to
save power.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
Since iMX8MQLite has disabled DCSS and HDMI by fuse. We should check
it when initialize HDMI splash screen and exit.Signed-off-by: Ye Li
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When framebuffer driver init is failed, we should return the err value not 0.
So the video init can exit immediately.Signed-off-by: Ye Li
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Since VPU/DCSS/HDMI are disabled on iMX8QLite, the CPU core 2/3 are disabled
on iMX8MD, we have to update kernel DTB to disable relevant nodes. The MIPI-DSI
can input from DCSS or LCDIF, so we need to check the input in DTB and onlySigned-off-by: Ye Li
11 Sep, 2018
3 commits
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iMX8MQ has two variant versions: iMX8MD and iMX8MQLite. Add dummy CPU ID
for these two, and check the fuses to get correct versions.Signed-off-by: Ye Li
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Add DDR4 init codes, u-boot dtb and defconfig to support DDR4 EVK.
The DDR4 EVK removed eMMC and Flexspi, but use NAND instead. Current
codes support to boot from SD and enable NAND access in regular u-boot.Signed-off-by: Ye Li
Acked-by: Peng Fan -
Read boot reason from SRC(system reset controller) and report
it to kernel by "androidboot.bootreason=<>" kernel commandline.
This is enabled on imx6/7/7ulp/8m, imx8 will report default value
"androidboot.bootreason=reboot" since it can't get such info on
A core at u-boot stage.Test: Boot reason report ok on imx6qp/imx7ulp/imx8qxp.
Change-Id: I03effaa03bc513bec6153e82c1a04e29c07e7db8
Signed-off-by: Ji Luo
10 Sep, 2018
1 commit
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The script used to add qspi header to u-boot.imx/u-boot-dtb.imx fails to
build out of tree when using O= option.Some problems found:
1. The qspi-header file need to be copied out of source tree.
2. In mkimage flags, we need to add $(QSPI-HEADER) and %$(PLUGIN).bin.
Otherwise it will fails to filter out $(QSPI-HEADER) and $(PLUGIN).bin because the $(PLUGIN) is
extend to full path.
3. u-boot-dtb.imx also need update to add qspi-header.Signed-off-by: Ye Li
07 Sep, 2018
2 commits
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To support the uuu, pack the common qspi header with u-boot binary for
i.MX6/7 qspi u-boot.Signed-off-by: Han Xu
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Enable fastboot for i.MX7d qspi u-boot. Decouple mmc_env with
CONFIG_ENV_IS_IN_MMC. Disable CONFIG_SPI_FLASH_USE_4K_SECTORS for better
erase performance.Signed-off-by: Han Xu
06 Sep, 2018
2 commits
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We read the ROM version to determine the CPU revision before B1 chip.
The rom version is 4 bytes word, it has major version at low byte,
minor version at second byte.On B0.1 chip, the value is 0x1020 not 0x20, if reading the word and comparing
with 0x20, the result is wrong.Fix the issue by only reading the lowest byte for major version.
Signed-off-by: Ye Li
(cherry picked from commit 8d0812e63155cca91ecb78c630a450e7d5e5fd00) -
At default, u-boot reserves the memory from SP-4KB to DRAM end for lmb in arch_lmb_reserve.
So lmb won't allocate any memory from it.
But we found the 4K gap for SP is not enough now, because some FDT updating operations are added
in our u-boot before jumping to kernel, which needs large stack. This causes the lmb allocated memory
is overwritten by stack.Fix the issue by implementing the board_lmb_reserve to reserve from SP-16KB to memory end for lmb.
Signed-off-by: Ye Li
(cherry picked from commit 37835dc6c8dc797f5848cd696ab8a494aa93262d)
04 Sep, 2018
3 commits
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The mscale B1 uses OCOTP_HW_OCOTP_READ_FUSE_DATA register for chip id.
It returns a magic number 0xff0055aa.
Update get_cpu_rev to support this way, also enable OCOTP clock to allow
access OCOTP register.Signed-off-by: Ye Li
(cherry picked from commit 866631c2140b9352c6f74ec36d1a51fea40c0445) -
Add common CHIP_REV_2_1 for chip revision 2.1
Signed-off-by: Ye Li
(cherry picked from commit f7fc83ffb0f204d9f6ec6c77c08d23869d9ecde4) -
ipg_stop from GPC is not connected to WDOG directly, the sec_debug clock is
used to sample the ipg_stop from GPC. So when this clock is off, ipg_stop input
of WDOG can’t assert, WDOG will fail to stop in DSM mode.
Enable this clock forever in SPL, so other SW don't need to touch it.Signed-off-by: Ye Li
Tested-by: Bai Ping
(cherry picked from commit 1da6c9b3a837d15c25086af449462d5e8b56c290)