24 May, 2014
5 commits
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Patch f33b9bd3
[arm: omap3: Enable clocks for peripherals only if they are used]
breaks SPL booting on Overo. Since some gpio inputs are
read to detect the board revision. But with this patch above, the
clocks to the GPIO subsystems are not enabled per default any more.
The GPIO banks need to be configured specifically now.Signed-off-by: Ash Charles
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The linux kernel is at nand0,3 using the current layout, but is best
accessed through the partition label "linux". Since CONFIG_CMD_MTDPARTS is
defined the CONFIG_JFFS2 settings are unreferenced; use "setenv partition
rootfs" to set the default mtd partition for jffs2.Signed-off-by: Peter A. Bigot
Tested-by: Ash Charles -
Linux kernel at version 3.5 is about 3.5 MiB; test kernels for 3.10 exceed 4
MiB. Prepare for future upgrades by increasing the NAND partition now.Signed-off-by: Peter A. Bigot
Tested-by: Ash Charles -
The NAND linux partition format default was changed from jffs2 to ubi in
254973e6df0e48f1a72b67905185c774dcd9f394 but the corresponding commands were
not enabled.Signed-off-by: Peter A. Bigot
Tested-by: Ash Charles -
Adapted from d70f5480 described below.
commit d70f54808dfa83b574e1239c3eccbcf3317343e1
Author: Javier Martinez Canillas
Date: Mon Jan 7 03:51:20 2013 +0000omap4: allow the use of a plain text env file instead boot scripts
For production systems it is better to use script images since
they are protected by checksums and carry valuable information like
name and timestamp. Also, you can't validate the content passed to
env import.But for development, it is easier to use the env import command and
plain text files instead of script-images.Since both OMAP4 supported boards (Panda and TI SDP4430) are used
primarily for development, this patch allows U-Boot to load env var
from a text file in case that an boot.scr script-image is not present.The variable uenvcmd (if existent) will be executed (using run) after
uEnv.txt was loaded. If uenvcmd doesn't exist the default boot sequence
will be started.Signed-off-by: Javier Martinez Canillas
Acked-by: Nishanth MenonSigned-off-by: Peter A. Bigot
Tested-by: Ash Charles
20 May, 2014
2 commits
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Conflicts:
boards.cfgConflicts were trivial once u-boot-arm/master boards.cfg was
reformatted (commit 6130c146) to match u-boot/master's own
reformatting (commit 1b37fa83). -
Apply command "tools/reformat.py -i -d '-' -s 8 boards0.cfg && mv boards0.cfg boards.cfg" in preparation of
pull request from ARM to main tree.
17 May, 2014
17 commits
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The new 768KB u-boot image size requires changes for
SRIO/PCIE boot. These addresses need to be updated to
appropriate locations.The updated addresses are used to configure the SRIO/PCIE
inbound windows for the boot, and they must be aligned
with the window size based on the SRIO/PCIE modules requirement.
So for the 768KB u-boot image, the inbound window cannot be set
with 0xfff40000 base address and 0xc0000 size, it should be
extended to 1MB size and the base address can be aligned with
the size.Signed-off-by: Liu Gang
Reviewed-by: York Sun -
AFAICT, c=ffe does nothing and was a typo from the original commit
d17123696c6180ac8b74fbd318bf14652623e982 "powerpc/p4080: Add support
for the P4080DS board" and just kept on getting duplicated
in subsequently added board config files.Signed-off-by: Kim Phillips
Acked-by: Edward Swarthout
Reviewed-by: York Sun -
In the earlier patches, the SPL/TPL fraamework was introduced.
For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
the DDR according to the SPD and loads the final uboot image into DDR, then
jump to the DDR to begin execution.For NAND booting way, the nand SPL has size limitation on some board(e.g.
P1010RDB), it can not be more than 4KB, we can call it "minimal SPL", So the
dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is
loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD
and loads the final uboot image into DDR,then jump to the DDR to begin execution.This patch enabled SPL/TPL for P1_P2_RDB to support starting from NAND/SD/SPI
flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL.
Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to
execute, so the section .resetvec is no longer needed.Signed-off-by: Prabhakar Kushwaha
Reviewed-by: York Sun -
In case of secure boot from NAND, CSPR and FTIM settings are
same as non-secure NAND boot. CSPR0 is configured as NAND and
CSPR1 is configured as NOR.Signed-off-by: Aneesh Bansal
Reviewed-by: York Sun -
P1020 SoC which has two USB controllers, but only first one is used
on this platform.Signed-off-by: Ramneek Mehresh
Reviewed-by: York Sun -
Define and use CONTROL_REGISTER_W1C_MASK to make sure that
w1c bits of usb control register do not get reset while
writing any other bitSigned-off-by: Nikhil Badola
Signed-off-by: Ramneek Mehresh
Reviewed-by: York Sun -
B4460 differs from B4860 only in number of CPU cores,
hence used existing support for B4860.
B4460 has 2 PPC cores whereas B4860 has 4 PPC cores.Signed-off-by: Shaveta Leekha
Signed-off-by: Sandeep Singh
Signed-off-by: Poonam Aggrwal
Reviewed-by: York Sun -
T4160RDB shares the same platform as T4240RDB. T4160 is
a low power version of T4240, with the eight e6500 cores,
two DDR3 controllers, and same peripheral bus interfaces.Signed-off-by: Chunhe Lan
Reviewed-by: York Sun -
By default, all PEX inbound windows PEX_PEXIWARn[TRGT] are
mapped to 0xF, which is local memory. But for BSC9132, 0xF
is CCSR, 0x0 is local memory.Signed-off-by: Minghuan Lian
Signed-off-by: Chunhe Lan
Reviewed-by: York Sun -
T104xrdb has several sleep management signals that are used for deep
sleep. They are enabled by OS to enter deep sleep and should be
disabled by u-boot when cores wake up.Signed-off-by: Tang Yuantian
Reviewed-by: York Sun -
According to AN3638, CRC of NXID v1 is at the end of the
256-byte I2C memory. The wrong CRC32 offset prevents Uboot
from reading system information from EEPROM. No NXID v0 is
being used on Freescale boards.Signed-off-by: Ebony Zhu
Reviewed-by: York Sun -
This patch adds support for VSC8664 PHY module which can
be found on Freescale's T4240RDB boards.Signed-off-by: Chunhe Lan
Reviewed-by: York Sun -
Conflicts:
boards.cfgTrivial conflict, maintainer change plus board addition
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There is an unfortunate bug in the signoff suppression logic. The first
pass is performed with 'git log', and all signoffs are added to the
supression set, such that the second time (when processing the real
patches) we always suppress the signoffs.Correct this by only suppressing signoffs in the second pass.
Signed-off-by: Simon Glass
Tested-by: Michal Simek
Tested-by: Andreas Bießmann -
Because sandbox is not a real hardware, setting vendor=sandbox is
almost meaningless.This commit sets sandbox's vendor field to '-'.
It is a good thing that it decreases one level directory hierarchy.
The files board/sandbox/sandbox/* have been moved to board/sandbox/*.Signed-off-by: Masahiro Yamada
Acked-by: Simon Glass
Tested-by: Simon Glass -
This reverts commit 258060905e04fe2eb509756ef3b37e23e220a2d6.
Conflicts:
boards.cfgWrong patch 25806090 was applied by accident. Revert it.
Signed-off-by: Masahiro Yamada
Cc: Simon Glass
Acked-by: Simon Glass
16 May, 2014
2 commits
15 May, 2014
9 commits
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Exception handling is basically identical for all ARM targets.
Factorize it out of the various start.S files and into a
single vectors.S file, and adjust linker scripts accordingly.Signed-off-by: Albert ARIBAUD
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Signed-off-by: Albert ARIBAUD
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PXA start.S has a PXA (variant) specific check in
start.S. Move it to cpuinfo.c.Signed-off-by: Albert ARIBAUD
Acked-by: Marek Vasut -
CPUs arm946es and sa1100 both define the reset_cpu()
function in their start.S file. Move this cpu-specific code
into cpu.c so that start.S only contains ARM generic code.Signed-off-by: Albert ARIBAUD
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arch/arm/cpu/arm1136/start.S contain a cache flushing function.
Remove the function and move its code into arch/arm/lib/cache.c.Signed-off-by: Albert ARIBAUD
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We only need to read in the size of struct image_header and thus don't
need to know the page size of the nand device.Cc: Scott Wood
Signed-off-by: Tim Harvey
Acked-by: Stefano Babic
Acked-by: Scott Wood
14 May, 2014
5 commits
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These are used only once, so their is no need to have them global.
This also stops mvtwsi from using any bss vars making it easier to use
before dram init (to talk to the pmic to set the dram voltage).Signed-off-by: Hans de Goede
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The TWSI_FREQUENCY macro was wrong in 2 ways:
1) It was casting the result of the calculations to an u8, while i2c clk
rates are often >= 100Khz which won't fit in a u8, drop the cast.
2) It had an extra factor of 2 in the divider which neither the datasheet nor
the Linux driver have.The comment for the default value was wrongly saying that m lives in
bits 4-7, while in reality it is in bits 3-6, as can be seen from the correct
shift by 3 used in i2c_init().While at it remove the unused twsi_actual_speed variable.
Signed-off-by: Hans de Goede
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We need to flip only one bit not assign.
Signed-off-by: Marek Belisko
Acked-by: Pekon Gupta -
This adds the Gumstix Pepper[1] single-board computer based on the
TI AM335x processor. Schematics are available [2].[1] https://store.gumstix.com/index.php/products/344/
[2] https://pubs.gumstix.com/boards/PEPPER/Signed-off-by: Ash Charles
[trini: Move 'cdev' in board.c down to under #ifdef's where it's used]
Signed-off-by: Tom Rini -
The commits
commit b7b5f1a16ca66dfdd817e7339f0e263a5b9f2758
Author: Albert ARIBAUD
da850evm, da850_am18xxevm: convert to CONFIG_SPL_MAX_FOOTPRINTand
commit e7497891e34efe5cb2b3a3dc7c6c096c012ede28
Author: Albert ARIBAUD
cam_enc_4xx: convert to CONFIG_SPL_MAX_FOOTPRINTreplaced CONFIG_SPL_MAX_SIZE by CONFIG_SPL_MAX_FOOTPRINT. However,
CONFIG_SPL_MAX_SIZE is used in the Makefile for padding the SPL
when preparing an u-boot.ais image. By removing CONFIG_SPL_MAX_SIZE
said commits broke the ais image of the da850evm and cam_enc_4xx
configurations.This patch converts the u-boot.ais target to use CONFIG_SPL_PAD_TO
instead of CONFIG_SPL_MAX_SIZE for padding the SPL and adds
a #define CONFIG_SPL_PAD_TO where it is required.Signed-off-by: Christian Riesch
Reported-by: Tom Taylor
Cc: Sudhakar Rajashekhara
Cc: Heiko Schocher
Cc: Albert ARIBAUD
