Eric Lee / smarc-uboot

13 Jan, 2014

2 commits

11 Jan, 2014

3 commits

10 Dec, 2013

1 commit

12 Nov, 2013

2 commits

  • 4700219dc   spi: define SPI_XFER_ONCE ... Browse Code »

    The flag combination "SPI_XFER_BEGIN | SPI_XFER_END" is a common use
    case of spi_xfer, and it can easily cause an already long line (spi_xfer
    takes 5 parameters) to go over the 80 character limit.

    define SPI_XFER_ONCE to be a shorter version of the above flag combination.

    Cc: Tom Rini
    Cc: Jagannadha Sutradharudu Teki
    Cc: Igor Grinberg
    Signed-off-by: Nikita Kiryanov

    Nikita Kiryanov
     
  • 5753d09b1   spi: omap3: add support for more word lengths ... Browse Code »

    Current implementation only supports 8 bit word lengths, even though
    omap3 can handle anything between 4 and 32.

    Update the spi interface to support changing the SPI word length,
    and implement it in omap3_spi driver to support the full range of
    possible word lengths.
    This implementation is backwards compatible by defaulting to the old
    behavior of 8 bit word lengths.
    Also, it required a change to the omap3_spi non static I/O functions,
    but since they are not used anywhere else, no collateral changes are required.

    Cc: Tom Rini
    Cc: Jagannadha Sutradharudu Teki
    Cc: Igor Grinberg
    Signed-off-by: Nikita Kiryanov

    Nikita Kiryanov
     

16 Oct, 2013

1 commit

07 Oct, 2013

3 commits

  • ce22b922d   sf: Minor cleanups ... Browse Code »

    - Add spaces, tabs
    - Commenting.
    - Rearrange code.
    - Add static qualifier for missing func.
    - Remove memory_map from ramtron.c
    - Ramtron: spi_flash_internal.h -> sf_internal.h

    Signed-off-by: Jagannadha Sutradharudu Teki

    Jagannadha Sutradharudu Teki
     
  • 004f15b60   sf: Add memory mapped read support ... Browse Code »

    Qspi controller can have a memory mapped port which can be used for
    data read. Added support to enable memory mapped port read.

    This patch enables the following:
    - It enables exchange of memory map address between mtd and qspi
    through the introduction of "memory_map" flag.
    - Add support to communicate to the driver that memory mapped
    transfer is to be started through introduction of new flags like
    "SPI_XFER_MEM_MAP" and "SPI_XFER_MEM_MAP_END".

    This will enable the spi controller to do memory mapped configurations
    if required.

    Signed-off-by: Sourav Poddar
    Reviewed-by: Jagannadha Sutradharudu Teki

    Poddar, Sourav
     
  • 1b1bd9a7b   spi: spi cleanups ... Browse Code »

    - Rearranged multi-line comment style.
    - Add tabs.
    - Add spaces.

    Signed-off-by: Jagannadha Sutradharudu Teki

    Jagannadha Sutradharudu Teki
     

24 Jul, 2013

1 commit

26 Jun, 2013

1 commit

03 Jun, 2013

1 commit

  • bb786b84b   spi: Add support for preamble bytes ... Browse Code »

    A SPI slave may take time to react to a request. For SPI flash devices
    this time is defined as one bit time, or a whole byte for 'fast read'
    mode.

    If the SPI slave is another CPU, then the time it takes to react may
    vary. It is convenient to allow the slave device to tag the start of
    the actual reply so that the host can determine when this 'preamble'
    finishes and the actual message starts.

    Add a preamble flag to the available SPI flags. If supported by the
    driver then it will ignore any received bytes before the preamble
    on each transaction. This ensures that reliable communication with
    the slave is possible.

    Signed-off-by: Simon Glass
    Signed-off-by: Rajeshwari Shinde
    Reviewed-by: Jagannadha Sutradharudu Teki

    Rajeshwari Shinde
     

19 Mar, 2013

2 commits

  • 0c456cee9   spi: Add parameter for maximum write size ... Browse Code »

    Some SPI controllers (e.g. Intel ICH) have a limit on the number of SPI
    bytes that can be written at a time. Add this as a parameter so that
    clients of the SPI interface can respect this value.

    Signed-off-by: Simon Glass

    Simon Glass
     
  • ba6c3ce9b   spi: Add function to allocate a new SPI slave ... Browse Code »

    At present it is difficult to extend the SPI structure since all
    drivers allocate it themselves, and few of them zero all fields. Add
    a new function spi_alloc_slave() which can be used by SPI drivers
    to perform this allocation, and thus ensure that all drivers can
    better cope with SPI structure changes.

    Signed-off-by: Simon Glass

    Simon Glass
     

29 Apr, 2011

1 commit

25 Apr, 2011

1 commit

02 Jul, 2008

1 commit

04 Jun, 2008

1 commit

  • d255bb0e7   SPI API improvements ... Browse Code »

    This patch gets rid of the spi_chipsel table and adds a handful of new
    functions that makes the SPI layer cleaner and more flexible.

    Instead of the spi_chipsel table, each board that wants to use SPI
    gets to implement three hooks:
    * spi_cs_activate(): Activates the chipselect for a given slave
    * spi_cs_deactivate(): Deactivates the chipselect for a given slave
    * spi_cs_is_valid(): Determines if the given bus/chipselect
    combination can be activated.

    Not all drivers may need those extra functions however. If that's the
    case, the board code may just leave them out (assuming they know what
    the driver needs) or rely on the linker to strip them out (assuming
    --gc-sections is being used.)

    To set up communication parameters for a given slave, the driver needs
    to call spi_setup_slave(). This returns a pointer to an opaque
    spi_slave struct which must be passed as a parameter to subsequent SPI
    calls. This struct can be freed by calling spi_free_slave(), but most
    driver probably don't want to do this.

    Before starting one or more SPI transfers, the driver must call
    spi_claim_bus() to gain exclusive access to the SPI bus and initialize
    the hardware. When all transfers are done, the driver must call
    spi_release_bus() to make the bus available to others, and possibly
    shut down the SPI controller hardware.

    spi_xfer() behaves mostly the same as before, but it now takes a
    spi_slave parameter instead of a spi_chipsel function pointer. It also
    got a new parameter, flags, which is used to specify chip select
    behaviour. This may be extended with other flags in the future.

    This patch has been build-tested on all powerpc and arm boards
    involved. I have not tested NIOS since I don't have a toolchain for it
    installed, so I expect some breakage there even though I've tried
    fixing up everything I could find by visual inspection.

    I have run-time tested this on AVR32 ATNGW100 using the atmel_spi and
    DataFlash drivers posted as a follow-up. I'd like some help testing
    other boards that use the existing SPI API.

    But most of all, I'd like some comments on the new API. Is this stuff
    usable for everyone? If not, why?

    Changed in v4:
    - Build fixes for various boards, drivers and commands
    - Provide common struct spi_slave definition that can be extended by
    drivers
    - Pass a struct spi_slave * to spi_cs_activate and spi_cs_deactivate
    - Make default bus and mode build-time configurable
    - Override default SPI bus ID and mode on mx32ads and imx31_litekit.

    Changed in v3:
    - Add opaque struct spi_slave for controller-specific data associated
    with a slave.
    - Add spi_claim_bus() and spi_release_bus()
    - Add spi_free_slave()
    - spi_setup() is now called spi_setup_slave() and returns a
    struct spi_slave
    - soft_spi now supports four SPI modes (CPOL|CPHA)
    - Add bus parameter to spi_setup_slave()
    - Convert the new i.MX32 SPI driver
    - Convert the new MC13783 RTC driver

    Changed in v2:
    - Convert the mpc8xxx_spi driver and the mpc8349emds board to the
    new API.

    Signed-off-by: Haavard Skinnemoen
    Tested-by: Guennadi Liakhovetski

    Haavard Skinnemoen
     

18 Apr, 2008

1 commit

  • 38254f45b   New i.MX31 SPI driver ... Browse Code »

    This is an SPI driver for i.MX and MXC based SoCs from Freescale. So far
    only implemented and tested on i.MX31, can with a modified register layout
    and definitions be used for i.MX27, I think, MXC CPUs have similar SPI
    controllers too.

    Signed-off-by: Guennadi Liakhovetski

    Guennadi Liakhovetski
     

26 Sep, 2002

1 commit