Eric Lee / smarc-uboot

25 Sep, 2014

1 commit

  • 535aad29f   MAINTAINERS: comment out blank M: field ... Browse Code »

    Since commit ddaf5c8f3030050fcd356a1e49e3ee8f8f52c6d4
    (patman: RunPipe() should not pipe stdout/stderr unless asked),
    Patman spits lots of "Invalid MAINTAINERS address: '-'"
    error messages for patches with global changes.
    It takes too long for Patman to process them.

    Anyway, "M: -" does not carry any important information.
    Rather, it is just like a place holder in case of assigning
    a new board maintainer. Let's comment out.

    This commit can be reproduced by the following command:

    find . -name MAINTAINERS | xargs sed -i -e '/^M:[[:blank:]]*-$/s/^/#/'

    Signed-off-by: Masahiro Yamada

    Masahiro Yamada
     

14 Sep, 2014

1 commit

  • 461be2f96   kconfig: remove redundant "string" type in arch and board Kconfigs ... Browse Code »
    44

    Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME}
    are specified in arch/Kconfig.

    We can delete the ones in arch and board Kconfig files.

    This commit can be easily reproduced by the following command:

    find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e '
    /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ {
    N
    s/\n[[:space:]]*string//
    }
    '

    Signed-off-by: Masahiro Yamada

    Masahiro Yamada
     

30 Jul, 2014

2 commits

  • 93d4334f7   Add board MAINTAINERS files ... Browse Code »

    We have switched to Kconfig and the boards.cfg file is going to
    be removed. We have to retrieve the board status and maintainers
    information from it.

    The MAINTAINERS format as in Linux Kernel would be nice
    because we can crib the scripts/get_maintainer.pl script.

    After some discussion, we chose to put a MAINTAINERS file under each
    board directory, not the top-level one because we want to collect
    relevant information for a board into a single place.

    TODO:
    Modify get_maintainer.pl to scan multiple MAINTAINERS files.

    Signed-off-by: Masahiro Yamada
    Suggested-by: Tom Rini
    Acked-by: Simon Glass

    Masahiro Yamada
     
  • dd84058d2   kconfig: add board Kconfig and defconfig files ... Browse Code »

    This commit adds:
    - arch/${ARCH}/Kconfig
    provide a menu to select target boards
    - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
    set CONFIG macros to the appropriate values for each board
    - configs/${TARGET_BOARD}_defconfig
    default setting of each board

    (This commit was automatically generated by a conversion script
    based on boards.cfg)

    In Linux Kernel, defconfig files are located under
    arch/${ARCH}/configs/ directory.
    It works in Linux Kernel since ARCH is always given from the
    command line for cross compile.

    But in U-Boot, ARCH is not given from the command line.
    Which means we cannot know ARCH until the board configuration is done.
    That is why all the "*_defconfig" files should be gathered into a
    single directory ./configs/.

    Signed-off-by: Masahiro Yamada
    Acked-by: Simon Glass

    Masahiro Yamada
     

23 Jul, 2014

1 commit

  • 9d0456822   powerpc/mpc85xx: Check return value of find_tlb_idx ... Browse Code »

    find_tlb_idx() is called in board_early_init_r() on multiple boards.
    The return value is not checked before being used to disable a TLB.
    In normal case the return value wouldn't be -1. In case of a mis-
    configuration during porting to a new board, checking the return value
    may be helpful to reveal some user errors.

    Signed-off-by: York Sun

    York Sun
     

17 May, 2014

1 commit

  • bc2d40ca1   board/p1_p2_rdb:Enable p1_p2_rdb boot from NAND/SD/SPI in SPL ... Browse Code »

    In the earlier patches, the SPL/TPL fraamework was introduced.
    For SD/SPI flash booting way, we introduce the SPL to enable a loader stub. The
    SPL was loaded by the code from the internal on-chip ROM. The SPL initializes
    the DDR according to the SPD and loads the final uboot image into DDR, then
    jump to the DDR to begin execution.

    For NAND booting way, the nand SPL has size limitation on some board(e.g.
    P1010RDB), it can not be more than 4KB, we can call it "minimal SPL", So the
    dynamic DDR driver doesn't fit into this minimum SPL. We added the TPL that is
    loaded by the the minimal SPL. The TPL initializes the DDR according to the SPD
    and loads the final uboot image into DDR,then jump to the DDR to begin execution.

    This patch enabled SPL/TPL for P1_P2_RDB to support starting from NAND/SD/SPI
    flash with SPL framework and initializing the DDR according to SPD in the SPL/TPL.
    Because the minimal SPL load the TPL to L2 SRAM and the jump to the L2 SRAM to
    execute, so the section .resetvec is no longer needed.

    Signed-off-by: Prabhakar Kushwaha
    Reviewed-by: York Sun

    Prabhakar Kushwaha
     

22 Jan, 2014

1 commit

26 Nov, 2013

1 commit

01 Nov, 2013

1 commit

15 Oct, 2013

1 commit

10 Aug, 2013

1 commit

  • c63e13701   powerpc/mpc8xxx: Add memory reset control ... Browse Code »

    JEDEC spec requires the clocks to be stable before deasserting reset
    signal for RDIMMs. Clocks start when any chip select is enabled and
    clock control register is set. This patch also adds the interface to
    toggle memory reset signal if needed by the boards.

    Signed-off-by: York Sun

    York Sun
     

24 Jul, 2013

1 commit

04 Feb, 2013

1 commit

29 Jul, 2012

1 commit

07 Jul, 2012

1 commit

25 Apr, 2012

1 commit

  • 5d065c3e1   powerpc/85xx: don't display address map size (32-bit vs. 36-bit) during boot ... Browse Code »

    Most 85xx boards can be built as a 32-bit or a 36-bit. Current code sometimes
    displays which of these is actually built, but it's inconsistent. This is
    especially problematic since the "default" build for a given 85xx board can
    be either one, so if you don't see a message, you can't always know which
    size is being used. Not only that, but each board includes code that displays
    the message, so there is duplication.

    The 'bdinfo' command has been updated to display this information, so
    we don't need to display it at boot time. The board-specific code is
    deleted.

    Signed-off-by: Timur Tabi
    Signed-off-by: Andy Fleming

    Timur Tabi
     

08 Nov, 2011

1 commit

16 Oct, 2011

1 commit

  • 464c79207   punt unused clean/distclean targets ... Browse Code »

    The top level Makefile does not do any recursion into subdirs when
    cleaning, so these clean/distclean targets in random arch/board dirs
    never get used. Punt them all.

    MAKEALL didn't report any errors related to this that I could see.

    Signed-off-by: Mike Frysinger

    Mike Frysinger
     

12 Jul, 2011

1 commit

28 Apr, 2011

1 commit

21 Apr, 2011

1 commit

  • 063c12633   tsec: Convert tsec to use PHY Lib ... Browse Code »

    This converts tsec to use the new PHY Lib. All of the old PHY support
    is ripped out. The old MDIO driver is split off, and placed in
    fsl_mdio.c. The initialization is modified to initialize the MDIO
    driver as well. The powerpc config file is modified to configure PHYLIB
    if TSEC_ENET is configured.

    Signed-off-by: Mingkai Hu
    Signed-off-by: Andy Fleming
    Signed-off-by: Kumar Gala
    Acked-by: Detlev Zundel

    Andy Fleming
     

04 Apr, 2011

9 commits

24 Mar, 2011

1 commit

20 Jan, 2011

2 commits

14 Jan, 2011

4 commits

  • 06eb4d8c6   powerpc/85xx: Rework P1_P2_RDB pci_init_board to use common FSL PCIe code ... Browse Code »

    Remove duplicated code in P1_P2_RDB boards and utilize the common
    fsl_pcie_init_board(). We also now dynamically setup the LAWs for PCI
    controllers based on which PCIe controllers are enabled.

    Signed-off-by: Kumar Gala

    Kumar Gala
     
  • 38dba0c2f   mpc85xx boards: initdram() cleanup/bugfix ... Browse Code »

    Correct initdram to use phys_size_t to represent the size of
    dram; instead of changing this all over the place, and correcting
    all the other random errors I've noticed, create a
    common initdram that is used by all non-corenet 85xx parts. Most
    of the initdram() functions were identical, with 2 common differences:

    1) DDR tlbs for the fixed_sdram case were set up in initdram() on
    some boards, and were part of the tlb_table on others. I have
    changed them all over to the initdram() method - we shouldn't
    be accessing dram before this point so they don't need to be
    done sooner, and this seems cleaner.

    2) Parts that require the DDR11 erratum workaround had different
    implementations - I have adopted the version from the Freescale
    errata document. It also looks like some of the versions were
    buggy, and, depending on timing, could have resulted in the
    DDR controller being disabled. This seems bad.

    The xpedite boards had a common/fsl_8xxx_ddr.c; with this
    change only the 517 board uses this so I have moved the ddr code
    into that board's directory in xpedite517x.c

    Signed-off-by: Becky Bruce
    Tested-by: Paul Gortmaker
    Signed-off-by: Kumar Gala

    Becky Bruce
     
  • 058d7dc7b   powerpc/85xx: Cleanup SGMII detection and reporting ... Browse Code »

    Use new is_serdes_configured to determine if TSECs are in SGMII mode and
    report that on the various boards that use or can be configured in SGMII
    mode in board_eth_init() instead of in the PCI init code.

    Signed-off-by: Kumar Gala

    Kumar Gala
     
  • 5d27e02c0   powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured ... Browse Code »

    Now that we have serdes support for all 85xx/86xx/Pxxx chips we can
    replace the is_fsl_pci_cfg() code with the is_serdes_configured().

    Signed-off-by: Kumar Gala

    Kumar Gala
     

18 Nov, 2010

1 commit

  • 6d8962e81   Switch from archive libraries to partial linking ... Browse Code »

    Before this commit, weak symbols were not overridden by non-weak symbols
    found in archive libraries when linking with recent versions of
    binutils. As stated in the System V ABI, "the link editor does not
    extract archive members to resolve undefined weak symbols".

    This commit changes all Makefiles to use partial linking (ld -r) instead
    of creating library archives, which forces all symbols to participate in
    linking, allowing non-weak symbols to override weak symbols as intended.
    This approach is also used by Linux, from which the gmake function
    cmd_link_o_target (defined in config.mk and used in all Makefiles) is
    inspired.

    The name of each former library archive is preserved except for
    extensions which change from ".a" to ".o". This commit updates
    references accordingly where needed, in particular in some linker
    scripts.

    This commit reveals board configurations that exclude some features but
    include source files that depend these disabled features in the build,
    resulting in undefined symbols. Known such cases include:
    - disabling CMD_NET but not CMD_NFS;
    - enabling CONFIG_OF_LIBFDT but not CONFIG_QE.

    Signed-off-by: Sebastien Carlier

    Sebastien Carlier
     

15 Nov, 2010

2 commits

  • e7060dc57   mpc85xx: Fix SERDES/eTSEC message indentation ... Browse Code »

    Previously some mpc85xx boards printed indented messages such as the
    following on bootup:
    printf(" eTSEC4 is in sgmii mode.\n");
    printf(" Serdes2 disalbed\n");

    The bootup appearance looks cleaner if the indentation is removed which
    aligns these messages with other bootup output.

    Signed-off-by: Peter Tyser
    CC: galak@kernel.crashing.org

    Peter Tyser
     
  • 8ca78f2c8   fsl: Clean up printing of PCI boot info ... Browse Code »

    Previously boards used a variety of indentations, newline styles, and
    colon styles for the PCI information that is printed on bootup. This
    patch unifies the style to look like:

    ...
    NAND: 1024 MiB
    PCIE1: connected as Root Complex
    Scanning PCI bus 01
    04 01 8086 1010 0200 00
    04 01 8086 1010 0200 00
    03 00 10b5 8112 0604 00
    02 01 10b5 8518 0604 00
    02 02 10b5 8518 0604 00
    08 00 1957 0040 0b20 00
    07 00 10b5 8518 0604 00
    09 00 10b5 8112 0604 00
    07 01 10b5 8518 0604 00
    07 02 10b5 8518 0604 00
    06 00 10b5 8518 0604 00
    02 03 10b5 8518 0604 00
    01 00 10b5 8518 0604 00
    PCIE1: Bus 00 - 0b
    PCIE2: connected as Root Complex
    Scanning PCI bus 0d
    0d 00 1957 0040 0b20 00
    PCIE2: Bus 0c - 0d
    In: serial
    ...

    Signed-off-by: Peter Tyser
    CC: wd@denx.de
    CC: sr@denx.de
    CC: galak@kernel.crashing.org

    Peter Tyser