08 Dec, 2016
4 commits
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Signed-off-by: Michal Simek
Use embded option because of qemu
Use my repo till Stephen merge it.
Signed-off-by: Michal Simek
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The patch is fixing:
"tools: mkimage: Check if file is regular file"
(sha1: 56c7e8015509312240b1ee15f2ff74510939a45d)
which contains two issues reported by Coverity
Unchecked return value from stat and incorrect calling sequence where
attack can happen between calling stat and fopen.
Using pair in opposite order (fopen and fstat) is fixing this issue
because fstat is using the same file descriptor (FILE *).Also fixing issue with:
"tools: mkimage: Add support for initialization table for Zynq and
ZynqMP" (sha1: 3b6460809c2a28360029c1c48247648fac4455c9)
where file wasn't checked that it is regular file.Reported-by: Coverity (CID: 154711, 154712)
Signed-off-by: Michal Simek
Reviewed-by: Tom Rini
Series-to: trini
Series-cc: u-boot -
This patch also includes ARM64 zynqmp changes:
- Remove platform non DM initialization
- Remove hardcoded sata base addressSigned-off-by: Michal Simek
Reviewed-by: Simon Glass
Series-to: sjg, agraf@suse.de
Series-cc: uboot
Series-version: 4
Series-changes: 2
- make ceva_init_sata static
- Move SATA_CEVA to defconfig
- Initalized max_lun and max_id platdataSeries-changes: 3
- Extend Kconfig help description
- sort dm.h
- Remove SPL undefinition from board file
- Fix Kconfig dependecies -
All sata based drivers are bind and corresponding block
device is created. Based on this find_scsi_device() is able
to get back block device based on scsi_curr_dev pointer.intr_scsi() is commented now but it can be replaced by calling
find_scsi_device() and scsi_scan().scsi_dev_desc[] is commented out but common/scsi.c heavily depends on
it. That's why CONFIG_SYS_SCSI_MAX_DEVICE is hardcoded to 1 and symbol
is reassigned to a block description allocated by uclass.
There is only one block description by device now but it doesn't need to
be correct when more devices are present.scsi_bind() ensures corresponding block device creation.
uclass post_probe (scsi_post_probe()) is doing low level init.SCSI/SATA DM based drivers requires to have 64bit base address as
the first entry in platform data structure to setup mmio_base.Signed-off-by: Michal Simek
Reviewed-by: Simon Glass
Series-changes: 2
- Use CONFIG_DM_SCSI instead of mix of DM_SCSI and DM_SATA
Ceva sata has never used sata commands that's why keep it in
SCSI part only.
- Separate scsi_scan() for DM_SCSI and do not change cmd/scsi.c
- Extend platdataSeries-changes: 3
- Fix scsi_scan return path
- Fix header location uclass-internal.h
- Add scsi_max_devs under !DM_SCSI
- Add new header device-internal because of device_probe()
- Redesign block device creation algorithm
- Use device_unbind in error path
- Create block device with id and lun numbers (lun was there in v2)
- Cleanup dev_num initialization in block device description
with fixing parameters in blk_create_devicef
- Create new Kconfig menu for SATA/SCSI drivers
- Extend description for DM_SCSI
- Fix Kconfig dependencies
- Fix kernel doc format in scsi_platdata
- Fix ahci_init_one - vendor variableSeries-changes: 4
- Fix Kconfig entry
- Remove SPL ifdef around SCSI uclass
- Clean ahci_print_info() ifdef logic
06 Dec, 2016
16 commits
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Signed-off-by: Tom Rini
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The default configuration for QSPI AHB bus can't support 16MB+.
But some flash on NXP layerscape board are more than 16MB.Signed-off-by: Yuan Yao
Reviewed-by: York Sun -
Enable the errata-a005697 for ls1012a
Signed-off-by: Changming Huang
Reviewed-by: York Sun -
Add the name for register space and memory space.
is the QSPI register space.
is the QSPI memory space.Signed-off-by: Yuan Yao
Reviewed-by: York Sun -
Signed-off-by: Priyanka Jain
Reviewed-by: York Sun -
- add additional function erratum_a009942_check_cpo to check if the
board needs tuning CPO calibration for optimal setting.
- move ERRATUM_A009942(with revision to check cpo_sample option) from
fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts.
- move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c
- remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942.Signed-off-by: Shengzhou Liu
[YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500]
Reviewed-by: York Sun -
Fix following warning in case multiple erratum macro was not defined.
warning: unused variable 'tmp'
warning: unused variable 'ddr_freq'Signed-off-by: Shengzhou Liu
Reviewed-by: York Sun -
Its easier to watch the output of the build process when the platforms
specific boards are grouped in a separate job. This patch adds a job
for all mvebu boards (arm and aarch64).Signed-off-by: Stefan Roese
Cc: Tom Rini
Reviewed-by: Tom Rini -
The LCDC controller on the lcdk board has high memory throughput
requirements. Even with the kernel-side tweaks to master peripheral
and peripheral bus burst priorities, the default PLL0 frquency of
300 MHz is not enough to service the LCD controller and causes
DMA FIFO underflows.Increment the PLL0 multiplier to 37, resulting in PLL0 frequency of
456 MHz - the same value that downstream reference u-boot from Texas
Instruments uses.Signed-off-by: Bartosz Golaszewski
Reviewed-by: Tom Rini -
First of all U-Boot would search for a USB mass storage device
with either uEnv.txt or kernel-fit.itb and boot.If USB mass storage device is not available or doesn't provide
these files then MMC will be tried.Signed-off-by: Yegor Yefremov
Reviewed-by: Tom Rini -
Baltos devices provide a mPCIe slot, whose power is turned off by
default. This patch activates mPCIe slot in U-Boot, so that for example
GSM modem can be already available in user space.Signed-off-by: Yegor Yefremov
Reviewed-by: Tom Rini -
Remove unneeded pinmux configurations and TI EEPROM struct.
Signed-off-by: Yegor Yefremov
Reviewed-by: Tom Rini -
The bootrom may corrupt the area of SRAM used to store the ti_common_eeprom
structure. This patch makes sure that it's always read after a reset, even
if a valid MAGIC number is found in the SRAM.Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Tom Rini -
The patch
"dm: spl: mmc: Support CONFIG_BLK in SPL MMC"
(sha1: 87bce4e5c0b55452d70830928b2d7b98fa24d4e3)
converted FAT part of spl_mmc_do_fs_boot() but forget to update also EXT
part by 's/&mmc->block_dev/mmc_get_blk_desc(mmc)/'.
This patch is fixing compilation error when CONFIG_SPL_EXT_SUPPORT
is enabled.Signed-off-by: Michal Simek
Reviewed-by: Jaehoon Chung
Reviewed-by: Simon Glass
05 Dec, 2016
20 commits
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This patch fixes the warnings about misaligned cache on Armada XP:
CACHE: Misaligned operation at range [7facb400, 7facb460]
Signed-off-by: Stefan Roese
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Not all memory is mapped in the MMU. So we need to restrict the memory
size so that U-Boot does not try to access it. Also, the internal
registers are located at 0xf000.0000 - 0xffff.ffff. Currently only 2GiB
are mapped for system memory. This is what we pass to the U-Boot
subsystem here.Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
This patch adds PCI support to the Marvell Armada-8K devel board.
Additionally the Intel E1000 ethernet driver is enabled so that
network support is available on this board, even without the
internal network interfaces being supported (yet).Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
To use the PCIe driver, its controller memory and the PCIe regions need
to get mapped in the MMU. Otherwise these areas can't be accessed.Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
This patch adds a driver for the PCIe controller integrated in the
Marvell Armada-8K SoC. This controller is based on the DesignWare
IP core.The original version was written by Shadi and Yehuda. I ported this
driver to the latest mainline U-Boot version with DM support.Tested on the Marvell DB-88F8040 Armada-8K eval board.
Signed-off-by: Shadi Ammouri
Signed-off-by: Yehuda Yitschak
Signed-off-by: Stefan Roese
Reviewed-by: Simon Glass
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
With the support for the Armada 8k, a 2nd COMPHY controller now needs
to get supported from the CP110 slave controller. This patch adds support
for this 2nd contoller in the COMPHY driver.Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
The Armada8k implements 2 CPs (communication processors) and the 2nd
CP also is equipped with a COMPHY controller. This patch now loops
over all enabled MISC devices (CP110) enabled in the DT to initialize
all CPs.Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
Add I2C and SPI aliases to enable usage in U-Boot. Otherwise U-Boot will
not be able to use the SPI NOR chip for environment storage and use
"i2c dev 0" to select this I2C bus.Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
This patch adds the COMPHY device tree configuration to the DT file for
the Marvell DB-88F8040 devel board.Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
This patch adds the COMPHY and UTMI device tree nodes to the cp110-slave
dtsi file for the Armada 8K.Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
Since the cp110 slave also has comphy DT nodes, the names need to be
renamed to avoid a name clash. Lets use the common naming scheme:
"cpm_xxx" for master and "cps_xxx" for slave.Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
This patch adds the necessary files to support the Marvell Armada 8k
devel board. Most board specfic files are shared with the Armada 7k
boards under the name "armada-8k*". So only minimal changes are
necessary to add this basic board support (except the DT files of
course).Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
To enable access to the slave CP its memory needs to be added to the
MMU memory map.Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
This patch uses of_machine_is_compatible() to detect the board at runtime
and only configured the I2C IO expander for the xHCI power / reset on
the DB-88F7040 board. As this code will be used by other Armada-7k/8k
ports, its necessary to use this runtime detection here.Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
Add the latest version of the DT files from the Linux kernel.
Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
This moves some of the Armada DB-88F7040 board specific files to a more
generic name: armada-8k. This is in preparation for the Armada-8k
support which will be added soon. And since both platforms share
most devices, lets also share most source files to not duplicate
the code here.Signed-off-by: Stefan Roese
Cc: Nadav Haklai
Cc: Neta Zur Hershkovits
Cc: Kostya Porotchkin
Cc: Omri Itach
Cc: Igal Liberman
Cc: Haim Boot
Cc: Hanna Hawa -
Add a README with a brief guide to porting i2c drivers over to use driver
model.Add a timeline also. All I2C drivers should be converted by the end
of June 2017.Signed-off-by: Simon Glass
Acked-by: Heiko Schocher -
Maintainers need to be notified more directly of the need to convert these
drivers. Add a note to the top each affected file.Signed-off-by: Simon Glass
Acked-by: Heiko Schocher -
Now that driver model is used for I2C on all boards, we can split the
high-speed code into its own driver. There is virtually no common code,
and this significantly reduces confusion.Signed-off-by: Simon Glass
Acked-by: Heiko Schocher -
Now that all boards use DM_I2C we can drop the old code.
Signed-off-by: Simon Glass
Acked-by: Heiko Schocher
