21 Nov, 2014
6 commits
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The Linux-compatible macro DIV_ROUND_CLOSEST is a bit more flexible
and safer than DIV_ROUND.For example,
foo = DIV_ROUND_CLOSEST(x, y++)
works expectedly, but
foo = DIV_ROUND(x, y++)
does not. (y is incremented twice.)Signed-off-by: Masahiro Yamada
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CONFIG_CPU_ARM1136 was introduced into Kconfig by commit 2e07c249a67e
(kconfig: arm: introduce symbol for ARM CPUs).This commit removes all the defines of CONFIG_ARM1136 and replaces
the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM1136.Signed-off-by: Masahiro Yamada
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CONFIG_CPU_ARM926EJS was introduced into Kconfig by commit 2e07c249a67e
(kconfig: arm: introduce symbol for ARM CPUs).This commit removes all the defines of CONFIG_ARM926EJS and replaces
the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM926EJS.Signed-off-by: Masahiro Yamada
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CONFIG_CPU_ARM920T was introduced into Kconfig by commit 2e07c249a67e
(kconfig: arm: introduce symbol for ARM CPUs).This commit removes all the defines of CONFIG_ARM920T and replaces the
only reference in drivers/usb/host/ohci-hcd.c with CONFIG_CPU_ARM920T.Signed-off-by: Masahiro Yamada
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CONFIG_ARM1176 is defined for some boards but not referenced at all.
Signed-off-by: Masahiro Yamada
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Some (not all) of ARMv7 boards define CONFIG_ARMV7, which is useless.
Besides, it is never referenced.Signed-off-by: Masahiro Yamada
Acked-by: Nobuhiro Iwamatsu
20 Nov, 2014
3 commits
19 Nov, 2014
12 commits
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When an MPC5200 based board is used with SPL support, the main
U-Boot needs to clear the GD (global data) struct again.Otherwise the generic board init code in board_init_f (when
CONFIG_SYS_GENERIC_BOARD is defined) will not initialize all
GD variables correctly. Resulting in a hangup on the a4m2k
board.Signed-off-by: Stefan Roese
Cc: Wolfgang Denk -
a3m071 and a4m2k share one config header. So adding the generic board defines
in this one file is enough to convert both boards.Signed-off-by: Stefan Roese
Cc: Wolfgang Denk -
Signed-off-by: Stefan Roese
Cc: Wolfgang Denk -
The gdsys hrcon board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.On board peripherals include:
- 1x GbE (optional)
- Lattice ECP3 FPGA connected via eLBC and PCIeSigned-off-by: Dirk Eibach
Signed-off-by: Stefan Roese -
Wolfgang Denk found this issue using cppcheck:
(error) Uninitialized variable: fpga_featuresSigned-off-by: Dirk Eibach
Signed-off-by: Stefan Roese -
Signed-off-by: Dirk Eibach
Signed-off-by: Stefan Roese -
Signed-off-by: Dirk Eibach
Signed-off-by: Stefan Roese -
Addressing was completely broken for cmd_fpgad.
Signed-off-by: Dirk Eibach
Signed-off-by: Stefan Roese -
The device id makes u-boot think that this chip needs
cfi_reverse_geometry(), which is not the case.
Add it to jedec_flash, so it is handled properly.Signed-off-by: Dirk Eibach
Signed-off-by: Stefan Roese -
Tune dlvision configuration similar to other gdsys boards to reduce memory
footprint.Signed-off-by: Dirk Eibach
Signed-off-by: Stefan Roese -
The UBI layer will disable much of its error reporting when it is
compiled into the linux kernel to avoid stopping boot. We want this
error reporting in U-Boot since we don't initialize the UBI layer until
it is used and want the error reporting.We force this by telling the UBI layer we are building as a module.
Signed-off-by: Andrew Ruder
Cc: Wolfgang Denk
Cc: Heiko Schocher
Cc: Kyungmin Park -
ff94bc40af3481d47546595ba73c136de6af6929 "mtd, ubi, ubifs: resync with Linux-3.14"
introduced the writebufsize field in struct mtd_info, which
is not initialized in the cfi_flash driver, which leads in
not working ubi on cfi flashes. Fix itSigned-off-by: Heiko Schocher
Reported-by: Andrew Ruder
Acked-by: Stefan Roese
Acked-by: Andrew Ruder
17 Nov, 2014
19 commits
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The code for this board supports following features:
- Boot media support: NAND flash/SD card/SPI flash
- Support LCD display (optional, disabled by default)
- Support ethernet
- Support USB mass storageSigned-off-by: Bo Shen
Signed-off-by: Andreas Bießmann -
The code for this board supports following features:
- Boot media support: NAND flash/SD card/SPI flash
- Support LCD display
- Support ethernet
- Support USB mass storageSigned-off-by: Bo Shen
Signed-off-by: Andreas Bießmann -
The User Register in GMAC IP is used to select interface type.
When with GE feature, it is used to select interface between
RGMII and GMII. If without GE feature, it is used to select
interface between MII and RMII.Signed-off-by: Bo Shen
Signed-off-by: Andreas Bießmann -
As in SAMA5D4 SoC, the gf table in ROM code can not be seen.
So, when we try to use PMECC, we need to build it when do
initialization.
Add a macro NO_GALOIS_TABLE_IN_ROM in soc header file. If it
is defined we will build gf table runtime.The PMECC use the BCH algorithm, so based on the build_gf_tables()
function in lib/bch.c, we can build the Galois Field lookup table.Signed-off-by: Josh Wu
Signed-off-by: Bo Shen
Signed-off-by: Andreas Bießmann -
replaces the at91bootstrap code with SPL code.
make the spl image with:
./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.binthis writes the length of the spl image into the 6th
execption vector. This is needed from the ROM bootloader.Signed-off-by: Heiko Schocher
Reviewed-by: Bo Shen
Reviewed-by: Andreas Bießmann
Signed-off-by: Andreas Bießmann -
replaces the at91bootstrap code with SPL code.
make the spl image with:
./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.binthis writes the length of the spl image into the 6th
execption vector. This is needed from the ROM bootloader.Signed-off-by: Heiko Schocher
Reviewed-by: Bo Shen
Signed-off-by: Andreas Bießmann -
add support for using spl code on at91sam9260 and at91sam9g45
based boards.Signed-off-by: Heiko Schocher
Reviewed-by: Bo Shen
Reviewed-by: Andreas Bießmann
[adopt Bo's change in spl.c]
Signed-off-by: Andreas Bießmann -
device ready pin is signalling that the device is ready on state 1
not on 0. Simmiliar as it is in drivers/mtd/nand/nand_spl_simple.cSigned-off-by: Heiko Schocher
Reviewed-by: Andreas Bießmann
Reviewed-by: Bo Shen
Acked-by: Scott Wood
Signed-off-by: Andreas Bießmann -
erase one nand block in spl code. keep it simple, as size matters
This is used on the upcoming taurus spl support.Signed-off-by: Heiko Schocher
Acked-by: Scott Wood
Reviewed-by: Bo Shen
Reviewed-by: Andreas Bießmann
Signed-off-by: Andreas Bießmann -
using this driver in SPL code with CONFIG_SPL_NAND_ECC
configured leads in an compileerror. Fix this.Signed-off-by: Heiko Schocher
Reviewed-by: Andreas Bießmann
Reviewed-by: Bo Shen
[fix subject]
Signed-off-by: Andreas Bießmann -
enable to boot only a raw u-boot.bin image from nand with the
CONFIG_SPL_NAND_RAW_ONLY define. This option saves space on
boards where spl space is low.Signed-off-by: Heiko Schocher
Reviewed-by: Andreas Bießmann
Reviewed-by: Bo Shen
Signed-off-by: Andreas Bießmann -
Signed-off-by: Heiko Schocher
Reviewed-by: Bo Shen
Signed-off-by: Andreas Bießmann -
- compile mpddrc ram init code also for AT91SAM9M10G45
based boards.
- in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED
in the cr configurationSigned-off-by: Heiko Schocher
Reviewed-by: Andreas Bießmann
Reviewed-by: Bo Shen
Signed-off-by: Andreas Bießmann -
use the configure value for computing the ba_off value
not the value from the cr register. This leaded in a
wrong ram configuration on the upcoming corvus spl board
support.Signed-off-by: Heiko Schocher
Reviewed-by: Andreas Bießmann
Signed-off-by: Andreas Bießmann -
Signed-off-by: Heiko Schocher
Reviewed-by: Bo Shen
Reviewed-by: Jagannadha Sutradharudu Teki
Signed-off-by: Andreas Bießmann -
move CONFIG_SYS_SPI_WRITE_TOUT into drivers/spi/atmel_spi.h
and define a default value. Delete this define in the board
config files, where it is possible (all boards use currently
the same value).Signed-off-by: Heiko Schocher
Reviewed-by: Jagannadha Sutradharudu Teki
Reviewed-by: Andreas Bießmann
Signed-off-by: Andreas Bießmann -
generate the boot.bin file for all atmel SoC (arm920, arm926, armv7)
Signed-off-by: Heiko Schocher
Reviewed-by: Andreas Bießmann
Reviewed-by: Masahiro Yamada
[fix subject]
Signed-off-by: Andreas Bießmann -
The clock source for master clock can be slow clock, main clock,
plla clock or upll clock. So, make the clock source selection
field in mckr can be configured.Signed-off-by: Bo Shen
Signed-off-by: Andreas Bießmann -
We need to make sure the main clock ready field in MCFR is set
after switch to main crystal oscillator.Signed-off-by: Bo Shen
Signed-off-by: Andreas Bießmann
