18 Dec, 2018
1 commit
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RISC-V privileged architecture v1.10 defines a real-time counter,
exposed as a memory-mapped machine-mode register - mtime. mtime must
run at constant frequency, and the platform must provide a mechanism
for determining the timebase of mtime. The mtime register has a
64-bit precision on all RV32, RV64, and RV128 systems.Different platform may have different implementation of the mtime
block hence an API riscv_get_time() is required by this driver for
platform codes to hide such implementation details. For example,
on some platforms mtime is provided by the CLINT module, while on
some other platforms a simple 'rdtime' can be used to get the timer
counter.With this timer driver the U-Boot timer functionalities like delay
works correctly now.Signed-off-by: Bin Meng
Reviewed-by: Lukas Auer
Reviewed-by: Anup Patel
29 Nov, 2018
1 commit
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This patch adds clock source and clock event for the timer found
on the Mediatek SoCs.Signed-off-by: Ryder Lee
Tested-by: Matthias Brugger
Reviewed-by: Simon Glass
18 Sep, 2018
2 commits
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Add a timer driver for the MPC83xx architecture.
Signed-off-by: Mario Six
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Makefile entries should be sorted.
Signed-off-by: Mario Six
24 Aug, 2018
1 commit
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Add timer driver for the Designware APB Timer IP. This is present
for example on the Altera SoCFPGA chips.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Ley Foon Tan
11 May, 2018
1 commit
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This driver was tested on Xilinx ZynqMP SoC.
Signed-off-by: Michal Simek
07 May, 2018
1 commit
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.Signed-off-by: Tom Rini
14 Mar, 2018
1 commit
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This timer driver is using GPT Timer (General Purpose Timer)
available on all STM32 SOCs family.
This driver can be used on STM32F4/F7 and H7 SoCs familySigned-off-by: Patrice Chotard
30 Nov, 2017
1 commit
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ATCPIT100 is Andestech timer IP which is embeded
in AE3XX and AE250 boards. So rename AE3XX to
ATCPIT100 will be more make sence.Signed-off-by: rick
Signed-off-by: Rick Chen
Reviewed-by: Simon Glass
27 Aug, 2017
1 commit
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Add the new Atmel PIT timer driver, which supports the driver model
and device tree.Signed-off-by: Wenyou Yang
13 Aug, 2017
2 commits
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This adds a device-model driver for the timer block in the RK3368 (and
similar devices that share the same timer block, such as the RK3288) for
the down-counting (i.e. non-secure) timers.This allows us to configure U-Boot for the RK3368 in such a way that
we can run with the secure timer inaccessible or uninitialised (note
that the ARMv8 generic timer does not count, if the secure timer is
not enabled).Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass -
To fully support DM timer in SPL and TPL, we need a few things cleaned
up and normalised:
- inclusion of the uclass and drivers should be an all-or-nothing
decision for each stage and under control of $(SPL_TPL_)TIMER
instead of having the two-level configuration with TIMER and
$(SPL_TPL_)TIMER_SUPPORT
- when $(SPL_TPL_)TIMER is enabled, the ARMv8 generic timer code can
not be compiled inThis normalises configuration to $(SPL_TPL_)TIMER and moves the config
options to drivers/timer/Kconfig (and cleans up the collateral damage
to some defconfigs that had SPL_TIMER_SUPPORT enabled).Signed-off-by: Philipp Tomsich
Reviewed-by: Simon Glass
22 May, 2017
2 commits
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Support Andestech AE3xx platform: serial, timer device tree flow.
Signed-off-by: rick
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Support AG101P timer device tree flow.
Signed-off-by: rick
24 Mar, 2017
1 commit
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This commit introduces timer driver for ARC.
ARC timers are configured via ARC AUX registers so we use special
functions to access timer control registers.This driver allows utilization of either timer0 or timer1
depending on which one is available in real hardware. Essentially
only existing timers should be mentioned in board's Device Tree
description.Signed-off-by: Vlad Zakharov
Reviewed-by: Simon Glass
15 Mar, 2017
1 commit
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Add ARM global timer based timer
Signed-off-by: Patrice Chotard
Reviewed-by: Simon Glass
29 Jan, 2017
1 commit
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Add support for Watchdog Timer, which is compatible with AST2400 and
AST2500 watchdogs. There is no uclass for Watchdog yet, so the driver
does not follow the driver model. It also uses fixed clock, so no clock
driver is needed.Add support for timer for Aspeed ast2400/ast2500 devices.
The driver actually controls several devices, but because all devices
share the same Control Register, it is somewhat difficult to completely
decouple them. Since only one timer is needed at the moment, this should
be OK. The timer uses fixed clock, so does not rely on a clock driver.Add sysreset driver, which uses watchdog timer to do resets and particular
watchdog device to use is hardcoded (0)
Reviewed-by: Simon Glass
21 Jan, 2016
1 commit
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Adding a timer driver for omap devices based on driver model
and device tree.Signed-off-by: Mugunthan V N
01 Dec, 2015
1 commit
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To group all dm timer drivers together, move tsc timer to
drivers/timer directory.Signed-off-by: Bin Meng
Acked-by: Simon Glass
20 Nov, 2015
1 commit
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Add a sandbox timer which get time from host os and a basic
test.Signed-off-by: Thomas Chou
Reviewed-by: Simon Glass
23 Oct, 2015
2 commits
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Convert altera timer to driver model.
Signed-off-by: Thomas Chou
Acked-by: Chin Liang See -
Implement a Timer uclass to work with lib/time.c.
Signed-off-by: Thomas Chou
Acked-by: Simon Glass