28 Oct, 2019
3 commits
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To enable HS400 and UHS for imx8m platforms, update the driver data
to share with imx8x platforms and add relevant compatible string.Signed-off-by: Ye Li
(cherry picked from commit e0cc56f76027d014414b5aed6c26af444388093a) -
In mmc initial state, the mmc framework sets clock to 0, so the fsl_esdhc
driver converts to use min clock 400Khz. But the priv->clock is logged
400Khz not 0, and cause following calls to set_ios to set clock again.Each set to clock has 10ms delay for stable, then the problem accumulates
some unnecessary delay.Signed-off-by: Ye Li
(cherry picked from commit 151ab3bef2b1ec1c142c31048f3005ebce2a7a18) -
the function named mxs_nand_ecc_read_page
To enable the Randomizer module, set GPMI_ECCCTRL[RANDOMIZER_ENABLE] to
1, then set GPMI_ECCCOUNT[RANDOMIZER_PAGE] to select randomizer page
number needed to be randomized.Signed-off-by: Alice Guo
(cherry picked from commit e8271a1c7621cc3607d3e9c7b0a872342b5f4c95)
24 Oct, 2019
1 commit
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When enabled randomizer during ECC reading, the controller reported it's
erased page. Checking zero count will cause data get modified to all
0xFF. Stop checking during randomizer to workaround this issue.Signed-off-by: Han Xu
(cherry picked from commit f88f68f29026b084396db003c60e0c15995d1670)
17 Oct, 2019
2 commits
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According to i.MX7ULP Reference Manual we should wait for WDOG unlock
and reconfiguration to complete.Section "59.5.3 Configure Watchdog" provides the following example:
DisableInterrupts; //disable global interrupt
WDOG_CNT = 0xD928C520; //unlock watchdog
while(WDOG_CS[ULK]==0); //wait until registers are unlocked
WDOG_TOVAL = 256; //set timeout value
WDOG_CS = WDOG_CS_EN(1) | WDOG_CS_CLK(1) | WDOG_CS_INT(1) |
WDOG_CS_WIN(0) | WDOG_CS_UPDATE(1);
while(WDOG_CS[RCS]==0); //wait until new configuration takes effect
EnableInterrupts; //enable global interruptUpdate U-Boot WDOG driver to align with i.MX7ULP reference manual.
Reviewed-by: Ye Li
Signed-off-by: Breno Lima
(cherry picked from commit 3ffee301cb4570e0e7681448ec434f0689bcbaa3) -
With Android10 code, to build GSI image for devices launching with
Android10, the target should be "aosp_$arch-user". Google releases GSI
images is so built in user mode.To do CTS-on-GSI test, a debug ramdisk containing .prop file to enable
adb root permission and GSI keys to verify the GSI image is needed, this
ramdisk is in boot image. so ramdisk in boot image need to be loaded by
uboot even in non-recovery mode.To save boot time, only standard Android use ramdisk to boot up Android,
Android Auto keeps the original way: kernel be responsible for verify
and mount system partition. Let the customers to decide whether to use
recovery ramdisk to boot the system. and under this condition, user-debug
Android Auto GSI image need to be used for VTS-on-GSI test.when use ramdisk to bootup Android, info provided by "dm=" bootarg is
not used by kernel to setup dm-verity, so it is removed from the
bootargs. The 4.19 kernel used together with this uboot does not handle
"skip_initramfs", so it's also removed.Change-Id: Ia8b8fa8b85a44acda2670b46504038a009ce01a8
Signed-off-by: faqiang.zhu
16 Oct, 2019
1 commit
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Add commands to read oem device unlock state from
trusty avb app. Use the oem device unlock state to
determine if the device can be unlocked instead of
the state in persistdata part.Test: Read oem device unlock state from avb app.
Change-Id: Ifccaa788ba0f681c2b3a47151c8474e8da5a2559
Signed-off-by: Ji Luo
15 Oct, 2019
2 commits
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Latest SCFW has removed old MISC SECO commands. So update the codes
to use new SECO commands.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 8e54efce6d2a1691605ae23983ff91f4a702adba) -
randomizer
imx8mm-evk needs to BCH encode and set NAND page number needed to be
randomizedmodify conditional compilation
Should use CONFIG_IMX8M, it should apply to imx8mq/mm/mn
Signed-off-by: Alice Guo
(cherry picked from commit da40cd99e4b3a78d2609ee777d60d651d6dbc313)
11 Oct, 2019
3 commits
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According to i.MX7ULP Reference Manual the second word write for both
UNLOCK and REFRESH operations must occur in maximum 16 bus clock.The current code is using writel() function which has a DMB barrier to
order the memory access. The DMB between two words write may introduce
some delay in certain circumstance, causing a WDOG timeout due to 16 bus
clock window requirement.Replace writel() function by __raw_writel() to achieve a faster memory
access and avoid such issue.Signed-off-by: Breno Lima
Reviewed-by: Ye Li
(cherry picked from commit 5dd8c46d68d3267e989f980598a4e3e2ed04d4f9) -
ROM update emmc offset to 0.
previous B0 is 32K.Signed-off-by: Frank Li
(cherry picked from commit b642241380227b97f0fa434e3d38dc746adbd9e0)
(cherry picked from commit 2065bf0a12180f73eb918d09dbe809c10077b033) -
gf_13/14 mask was not set correctly in register definition.
Signed-off-by: Han Xu
(cherry picked from commit b8aed98b2ecfb0def64c474e1ae171930da4c9fc)
30 Sep, 2019
1 commit
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Conditional compilation added in MLK-22444 caused U-Boot compilation
of i.MX8MM error. Delete the wrong conditional compilation.Signed-off-by: Alice Guo
(cherry picked from commit 5638f06c300edf87461b822e2c42df2c9ccdd40f)
29 Sep, 2019
4 commits
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On i.MX7 in a sake of reducing the disturbances caused by a neighboring
cells in the FCB page in the NAND chip, a randomizer is enabled when
reading the FCB page by ROM bootloader.Add API for setting BCH to specific layout (and restoring it back) used by
ROM bootloader to be able to burn it in a proper way to NAND using
nandbcb command.Signed-off-by: Igor Opaniuk
Signed-off-by: Anti SullinSigned-off-by: Alice Guo
(cherry picked from commit eaba02830252ed044e319571a7f3ebed412ae93b) -
Since the USB HID limits the maximum bandwidth(3072) for interrupt
endpoint transfers, when the bInterval set to 1, we can only support 3
boards to run sdp at the same time. In order to support more boards,
change the bInterval of interrupt endpoint to 3, which will not affect
the transmission speed.Signed-off-by: Sherry Sun
Reviewed-by: Ye Li
(cherry picked from commit beb0283e6bac3d42cc87757e3c0e200e2ac3b68f) -
When use ep1out interrupt endpoint to receive data in sdp, the max
packetsize of ep1out is set to 1024. But in cdns3 gadget driver, the
max packetsize is limited to 512 bytes in high speed. So we can't
implement data download through ep1out of cdns3 driver, here need
change the max packesize of interrupt endpoints to 1024.Signed-off-by: Sherry Sun
Reviewed-by: Ye Li
(cherry picked from commit 17f321b4a32cfaac52339172dc354729e641451a) -
EP0 has been used to transfer file data in sdp before, but the max
packetsize of ep0 is 64 bytes. So in order to improve the file transfer
speed, here add the EP1_OUT interrupt endpoint which max packetsize is
set to 1024 byte.After testing, it turns out that using ep1out is twice as fast as using
ep0 while receiving data in sdp.Signed-off-by: Sherry Sun
Reviewed-by: Ye Li
(cherry picked from commit 22614e317b7fdf4a716f2e5bde876649414ffd6c)
06 Sep, 2019
1 commit
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Add the another 2Gb SPI-NAND flash which is 1.8v device and using
different device id.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
05 Sep, 2019
4 commits
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Add 4Gb micron SPI nand chip MT29F4G01 which does not support QUAD IO
and has two dies. Also fix the BBM size to 4 Bytes according to datasheet.Signed-off-by: Ye Li
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Current print for unrecognized ID only shows the buffer address not
show its device ID. Add a print to show the ID.Signed-off-by: Ye Li
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Miss including common.h in two files and cause build error
Signed-off-by: Ye Li
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Add flexspi_nand driver which works on iMX flexspi controller to support
SPI NAND flash. This driver requires DM_SPI and follows SPI-MEM interfaces
to adapt to the SPI NAND framework.Note: Current implementation limits to the 12-bit column address. This is
popular in main stream SPI NAND and flash devices supported in u-boot.
If device with larger page size (> 4096) needs to support, we have to change
the driver.Signed-off-by: Ye Li
20 Aug, 2019
2 commits
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Decrypt and verify the secure credential in keymaster TA, unlock
operation can only be allowed after secure credential verify pass.Since the mppubk can only be generated on hab closed imx8q, so secure
unlock feature can only supported when hab is closed.Test: secure unlock credential verify on hab closed imx8mm_evk.
Change-Id: I1ab5e24df28d1e75ff853de3adf29f34da1d0a71
Signed-off-by: Ji Luo -
Add commands to support extract serial number from device.
Commands:
$ fastboot oem get-serial-number
$ fastboot get_stagedTest: serial number upload on imx8mm.
Change-Id: I5c905ab797d4fd28d76c8403914f191eaf2ef687
Signed-off-by: Ji Luo
14 Aug, 2019
2 commits
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Add the driver data for each compatible string of different SOC. So we
can remove the SOC config and use driver data instead.Signed-off-by: Ye Li
Reviewed-by: Peng Fan -
On iMX7ULP A0, PCC divider for QSPI has timing issue and it is
only possible to use the divider ratio equal to 1 (PCD=0).
This timing issue causes page program working abnormal if DDR_EN
is set. So current QSPI driver has disabled DDR mode on iMX7ULPSince iMX7ULP B0 has fixed the issue, so re-enable the DDR mode
for iMX7ULP.Signed-off-by: Ye Li
09 Aug, 2019
10 commits
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Add PCIE relevant clocks to clk-imx8 driver, so PCIE IMX driver can
set the clocks through DTBSigned-off-by: Ye Li
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Update PCIE IMX DM driver supports iMX8QM/QXP and
iMX6QDL/QP/SX. Non-DM driver supports iMX6QDL/QP/SX.
The changes in DM parses cfg/mem/io ranges, gpios, regulators and
clocks (imx8 only) from DTS for RC mode, and set iATU mapping for
each regions.The original iATU mapping sets full PCI region to CFG space. iATU
translates MEM/IO TLP to CFG TLP when the address is falled into
the region.
The new mapping sets CFG/IO/MEM spaces to align with kernel like below
ATU region 0 for MEM access
ATU region 1 for CFG0 or CFG1 access by bus id
ATU region 2 for IO accessSigned-off-by: Ye Li
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Add DM support and support for probing the iMX PCI driver from DT.
The legacy non-DM support is retained, however shall be removed once
DM PCI is the only option remaining.Signed-off-by: Marek Vasut
Cc: Bin Meng
Cc: Fabio Estevam
Cc: Stefano Babic
Reviewed-by: Bin Meng
(cherry picked from commit a11c0f44b77b745519e35d30fc5eecb6206107fb) -
Pass the driver private data around the driver as much as possible, instead
of having it as a static global variable. This is done in preparation for
the DM conversion, no functional change.Signed-off-by: Marek Vasut
Cc: Bin Meng
Cc: Fabio Estevam
Cc: Stefano Babic
Reviewed-by: Bin Meng
(cherry picked from commit d2cc2e86f8e12393f2adf47c9a8694475e92e05a) -
The driver limits the config space base to 32bit, however it can be
64bit on 64bit iMX hardware too. Remove that limitation. This patch
has no impact on the iMX6, which is the only SoC currently supported
by this driver.Signed-off-by: Marek Vasut
Cc: Bin Meng
Cc: Fabio Estevam
Cc: Stefano Babic
Reviewed-by: Bin Meng
(cherry picked from commit 90f87fb5258c57bbb8497ac23454e659169483e4) -
Pull out hard-coded register base addresses into driver private
structure in preparation for DM conversion. No functional change.Signed-off-by: Marek Vasut
Cc: Bin Meng
Cc: Fabio Estevam
Cc: Stefano Babic
Reviewed-by: Bin Meng
(cherry picked from commit 33f794be36e846a522c7020e642a1e89c0769b17) -
Enable the configs of usb2 so that both usb2 and usb3 gadget
drivers are now supported on imx8 plaform. And add
CONFIG_USB_PORT_AUTO to support usb port autodetect function
for SDP/fastboot.Signed-off-by: Sherry Sun
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For one usb controller driver, the transport endpoint address won't
change after the driver initialize. So the value of bEndpointAddress
have no need to be cleared.But when more than one usb controller drivers are used at the same time,
different endpoints address is used by different controller driver
usually, it will cause confusion of endpoint address. So the value of
bEndpointAddress had better been cleared everytime before we refill
endpoint address to it.Signed-off-by: Sherry Sun
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On imx8 platform, the usb2 and usb3 ports are both supported. Which
means we can use usb2(ci_udc_otg) and usb3(cdns3_generic_peripheral)
gadget driver to run sdp/fastboot/ums at the same time.For sdp and the fastboot that runs automatically when uboot starts,
board_usb_gadget_port_auto() is added to autodetect usb port, this
means that we don't have to specify which USB port should be used to
download in code, now we can just connect either usb port then it
will download automatically.Signed-off-by: Sherry Sun
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Since the orginal way to call interrupts handle function of DM usb
gadget driver is through dm_usb_gadget_handle_interrupts(), when we want
to use two or more different gadget drivers at the same time, it will
cause error of duplicate names.So here add a handle_interrupts function pointer instead of driectly
call dm_usb_gadget_handle_interrupts(), then the error can be avoided.Signed-off-by: Sherry Sun
31 Jul, 2019
2 commits
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Since the ci_udc driver has been converted to DM driver, the
CONFIG_DM_USB_GADGET should also be selected when CONFIG_CI_UDC
is enabled, then we can use DM ci_udc driver.Signed-off-by: Sherry Sun
Reviewed-by: Ye Li -
Convert the ci_udc driver to driver model by using the uclass
UCLASS_USB_GADGET_GENERIC. The clk and power of USB controller and USB
PHY both are initialized by parsing the device tree nodes.If CONFIG_DM_USB_GADGET is defined, we use the ci_udc driver in DM way,
if it does not defined, we can use ci_udc driver in its original Non-DM
way.Move some USB PHY register definitions from ehci-mx6.c to
asm/mach-imx/regs-usbphy.h in order to share with DM usb gadget driver.Signed-off-by: Sherry Sun
Reviewed-by: Ye Li
30 Jul, 2019
1 commit
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Set MCR0 RXCLKSRC to 1 to enable DQS loopback from pad to support
higher frequency.Signed-off-by: Ye Li
(cherry picked from commit 256fcd3df1b0a0b9c0fb730fabb7497800cda3a6)
26 Jul, 2019
1 commit
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Add the SATA clocks to clk-imx8, so we can use clk uclass interfaces
to access the clocks in AHCI driver.Signed-off-by: Ye Li