05 Feb, 2016
4 commits
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On some newer chipset (eg: BayTrail), there is an IO base address
register on the PCH device which configures the base address of a
memory-mapped I/O controller.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
Tested-by: Simon Glass -
x86 GPIO registers are accessed via I/O port whose base address is
configured in a PCI configuration register on the PCH device. Add
an op get_gpio_base to get the GPIO base address from PCH.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
Tested-by: Simon Glass -
Spell out 'sbase' to 'spi_base' so that it looks clearer.
Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
Tested-by: Simon Glass -
pch_get_version op was only used by the ich spi controller driver,
and does not really provide a good identification of pch controller
so far, since we see plenty of Intel PCH chipsets and one differs
from another a lot, which is not simply either a PCHV_7 or PCHV_9.
Now that ich spi controller driver was updated to not get such info
from pch, the pch_get_version op is useless now.Signed-off-by: Bin Meng
Reviewed-by: Simon Glass
Tested-by: Simon Glass
24 Jan, 2016
2 commits
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At some point we may need to distinguish between different types of PCHs,
but for existing supported platforms we only need to worry about version 7
and version 9 bridges. Add a driver for the PCH7.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
A Platform Controller Hub is an Intel concept - it is like the peripherals
on an SoC and is often in a separate chip from the CPU. The chip is typically
found on the first PCI bus and integrates multiple devices.We have a very simple uclass to support PCHs. Add a few operations, such as
setting up the devices on the PCH and finding the SPI controller base
address. Also move it into drivers/pch/ since we will be adding a few PCH
drivers.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
