06 Oct, 2014
11 commits
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…ic/drivers/net-20141006', 'topic/tools/mkimage-20141006' and 'topic/arm/cache-20141006' into HEAD
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Add a few new variables to make the cache handling less cryptic.
Add a variable for DMA and DATA descriptor start and end, so the
correctness of the code is easier to inspect.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Cc: Joe Hershberger
Acked-by: Pavel Machek
Acked-by: Chin Liang See -
Fix remaining cache alignment issues in the DWC Ethernet driver.
Please note that the cache handling in the driver is making the
code hideous and thus the next patch cleans that up. In order to
make this change reviewable though, the cleanup is split from it.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Cc: Joe Hershberger
Acked-by: Pavel Machek -
Old saying says that more than three exclamation marks in a row are
sign of mental disease. Cleanup micrel.c.Signed-off-by: Pavel Machek
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Cc: Joe Hershberger
Acked-by: Chin Liang See -
The dw_mmc driver was responding to errors with debug(). Change that
to prinf()/puts() respectively so that any errors are immediately
obvious. Also adjust english in comments.Signed-off-by: Pavel Machek
Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Cc: Pantelis Antoniou
Acked-by: Chin Liang See -
Add a table of FPGA family with matching functions associated with
it and make all the code just look up the family in that table and
call the associated function instead of the horrible switch voodoo
which was duplicated all over the place.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Acked-by: Pavel Machek -
Make the function return either 0 or -EINVAL, that is, normal
expected error codes and success codes instead of true/false
nonsense.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Acked-by: Pavel Machek -
Move the function to the top of the file to avoid forward declaration.
No functional change.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Acked-by: Pavel Machek -
Further improve the indentation in the rest of the file, where
the indentation is initially a bit less brutal. There is no
functional change in this patch.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Acked-by: Pavel Machek -
Boldly go, where no programmer has gone before and just clean up
the indentation mayhem. No functional change.Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek -
Clean up the printf() statements and get rid of the PRINTF()
macro by replacing it with debug_cond().Signed-off-by: Marek Vasut
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Acked-by: Pavel Machek
27 Sep, 2014
2 commits
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At present sandbox has its own table of supported SPI flash chips. Now that
the SPI flash system is fully consolidated and has its own list, sandbox
should use that.This enables us to expand the number of chips that sandbox supports.
Signed-off-by: Simon Glass
Reviewed-by: Jagannadha Sutradharudu Teki
26 Sep, 2014
5 commits
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To add the Denali NAND driver support into U-Boot.
This driver is leveraged from Linux with commit ID
fdbad98dff8007f2b8bee6698b5d25ebba0471c9. For Denali
controller 64 variance, you need to declare macro
CONFIG_SYS_NAND_DENALI_64BIT.Signed-off-by: Chin Liang See
Cc: Scott Wood
Cc: Masahiro Yamada
Signed-off-by: Masahiro Yamada
Reviewed-by: Masahiro Yamada
Tested-by: Masahiro Yamada -
The ioread16_rep() and iowrite16_rep() implementations are U-Boot specific
and have been introduced with the Linux MTD v3.14 sync. While introducing
these functions, the length for the loop has been miscalculated. The ">> 1"
is already present in the caller. So lets remove it in the function.Tested on omap3_ha.
Signed-off-by: Stefan Roese
Cc: Heiko Schocher
Cc: Tom Rini
Cc: Scott Wood
Acked-by: Heiko Schocher -
OMAP GPMC driver used with some NAND Flash devices
(e.g. Spansion S34ML08G1) causes that U-boot shows
hundreds of 'nand: bit-flip corrected' error messages.
Possible cause was discussed in the mailinglist thread:
http://lists.denx.de/pipermail/u-boot/2014-April/177508.htmlThe issue was partially fixed with the cc81a5291910d7a.git
however this has to be done to fix the SPL.The original author of the code is Belisko Marek
Signed-off-by: Rostislav Lisovy
25 Sep, 2014
11 commits
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When accumulated ECC is enabled, the DQ_MAP for ECC[4:7] needs to be set
to 0, i.e. 0->0, 1->1, etc., required by controller logic, even these pins
are not actually connected.Also fix a bug when reading from DDR register to use proper accessor for
correct endianess.Signed-off-by: York Sun
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The driver was written using old DDR3 spec which only covers low speeds.
The value would be suboptimal for higher speeds. Fix both timing according
to latest DDR3 spec, remove tCKE as an config option.Signed-off-by: York Sun
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U-boot has been initializing DDR for the main memory. The presumption
is the memory stays as a big continuous block, either linear or
interleaved. This change is to support putting some DDR controllers
to separated space without counting into main memory. The standalone
memory controller could use different number of DIMM slots.Signed-off-by: York Sun
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Freescale's flash control driver is using architecture specific timer API
i.e. usec2ticksReplace usec2ticks with get_timer() (generic timer API)
Signed-off-by: Prabhakar Kushwaha
Acked-by: Scott Wood
Reviewed-by: York Sun -
[1] Move driver/core/, driver/input/ and drivers/input/ entries
from the top Makefile to drivers/Makefile[2] Remove the conditional by CONFIG_DM in drivers/core/Makefile
because the whole drivers/core directory is already selected
by CONFIG_DM in the upper level[3] Likewise for CONFIG_DM_DEMO in drivers/demo/Makefile
[4] Simplify common/Makefile - both CONFIG_DDR_SPD and
CONFIG_SPD_EEPROM are boolean macros so they can directly
select objectsSigned-off-by: Masahiro Yamada
Acked-by: Marek Vasut -
The macro MIN, MAX is defined as the aliase of min, max,
respectively.Signed-off-by: Masahiro Yamada
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This would be useful to start moving various config options.
Signed-off-by: Masahiro Yamada
Acked-by: Simon Glass
Tested-by: Simon Glass -
Fix the following build error in case CONFIG_E1000_NO_NVM is enabled:
CC drivers/net/e1000.o
drivers/net/e1000.c: In function ‘e1000_initialize’:
drivers/net/e1000.c:5365:5: error: ‘struct e1000_hw’ has no
member named ‘eeprom_semaphore_present’
make[1]: *** [drivers/net/e1000.o] Error 1
make: *** [drivers/net] Error 2
Acked-by: Marek Vasut -
- update static function
- additional debugging statements
- update "fastboot command" information
- add missing include file
- update spellingSigned-off-by: Steve Rae
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- implement 'fastboot flash' for eMMC devices
Signed-off-by: Steve Rae
Acked-by: Lukasz Majewski
Reviewed-by: Marek Vasut -
T1042QDS (T1042 is T1040 Personality without L2 switch) supports following
sgmii interfaces with serdes protocol 0xA7
-SGMII-MAC3 on Lane B - slot 7
-SGMII-MAC5 on Lane H - slot 7
-SGMII2.5G-MAC1 on Lane C - slot 6
-SGMII2.5G-MAC2 on Lane D - slot 5Add support of above sgmii interfaces
Signed-off-by: Priyanka Jain
24 Sep, 2014
11 commits
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Signed-off-by: Stefan Roese
Cc: Jagannadha Sutradharudu TekiAcked-by: Prafulla Wadaskar
Tested-by: Luka Perkov
Reviewed-by: Jagannadha Sutradharudu Teki -
Signed-off-by: Stefan Roese
Acked-by: Prafulla Wadaskar
Tested-by: Luka Perkov
Reviewed-by: Jagannadha Sutradharudu Teki -
This patch introduces the clrsetbits_le32() accessor functions in the
kirkwood SPI driver. Note that it also includes a fix:- writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl);
+ writel(KWSPI_SMEMRDY, &spireg->ctrl);Here the bit KWSPI_CSN_ACT (0x1) should have been cleared. Instead
0xfffffffe is written into this control register. This is the main
reason to use the clrsetbits() functions now. As they make clearing
bits much less error prone.Additionally KWSPI_IRQUNMASK is not used in spi_cs_activate() and
spi_cs_deactivate() any more. Its the wrong macro but has the same
value as the correct one (KWSPI_CSN_ACT).This is in preparation for use of this driver on the Marvell Armada XP
platform as well.Signed-off-by: Stefan Roese
Acked-by: Prafulla Wadaskar
Tested-by: Luka Perkov
Reviewed-by: Jagannadha Sutradharudu Teki -
Add ID for this Numonix / STMicro chip.
Tested on Marvell DB-78460-BP board.
Signed-off-by: Stefan Roese
Tested-by: Luka Perkov
Reviewed-by: Jagannadha Sutradharudu Teki -
Currently, CONFIG_SPL_SPI_* #defines are used for controlling SPI boot in
SPL. These #defines do not allow the user to select SPI mode for the SPI flash
(there's no CONFIG_SPL_SPI_MODE, so the SPI mode is hardcoded in
spi_spl_load.c), and duplicate information already provided by
CONFIG_SF_DEFAULT_* #defines.Kill CONFIG_SPL_SPI_*, and use CONFIG_SF_DEFAULT_* instead.
Cc: Tom Rini
Cc: Marek Vasut
Cc: Sudhakar Rajashekhara
Cc: Lokesh Vutla
Cc: Vitaly Andrianov
Cc: Lars Poeschel
Cc: Bo Shen
Cc: Hannes Petermaier
Cc: Michal Simek
Acked-by: Marek Vasut
Signed-off-by: Nikita Kiryanov
Reviewed-by: Jagannadha Sutradharudu Teki -
MXC SPI driver has a feature whereas a GPIO line can be used to force CS high
across multiple transactions. This is set up by embedding the GPIO information
in the CS value:cs = (cs | gpio << 8)
This merge of cs and gpio data into one value breaks the sf probe command:
if the use of gpio is required, invoking "sf probe " will not work, because
the CS argument doesn't have the GPIO information in it. Instead, the user must
use "sf probe << 8>". For example, if bank 2 gpio 30 is used to force
cs high on cs 0, bus 0, then instead of typing "sf probe 0" the user now must
type "sf probe 15872".This is inconsistent with the description of the sf probe command, and forces
the user to be aware of implementaiton details.Fix this by introducing a new board function: board_spi_cs_gpio(), which will
accept a naked CS value, and provide the driver with the relevant GPIO, if one
is necessary.Cc: Eric Nelson
Cc: Eric Benard
Cc: Fabio Estevam
Cc: Tim Harvey
Cc: Stefano Babic
Cc: Tom Rini
Cc: Marek Vasut
Reviewed-by: Marek Vasut
Signed-off-by: Nikita Kiryanov
Reviewed-by: Jagannadha Sutradharudu Teki -
Add support for M25PE16 and M25PX16
Cc: Marek Vasut
Acked-by: Marek Vasut
Signed-off-by: Nikita Kiryanov
Reviewed-by: Jagannadha Sutradharudu Teki -
Since dev->req_seq value is initialized from "reg" property of fdt node,
there is posibility, that address value contained in fdt is greater than
INT_MAX, and then value in dev->req_seq is negative which led to probe()
fail.This patch fix this problem by ensuring that req_seq is positive, unless
it's one of errno codes.Signed-off-by: Robert Baldyga
Acked-by: Simon Glass -
Allow serial_find_console_or_panic() to work without a device tree.
Signed-off-by: Simon Glass
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The sequence number support in driver model requires device tree control.
It should be skipped if CONFIG_OF_CONTROL is not defined, and should not
require functions from fdtdec.Signed-off-by: Simon Glass
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The list is supposed to be terminated with a NULL name, but is not. If a
board probes a chip which does not appear in the table, U-Boot will crash
(at least on sandbox).Signed-off-by: Simon Glass