29 Oct, 2018

1 commit


10 Aug, 2018

1 commit

  • By default, imx8qm/qxp b0 silicon set the IO voltage to 2.5v, but mek/arm2
    boards are designed as 1.8v voltage for enet IO, so force the IO voltage
    to 1.8 by setting COMP_CTL_GPIO_1V8_3V3 pins like:
    The pin setting:
    1.8V/3.3V : bit4=0, bit[30]=1, bit[2:0]=000
    2.5V : bit4=1, bit[30]=1, bit[2:0]=010

    Reviewed-by: Ye Li
    Signed-off-by: Fugang Duan

    Andy Duan
     

23 May, 2018

1 commit


27 Apr, 2018

5 commits

  • Copy the imx8qm DTS files and its binding header files from imx_4.9.y kernel
    (commit "MLK-16174: ASoC: fsl_hifi4: load firmware in device open phase.")

    Add extra support used in u-boot:
    1. Add alias for FSPI nodes
    2. Add GPIO alias which is used as seq number in u-boot DM GPIO driver.
    3. Ajust GPIO nodes ahead of i2c nodes. The PCA9557 is a i2c device, if we
    arrange the i2c nodes ahead of GPIO nodes, the GPIO seq number for PCA9557
    will overlay with GPIO nodes. This will cause issue to use GPIO in u-boot.
    4. Add i2c alias for i2c0 to i2c3.
    5. Add mipi0/mipi1 i2c0 controllers' nodes.
    6. Add "u-boot,dm-pre-reloc" to thermal node in QXP DTSi
    7. Add USB alias for OTG and USB3 ports.
    8. Sync power domains of display resources with kernel
    (commit "MLK-17978[IMX8QXP B0] Add a buffer null flag to ensure the buffer is not")
    9. Removed mmc alias

    Signed-off-by: Ye Li
    (cherry picked from commit b8b7885469720ad6e31e0a1ff5751e9cb36b408e)

    Ye Li
     
  • Copy the imx8qm DTS files and its binding header files from imx_4.9.y kernel
    (commit "MLK-16174: ASoC: fsl_hifi4: load firmware in device open phase.")

    Add extra support used in u-boot:
    1. Add mbox-cells used for mailbox
    2. Add alias for FSPI nodes
    3. Add GPIO alias which is used as seq number in u-boot DM GPIO driver.
    4. Ajust GPIO nodes ahead of i2c nodes. The PCA9557 is a i2c device, if we
    arrange the i2c nodes ahead of GPIO nodes, the GPIO seq number for PCA9557
    will overlay with GPIO nodes. This will cause issue to use GPIO in u-boot.
    5. Add i2c alias for i2c0 to i2c4, i2c6 and i2c8.
    6. Modify ethernet alias index start from 0
    7. Add the usb alias for OTG and USB3.
    8. Add "u-boot,dm-pre-reloc" to thermal node to DTSi
    9. Sync power domains of display resources with kernel
    (commit "MLK-17978[IMX8QXP B0] Add a buffer null flag to ensure the buffer is not")
    10. Add "power-domains" property to all GPIO nodes and flexspi node, since
    they miss to add it.
    11. Add "simple-bus" compatible strings to imx8qm-pm node.
    12. Removed mmc alias

    Signed-off-by: Ye Li
    (cherry picked from commit 0e69d9e74d651227224bbc7e29ef87f515b9d07a)

    Ye Li
     
  • Update i.MX6SX dtsi file and relevant DTS header files.
    Add the imx6sx-sdb-emmc DTS file for reworked eMMC board.

    Changes in DTS and DTSi:
    1. Modify the n25q256a flash node's compatible to "spi-flash".
    2. Add spi0 and spi1 alias for qspi1 and qspi2.
    3. Add USB alias
    4. Remove MMC alias

    Signed-off-by: Ye Li

    Ye Li
     
  • Porting the the imx7d dtsi, dts files and binding files from kernel
    (f3834c73366f985fef6c1fdaaa129dfceb6151cb)

    New dts files are added to support GPMI-WEIM, QSPI, RevA boards.

    Changes in DTS and DTSi:
    1. Add USB alias
    2. Modify the SPI alias for qspi
    3. Disable USDHC2 since it is for SDIO
    4. Add i2c force idle support pins
    5. Add LPSR pinfunc file
    6. Removed mmc alias. So that device id in DM-MMC is aligned with Non-DM MMC.

    Signed-off-by: Ye Li

    Ye Li
     
  • Port the DTS and relevent binding files from v2017.03 for i.MX6DQ/DQP/DL/S
    Sabreauto and SabreSD boards.

    Removed the MMC alias from v2017.03, since the MMC will use it as device index when
    DM MMC is enabled. This causes mismatch with Non-DM MMC case.

    Signed-off-by: Ye Li

    Ye Li
     

05 Mar, 2018

1 commit


04 Feb, 2018

1 commit


29 Jan, 2018

2 commits


28 Jan, 2018

6 commits


26 Jan, 2018

2 commits


20 Jan, 2018

2 commits


19 Jan, 2018

1 commit


10 Jan, 2018

3 commits


14 Dec, 2017

1 commit


11 Dec, 2017

1 commit

  • Synopsys HSDK clock controller generates and supplies clocks to various
    controllers and peripherals within the SoC.

    Each clock has assigned identifier and client device tree nodes can use
    this identifier to specify the clock which they consume. All available
    clocks are defined as preprocessor macros in the
    dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device
    tree sources.

    Signed-off-by: Eugeniy Paltsev
    Signed-off-by: Alexey Brodkin

    Eugeniy Paltsev
     

09 Dec, 2017

2 commits


01 Dec, 2017

1 commit

  • Add dts binding header for rk3128, files origin from kernel.

    Series-Changes: 2
    - fix i2c address
    - add saradc and usb phy node
    - emmc using fifo mode for there is no dma support in rk3128 emmc
    - add some clock id in cru.h

    Signed-off-by: Kever Yang
    Acked-by: Philipp Tomsich
    Reviewed-by: Philipp Tomsich

    Kever Yang
     

30 Nov, 2017

1 commit

  • MMC block needs 48Mhz source clock, for that we choose
    to select the SAI PLL.
    Update also stm32_clock_get_rate() to retrieve the MMC
    clock source needed in MMC driver.

    STM32F4 uses a different RCC variant than STM32F7. For STM32F4
    sdmmc clocks bit are located into dckcfgr register whereas there
    are located into dckcfgr2 registers on STM32F7.
    In both registers, bits CK48MSEL and SDMMC1SEL are located at
    the same position.

    Signed-off-by: Christophe Priouzeau
    Signed-off-by: Patrice Chotard
    Reviewed-by: Vikas Manocha

    Patrice Chotard
     

29 Nov, 2017

1 commit

  • Xilinx changes for v2018.1

    Zynq:
    - Add support for Syzygy and cc108 boards
    - Add support for mini u-boot configurations (cse)
    - dts updates
    - config/defconfig updates in connection to Kconfig changes
    - Fix psu_init handling

    ZynqMP:
    - SPL fixes
    - Remove slcr.c
    - Fixing r5 startup sequence
    - Add support for external pmufw
    - Add support for new ZynqMP chips
    - dts updates
    - Add support for zcu102 rev1.0 board

    Drivers:
    - nand: Support external timing setting and board init
    - ahci: Fix wording
    - axi_emac: Wait for bit, non processor mode, readl/write conversion
    - zynq_gem: Fix SGMII/PCS support

    Tom Rini
     

28 Nov, 2017

2 commits


17 Nov, 2017

1 commit


16 Oct, 2017

1 commit

  • Upstream Linux has received a few device tree updates to the RPi
    which we should propagate into the builtin U-Boot one as well to
    gain hardware support.

    This patch bumps the dts files to their 4.14 Linux counterparts
    with the exception of sdhost on 32bit RPi versions. There we stay
    with iproc as the sdhost driver is missing in U-Boot.

    Signed-off-by: Alexander Graf

    Alexander Graf
     

04 Oct, 2017

1 commit


01 Oct, 2017

1 commit


22 Sep, 2017

1 commit

  • This patch adapts stm32h743 disco and eval dts files to match
    with U-boot requirements or add features wich are not yet
    upstreamed on kernel side :

    _ Add RCC clock driver node and update all clocks phandle
    accordingly.

    By default, on kernel side, all clocks was temporarly
    configured as a phandle to timer_clk waiting for a RCC
    clock driver to be available.
    On U-boot side, we now have a dedicated RCC clock driver, we
    can configured all clocks as phandle to this driver.

    All this binding update will be available soon in a kernel tag,
    as all the bindings have been acked by Rob Herring [1].

    [1] http://lkml.iu.edu/hypermail/linux/kernel/1704.0/00935.html

    _ Align STM32H7 serial compatible string with the one which will be
    available in next kernel tag. The bindings has been acked by
    Rob Herring [2].
    This compatible string will be usefull to add stm32h7 specific
    feature for this serial driver.

    [2] https://lkml.org/lkml/2017/7/17/739

    _ Add gpio compatible and aliases for stm32h743

    _ Add FMC sdram node with associated new bindings value to
    manage second bank (ie bank 1).

    _ Add missing HSI and CSI oscillators nodes needed
    by STM32H7 RCC clock driver.

    Clock sources could be:
    _ HSE (High Speed External)
    _ HSI (High Speed Internal)
    _ CSI (Low Power Internal)

    These clocks can be used as clocksource in some configuration.
    By default, HSE is selected as clock source.

    _ Set HSE to 25Mhz for stm32h743i-disco and eval board

    By default, the external oscillator frequency is defined at
    25 Mhz in SoC stm32h743.dtsi file.
    It has been set at 125 Mhz in kernel DT temporarly waiting for
    RCC clock driver becomes available.

    As in U-boot we got a RCC clock driver, the real value of HSE
    clock can be used.

    _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl,
    pwrcfg and gpio nodes.

    Signed-off-by: Patrice Chotard
    Reviewed-by: Simon Glass

    Patrice Chotard