21 Jun, 2017
2 commits
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* Add API to read\write MISC partition.
* get the boot mode from BCB command when boot up.
* get the boot up tactics from bootctrl.Change-Id: Icbba6340e10983dddc1b04804ecc012a3a3c57d0
Signed-off-by: zhang sanshan -
Request gpio before use it, otherwise it will fail to
drive the gpio when gpio_direction_output.Signed-off-by: Peng Fan
Reviewed-by: Ye Li
20 Jun, 2017
5 commits
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Fix the SW2MODE setting problem in power_init_board, which causes issue when wakeup source
is set in kernel for LPSR.Signed-off-by: Ye Li
Reviewed-by: Bai Ping
(cherry picked from commit 35e62eb779ffcc5af32a6fff615549e536bf6cf4) -
without this patch, the QoS setting will be lost after exit LPSR mode.
The patch moves the QoS setting into DDR setting group (in plugin mode), thus
when exit LPSR mode, QoS setting will be restored as well as DDR setting.Signed-off-by: Robby Cai
(cherry picked from commit 0b217456375bace3fbe9a72c7e92a46dc1907277)
(cherry picked from commit 75790929c674eea2f867b86a7734127d4cd45dfc) -
Add back the defconfig to boot M4 in single mode, because some customers
are using the defconfig during development.Signed-off-by: Ye Li
Acked-by: Peng Fan
(cherry picked from commit 8d4daa7703af842a56e9ea7aefe7f3d3a36580b8) -
The u-boot limits the needed sections in .bin by set -j parameter
in objcopy. Need to add the firmware_image section for M4 image.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 709839a52af39f1b4640ae3c72475fc01b1b37d5) -
The latest M4 image uses the version 0x41 not 0x40, have to update
it when checking M4 image. Otherwise M4 image won't be loaded.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit 4f421455c850226b9acec9a43b3997995929872e)
12 Jun, 2017
2 commits
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To support HDMI display on EVK board, the LCDIF pix clock must be 25.2Mhz. Since
the its PCC divider range is from 1-8, the max rate of LCDIF PCC source clock is
201.6Mhz. This limits the source clock must from NIC1 bus clock or NIC1 clock, other sources
from APLL PFDs are higher than this max rate.The NIC1 bus clock and NIC1 clock are from DDRCLK whose parent source is APLL PFD0, so we must
change the APLL PFD0 and have impact to DDRCLK, NIC1 and NIC1 bus.Eventually, this requests to set the APLL PFD0 frequency to 302.4Mhz (25.2 * 12),
with settings:PFD0 FRAC: 32
APLL MULT: 22
APLL NUM: 2
APLL DENOM: 5Signed-off-by: Ye Li
Tested-by: Fancy Fang
(cherry picked from commit 91be2789a93288cc087cd9e8db522c8308ef007c)
(cherry picked from commit 40fd4ea8d86142a7182d13a99db4f2b4d1b55d35) -
The OTG ID pin mux setting is missed in DTS, so the OTG can't work
as host mode.Signed-off-by: Ye Li
Reviewed-by: Peng Fan
(cherry picked from commit b23324508acf2fcda3531bce17055548758c49f8)
24 May, 2017
2 commits
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The reset_sata should reset the sata device info and free the probe_ent
memory. Otherwise, it will cause memory leak if we init the sata again.Signed-off-by: Ye Li
(cherry picked from commit 39c9261fd057b0fa98f9dfdee7d368aa029ff736) -
When sata stop is executed, the sata_curr_device is not reset to -1, so
any following sata commands will not initialize the sata again and cause
problem.Additional, in sata init implementation, the sata_curr_device should be updated,
otherwise sata will be initialized again when doing other sata commands like
read/write/info/part/device.Signed-off-by: Ye Li
(cherry picked from commit e2a66807f3573e8344dcd285dcb7d53f0e5fcf8e)
22 May, 2017
2 commits
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Current setup_spi is in board_early_init_f which is too early, so gpio_request
can't reserve the gpio successfully. Move it to board_init.Signed-off-by: Ye Li
(cherry picked from commit 7c1b220f77313d9df84dbaf0da6ac820e85cba9a) -
To avoid security leak, check the IVT DCD pointer before authenticating
the kernel image. If the pointer is not 0, set back it to 0 and give a warning
like the log below.Authenticate image from DDR location 0x80800000...
Warning, DCD pointer must be 0Signed-off-by: Ye Li
(cherry picked from commit 083daef8d9206d53fb4fa9807f37b8ff5dc319c7)
16 May, 2017
1 commit
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There are two pins used for ENET PHY reset, need to assert them before init the PHY.
Current DM driver does not have such operation, need board level codes to handle.
This patch moves the PHY reset operation into setup_fec, which is common for DM driver
and non-DM driver.Signed-off-by: Ye Li
15 May, 2017
2 commits
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This patch enables the I2C force idle bus for all i.MX6 and i.MX7 boards to avoid
i2c bus problem during reboot. To use it, we must add some i2c properties in DTB file
and the GPIO pinctrl for i2c.For mx6qsabreauto, mx6slevk, mx6sxsabresd and mx6sxscm, these boards call the
setup_i2c. To remove conflict, change to use "setup_i2c" only for non-DM i2c driver.Signed-off-by: Ye Li
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Needs to request the GPIO pin before assigning to GPIO to SPI driver
which will directly setting it to output without request it.Signed-off-by: Ye Li
12 May, 2017
2 commits
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i.MX6UL/ULL evk board net get the wrong MAC address from fuse, exp,
eth1 get MAC0 address, eth0 get MAC1 address from fuse. Set the
priv->dev_id to device->seq as the real net interface alias id then
.fec_get_hwaddr() read the related MAC address from fuse.Signed-off-by: Fugang Duan
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For eMMC, should using "non-removable" property, not "no-removable",
this cause USDHC driver has problem in get_cd, then switching to eMMC will
always show no card present.Signed-off-by: Ye Li
11 May, 2017
5 commits
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Using u-boot-2017.05 on i.MX6UL we ran into following problem:
Initially U-Boot could be started normally.
If we added one random command in configuration, the newly generated
image hung at startup (last output was DRAM: 256 MiB).We tracked this down to a data abort within relocation (relocated_code).
relocated_code in arch/arm/lib/relocate.S copies 8 bytes per loop
iteration until the source pointer is equal to __image_copy_end.
In a good case __image_copy_end was aligned to 8 bytes, so the loop
stopped as suggested, but in an errornous case __image_copy_end was
not aligned to 8 bytes, so the loop ran out of bounds and caused a
data abort exception.This patches solves the issue by aligning __image_copy_end to 8 byte
using the linker script related to arm.From Community: http://patchwork.ozlabs.org/patch/760592/
Signed-off-by: Peng Fan
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Fix coverity:392391 392382 392385 Unsigned compared against 0
Signed-off-by: Peng Fan
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Add return value check
Coverity 392391
Signed-off-by: Peng Fan
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The device managed API actually not free the memory, so need
to use devm_kfree to free the memory to avoid leakage.Coverity: 392384 resource leak
Signed-off-by: Peng Fan
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There are two problems in enabling DDR mode in this new driver:
1. The TDH bits in FLSHCR register should be set to 1. Otherwise, the TX DDR delay logic
won't be enabled. Since u-boot driver does not have DDR commands in LUT. So this won't
cause explicit problem.
2. When doing read/write/readid/erase operations, the MCR register is overwritten, the bits
like DDR_EN are cleared during these operations. When we using DDR mode QSPI boot, the TDH bit
is set to 1 by ROM. if the DDR_EN is cleared, there is no clk2x output for TX data shift.
So these operations will fail.
The explicit problem is users may get "SF: unrecognized JEDEC id bytes: ff, ff, ff" error
after using DDR mode QSPI boot on 6UL/ULL EVK boards.Signed-off-by: Ye Li
10 May, 2017
2 commits
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A wrong config name is used for QSPI boot, it causes IVT offset wrong.
Fix the typo issue.Signed-off-by: Ye Li
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Need to power down WDOG3 for mx6ull, otherwise the kernel will reboot once the
iomux for WDOG_ANY pin is configured. This is missed in community u-boot.Signed-off-by: Ye Li
09 May, 2017
4 commits
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Clean up the print info, so that the reset cause print can display in
a new line.Signed-off-by: Ye Li
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Fix incorrect value for 696MHz CPU frequency on i.MX6UL.
Signed-off-by: Ye Li
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Use CONFIG_DM_USB to comment out USB setup functions used by non-DM driver. So
they won't be executed when using DM driver.These USB setup functions may setup power control pins to USB_PWR function not GPIO,
which is different as the GPIO function used by USB vbus-supply. And cause the power control
not work.Signed-off-by: Ye Li
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The USDHC2 is connecting to BT/WIFI chip on SDB board, this controller is enabled
in device tree as SDIO, but USDHC driver in u-boot will use it as SDHC. So totally
3 USDHC devices will be created, and cause run time MMC environments go wrong because
it only supports USDHC1 and USDHC3.So disable the unused USDHC2 controller in u-boot device tree.
Signed-off-by: Ye Li
08 May, 2017
4 commits
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Wrong env buffer was passed into sata write function, so the saveenv can't work.
Fix this issue.Signed-off-by: Ye Li
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The DM Ethernet driver requests the "ethprime" to align with DTB name
or start with "eth" with seq number as index.So previous name "FEC" can't work as prime. Must change it to the "eth0" for
first ethernet device, or "eth1" for second one.Signed-off-by: Ye Li
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Wrong bmode value is used in community u-boot for usb reboot. And cause
it failed. Fix this by using a reserved bootcfg value.Signed-off-by: Ye Li
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The recent ehci-mx6 driver can support vbus-supply property, no need
to request io expander pins in usb setup. If did this, the regulator
for vbus-supply will fail to get due to the pin is occupied.Signed-off-by: Ye Li
04 May, 2017
1 commit
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Commit:894a4b4da7e2 add the voltage configuration macro that base on
the 0.1mV precision, and i.MX6UL/i.MX6ULL/i.MX7D use the macro as 1mV
prevision that cause the conversion are wrong, then some boards cannot
boot up in ldo bypass mode.The patch just correct the usage of PFUZE3000_SW1AB_SETP().
Signed-off-by: Fugang Duan
03 May, 2017
1 commit
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For some i.MX6SL evk board, enet phy need reset.
Add phy reset before phy clock enable and init the
pinctrl earlier.Signed-off-by: Fugang Duan
29 Apr, 2017
5 commits
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Copy the dts files from kernel for MX6SXSCM EVB board for
preparing enabling the OF_CONTROL.Signed-off-by: Juan Gutierrez
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Update mx6sxscm boards code and build configurations to enable
OF_CONTROL and DM drivers.1. Update GPIO codes for adding gpio request
2. Update PMIC and LDO by-pass codes for DM PMIC
3. Add lpddr2 512MB size and eMMC options tolocal Kconfig
4. Update license with NXP 2017
5. Add defconfigs for EVB boardsSigned-off-by: Juan Gutierrez
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Move the scm mx6sxscm board generic support code from v2016.03
as the base for converting to use DTB OF_CONTROLSigned-off-by: Juan Gutierrez
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1. set fdt_file according to board_rev which is set at runtime
2. Add macros for proper delimitation for different board builds
3. Fix and add proper iomux configurationSigned-off-by: Juan Gutierrez
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Copy the dts files from kernel for qwks boards for preparing
enabling the OF_CONTROL.Signed-off-by: Juan Gutierrez
