27 Apr, 2018
40 commits
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Add the mipi dsi panel driver for device HX8363 from kernel. The panel
driver needs work with mipi_dsi_northwest driver.Signed-off-by: Ye Li
(cherry picked from commit 0c6d0f4202bae7f61d38ecff1c9d255261f022f2)
(cherry picked from commit d65bbb0585a906072f01a2d72169be0b13b1d9b8) -
Add the host driver base from kernel for MIPI DSI controller on i.MX7ULP.
The controller provides a DPI-2 interface for LCDIF video stream, and a APB interface
for packet transmission.The driver provides APIs to register a MIPI panel device and its driver. The panel
driver can use the write packet function provided by the host driver to send control
packets to panel device via APB interface.MIPI DSI has its PHY and dedicated PLL. The driver will setup them when enabling the DSI
host.Signed-off-by: Ye Li
(cherry picked from commit e02115dd1c5d36ec06eabcb5a0b8e09aaf0f29a0)
(cherry picked from commit 1e984bba8cd961daa4c5bf994a6a90a72cc2f114) -
Porting codes to support USB OTG0 on the EVK board. Convert
to use DM USB driver.Signed-off-by: Ye Li
(cherry picked from commit b4e01a67a0740c524e7522da7ace0488f86261db) -
Wrong I2c driver configuration name is used in codes, so I2c driver is
not built. Correct it.Signed-off-by: Ye Li
(cherry picked from commit d54d59ecc1800a46d5ed897448496b8d73a822aa) -
Enable the CONFIG_ULP_WATCHDOG in defconfig, so that reset command
can work.Signed-off-by: Ye Li
(cherry picked from commit da1c290f0b890fafeb8ce29b53b764eaee53520b) -
Porting the QSPI flash board support from v2016.03, and convert to use
DM QSPI driver.
Since we need to support QSPI at default in u-boot, change the default
DTS file to qspi enabled DTS.Signed-off-by: Ye Li
(cherry picked from commit 41895cd598be6c4a64fc4fec521120e4962abc28) -
Since many drivers need this CONFIG_MX7ULP to distiguish the settings
for i.MX7ULP only. Add this entry to cpu's kconfig.Signed-off-by: Ye Li
(cherry picked from commit a4d958d120d29f6f79e9023715a42bac582f4c76) -
Update LPDDR3 script from v1.2 to v1.4 EVK_IMX7ULP1_LPDDR3_320MHz_1GB_32bit_V1.4.inc
with the changes below:Version 1.3
-Update the precharge command to CMD=01 at the DDR initialization phase
Version 1.4
-remove unimplemented registers
Write data bit delay --refer to the DDR_TRIM bits in IOMUXC1_DDR_SW_PAD_CTL_PAD_DDRnFile:
http://compass.freescale.net/livelink/livelink?func=ll&objid=235761218&objAction=browse&sort=name&viewType=1Test:
One EVK board passes overnight stress test.Signed-off-by: Ye Li
(cherry picked from commit e3343cb38eac2cc69b58247b5adcb500e5f19834)
(cherry picked from commit f5dc17e6579f677eebe1df59570737f4d51430dd) -
For the current APLL setting, as we want the APLL PFD0 to meet DDR clock 320Mhz requirement.
We set MULT to 20, NUM to 4 and DENOM to 2, to get final 22 multiplier. But according to the RM,
the NUM should always be less than the DENOM. So our setting violates the rule.Actually the ROM has already set the MULT to 22 and leave NUM/DENOM in default value. The calculated APLL PFD0 clock
is 318.9888Mhz, which also meet the DDR requirement.
To fix the issue, we remove the PLL settings in DCD to use default value from ROM, and only set the PFD0 FRAC.Signed-off-by: Ye Li
(cherry picked from commit 8cc70b1ded5309dee522aa00b43bd702a209ba51)
(cherry picked from commit 4eb0fbdacfe0678e41d1ebf35c7863736e83637e) -
The offset for FRAC and the mask for PCD are not correct. If we set FRAC, we
can't get the right frequency. Fix them to correct value.Signed-off-by: Ye Li
(cherry picked from commit 079db9559c06c5e68ab8f6cd67ec4f5115dd2d59)
(cherry picked from commit cd293a66df0409c6d030c22f872353e8f2613f03) -
On i.MX7ULP, value zero is reserved in SCG1 RCCR register,
so the val should be decreased by 1 to get the correct clock
source index.Signed-off-by: Bai Ping
(cherry picked from commit 7c9a3573ec0191f1e0bea12956346a5eab2db43a)
(cherry picked from commit de38b748fcd138ddcae4dda2bcfbf04466c33d21) -
The board will reboot if A7 core enter mem mode by rtc, then M4 core
enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode
to fix this issue.
Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access
it. So check the CPU rev and not apply the settings for B0.Signed-off-by: Bai Ping
(cherry picked from commit 5aa5974f487e0b4c2e963a86203161c5f05e2fdf) -
Since the SD3.0 kernel driver needs M4 image support, this causes problem to mfgtool.
To decouple the relationship, we modify the FDT file in u-boot to disable
SD3.0 when booting from USB for mfgtool. So the kernel won't depend on M4 image.Signed-off-by: Ye Li
Tested-by: Fugang Duan
(cherry picked from commit 1826d6e4dc732521190c742f812193be95eea211)
(cherry picked from commit 589812f232a7a07873a74e5506153977ce11dce2) -
Add common plugin codes to call ROM's hwcnfg_setup and generate IVT2
header.Signed-off-by: Ye Li
(cherry picked from commit 58ffe85c25ff554c185d8f6fd8b6443f167227da)
(cherry picked from commit 8dc963c970f81f9cdefff0955eba6b27ca7dc17e) -
On mx7ulp EVK board, we use MX25R6435F NOR flash, add its parameters
and IDs to flash parameter array. Otherwise, the flash probe will fails.Signed-off-by: Ye Li
(cherry picked from commit 0d6bee19bb3e87ebf984fdc218b3b020006cb2e9) -
The single boot mode in MX7ULP will only boot up A7, the M4 is running in ROM
by checking entry from SIM0 GP register.In this patch, We bind M4 image with u-boot.bin by allocating a section for m4 image.
So the whole image (included M4 image) will be loaded by A7 ROM into DDR. Then
when u-boot is up, it will try to load M4 image into TCML and boot it there.Since M4 image will not be relocated in u-boot codes, we must load it during
board_f. Current implementation put it in arch_cpu_init to get M4 booted
as quick as possible.We requires the M4 image with IVT head and padding embedded, not a RAW binary. The
image should be same as what is used for M4 QSPI boot in dual boot mode.Signed-off-by: Ye Li
(cherry picked from commit 04163dbd4f6190f310fff17b53b4bc7b8370ba89)
(cherry picked from commit 81b5ea14493ef25a6cca22bc5651ec3e93e941f3) -
If boot from usb, reset environment to default value.
Auto apply mfgtools setting and boot mfgtools kernel.Only add for mx6, the mx7 and mx7ulp have implemented
relevant USB functions in soc level.Signed-off-by: Ye Li
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Enable the module disable fuse checking configurations, and ENET fuse checking during
ENET setup.Signed-off-by: Ye Li
Tested-by: Bai Ping
(cherry picked from commit d2192a3909be8ab9433082e7c04c917489b28e25)
(cherry picked from commit 5fa7d431db1c5eda903f211a99c426d8d57293bd) -
Enable the configurations CONFIG_MODULE_FUSE and CONFIG_OF_SYSTEM_SETUP for
module fuse check. And modify board level codes for SD, FEC and EIM.Signed-off-by: Ye Li
(cherry picked from commit 9232e9f7637afa3b71b43ab2d1361582ec5a080a)
(cherry picked from commit 687b586bf7d3b0d2f796c8ea768e4fb450079adb) -
Add the fuse checking in drivers, when the module is disabled in fuse,
the driver will not work.Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C,
USB-EHCI, GIS, LCDIF and EPDC.Signed-off-by: Ye Li
(cherry picked from commit 1704e116f9b39aeb99201919a18bc2b1e19a980e)
(cherry picked from commit 2d3b5df8530cd5ef883750378838dea7c40259af) -
Add new build configs for 9x9 evk and NAND/QSPI boot.
Update 14x14 EVK build config to align with v2017.03Signed-off-by: Ye Li
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To align with v2017.03, add functions:
1. Support GPMI NAND
2. Support LCD splash screen
3. Add 9x9 EVK board support with LPDDR2 used
4. Update PMIC and LDO bypass for 9x9 EVK
5. Support two ethernet controllersSigned-off-by: Ye Li
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Update the DTS files for 14x14 EVK and 9x9 EVK to align with
v2017.03. The MMC alias are removed for v2018.03Signed-off-by: Ye Li
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Align the build config files with v2017.03.
Add config files for reworked eMMC, NAND boot, QSPI boot
and plugin supportSigned-off-by: Ye Li
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Add functions below to align with v2017.03
1. Support 9x9 EVK board with using LPDDR2
2. Switch from SPL to Non-SPL
3. Add plugin and DCD for DDR initialization
4. Add two ethernet controllers support
5. Add LCD splash screen
6. Add GPMI NAND support
7. Update PMIC and LDO bypass settingsSigned-off-by: Ye Li
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Update imx6ul.dtsi file to align with kernel
(commit f3834c73366f985fef6c1fdaaa129dfceb6151cb)Remove the MMC alias due DM MMC will used as device index.
Add the DTS files for 14x14 EVK, 9x9 EVK, etc.
Signed-off-by: Ye Li
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Align the build configs with v2017.03, add new config for EPDC enabled.
Signed-off-by: Ye Li
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Add EPDC and LCD splash screen display support
Update environment settings to align with v2017.03Signed-off-by: Ye Li
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Update DTS and DTSi for mx6sllevk:
1. Fix USDHC pad settings
2. Add pin settings for i2c bus force idle
3. Fix non-removable bug for usdhc2
4. Remove MMC aliasSigned-off-by: Ye Li
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Add two build configs for EPDC and plugin.
Update default mx6slevk defconfig and spinor defconfig to align
with v2017.03Signed-off-by: Ye Li
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Porting functions from v2017.03 in board level codes:
1. Add EPDC support
2. Update environment settings
3. Add LDO bypass and update PMIC settings
4. Add keypad support
5. Add plugin support
6. Add DM ethernet driver supportSigned-off-by: Ye Li
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Copy the DTS and DTSi from v2017.03 u-boot.
Changes in DTS specified for u-boot:
1. Add alias for mmc and usb
2. Add pin settings for i2c bus force idle
3. Remove MMC aliasSigned-off-by: Ye Li
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Update mx6sxsabreauto defconfig to align with v2017.03.
Add other configs to support QSPI1 boot, NAND boot and plugin.
Signed-off-by: Ye Li
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Update DM PMIC settings and LDO bypass support.
Add BMODE support.
Add LVDS and LCD splash screen support
Add two ethernet controller support
Update environment settings
Add plugin supportSigned-off-by: Ye Li
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Copy the DTS from v2017.03
Compared with kernel DTS, the changes in DTS for u-boot:
1. To support DM QSPI driver, modify the n25q256a flash node's compatible
to "spi-flash".
2. Add pin settings for supporting i2c bus force idle.Signed-off-by: Ye Li
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Update mx6sxsabresd defconfig to align with v2017.03 with DM SPI and
DM ethernet enabled.Add other configs to support QSPI2 boot, reworked eMMC, M4 fastboot and
plugin.Signed-off-by: Ye Li
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Add emmc support which needs board rework.
Add I2C2.
Update DM PMIC settings and LDO bypass support.
Add BMODE support.
Add LVDS and LCD splash screen support
Add PCI power and reset GPIO and disable PCI at default.
Update QSPI settings for QSPI boot and M4 fastup.
Update environment settingsSigned-off-by: Ye Li
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Update i.MX6SX dtsi file and relevant DTS header files.
Add the imx6sx-sdb-emmc DTS file for reworked eMMC board.Changes in DTS and DTSi:
1. Modify the n25q256a flash node's compatible to "spi-flash".
2. Add spi0 and spi1 alias for qspi1 and qspi2.
3. Add USB alias
4. Remove MMC aliasSigned-off-by: Ye Li
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Add config files to support NAND and QSPI boot.
Add config file for plugin.
Add config files for RevA board and RevB boards.
Update settings to enable DM ethernet driver, remove the SYS_TEXT_BASESigned-off-by: Ye Li
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1. Add plugin support
2. Update to latest ddr3 script v2.0 version
refer commit (b4db09bc0fc96e7c7461afade6346e0700ad582f)
3. Add ddr3 script for TO1.1
4. Add BMODE support
5. Update header files to support QSPI boot and NAND boot settings.
6. Remove the wdog WCR bit 4 clear. Since we have implemented reset_cpu for mx7d.Signed-off-by: Ye Li
