04 Apr, 2020
3 commits
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USB 3 host controller may be described in ACPI to allow users alter
the properties or other features. Describe it for Intel Tangier SoC.Signed-off-by: Andy Shevchenko
Reviewed-by: Bin Meng -
There is established way to provide I²C timings, or actually counters,
to the OS via ACPI. Fill them for Intel Merrifield platform.Signed-off-by: Andy Shevchenko
Reviewed-by: Simon Glass -
There is no need to have an assignment to NULL for XSDT pointer.
Therefore, no need to assign it when rsdt_address is not set.
Because of above changes we may decrease indentation level as well.While here, drop unnecessary parentheses.
Signed-off-by: Andy Shevchenko
Reviewed-by: Bin Meng
05 Mar, 2020
5 commits
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Use cpu_x86_get_count() to read the number of cores.
cpu_x86_get_count() reads the number of CPUs from the device tree.
Using this function we can support multiple Apollo Lake
variants, e.g.: E3940 (4 cores) and E3930 (2 cores).This was tested on the E3940 and E3930 Apollo Lake variants.
Signed-off-by: Wolfgang Wallner
Reviewed-by: Bin Meng -
The function cpu_x86_get_count() is also useful for other modules.
Make it non-static and add a prototype + description.Signed-off-by: Wolfgang Wallner
Reviewed-by: Bin Meng -
Drop the Apollo Lake prefix 'apl' from the functions, types and
variables in the P2SB driver.The P2SB is not Apollo Lake specific, and as such it was moved in
commit 2999846c1127 ("x86: Move P2SB from Apollo Lake to a more generic
location") from the Apollo Lake folder to the intel_common folder.Signed-off-by: Wolfgang Wallner
Reviewed-by: Simon Glass
Reviewed-by: Bin Meng -
This reverts commit 0d67fac29f3187e67f4fd3ef15f73e91be2fad12.
As real hardware testing (*) shows the above mentioned commit
breaks U-Boot on it. Revert for the upcoming release. We may get
more information in the future and optimize the code accordingly.(*) on Intel Edison board.
Signed-off-by: Andy Shevchenko
Acked-by: Bin Meng
[bmeng: fix a typo in the commit message]
Signed-off-by: Bin Meng -
This function doesn't use uclass_find_first_device() correctly. Add a
check that the device is found so we don't try to read properties from a
NULL device.The fixes booting on minnoxmax.
Fixes: 87f1084a630 ("x86: Adjust mrccache_get_region() to use livetree")
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
19 Feb, 2020
3 commits
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The implementation of dma_map_single() and dma_unmap_single() is
exactly the same for all the architectures that support them.Factor them out to , and make all drivers to
include instead of .If we need to differentiate them for some architectures, we can
move the generic definitions to .Add some comments to the helpers. The concept is quite similar to
the DMA-API of Linux kernel. Drivers are agnostic about what is
going on behind the scene. Just call dma_map_single() before the
DMA, and dma_unmap_single() after it.Signed-off-by: Masahiro Yamada
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dma_unmap_single() takes the dma address, not virtual address.
Signed-off-by: Masahiro Yamada
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Make dma_map_single() return the dma address, and remove the
pointless volatile.Signed-off-by: Masahiro Yamada
11 Feb, 2020
1 commit
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sandbox conversion to SDL2
TPM TEE driver
Various minor sandbox video enhancements
New driver model core utility functions
07 Feb, 2020
7 commits
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Add nodes to the device tree for Cr50 and other available I2C ports. Also
enable the ACPI interrupt driver.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
ACPI GPEs are used to signal interrupts from peripherals that are accessed
via ACPI. In U-Boot these are modelled as interrupts using a separate
interrupt controller. Configuration is via the device tree.Add a simple driver for this.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Allow this driver to be used in TPL by setting up the interrupt type
correctly.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Add an IRQ type to each driver and use irq_first_device_type() to find
and probe the correct one.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
This config is not actually used here and in U-Boot it seems better to set
this using the device tree for each individual controller. The monolithic
config of the FSP-S is only necessary if the FSP is actually configuring
something, but here it is not.The FSP-S does enable/disable the various I2C ports. It might be nice to
handle this using the okay/disabled property of each port, but that can be
considered later.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Enable the Intel clock driver and modify coral's device tree to use it.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
The Primary to Sideband Bridge (P2SB) is not specific to Apollo Lake, so
move its driver to a common location within arch/x86.Signed-off-by: Wolfgang Wallner
Reviewed-by: Bin Meng
06 Feb, 2020
1 commit
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At present dm/device.h includes the linux-compatible features. This
requires including linux/compat.h which in turn includes a lot of headers.
One of these is malloc.h which we thus end up including in every file in
U-Boot. Apart from the inefficiency of this, it is problematic for sandbox
which needs to use the system malloc() in some files.Move the compatibility features into a separate header file.
Signed-off-by: Simon Glass
04 Feb, 2020
10 commits
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The Interrupt Timer Subsystem (ITSS) is not specific to Apollo Lake, so
remove the apl-prefix of the implemented functions/structures/...Signed-off-by: Wolfgang Wallner
Reviewed-by: Simon Glass
Reviewed-by: Bin Meng -
Add a Kconfig option to support enabling/disabling the inclusion of
the ITSS driver depending on the platform.Atuomatically select the ITSS driver when building for Apollo Lake.
Signed-off-by: Wolfgang Wallner
Reviewed-by: Simon Glass
Reviewed-by: Bin Meng
[bmeng: squashed in http://patchwork.ozlabs.org/patch/1232761/]
Signed-off-by: Bin Meng -
The Interrupt Timer Subsystem (ITSS) is not specific to Apollo Lake, so
move it to a common location within arch/x86.Signed-off-by: Wolfgang Wallner
Reviewed-by: Simon Glass
Reviewed-by: Bin Meng
[bmeng: conditionally build itss.c]
Signed-off-by: Bin Meng -
The code in this file is not specific to Apollo Lake. According to
coreboot sources (where this code comes from), it is common to at least:
* Apollo Lake
* Cannon Lake
* Ice Lake
* SkylakeSigned-off-by: Wolfgang Wallner
Reviewed-by: Simon Glass
Reviewed-by: Bin Meng -
ITSS stands for "Interrupt Timer Subsystem", so add that term to the
description of the relevant files.Signed-off-by: Wolfgang Wallner
Reviewed-by: Simon Glass
Reviewed-by: Bin Meng -
The fs segment is only used to get the global data pointer.
If it is accessed beyond sizeof(new_gd->arch.gd_addr), it is a bug.To specify the byte-granule limit size, drop the G bit, so the
flag field is 0x8093 instead of 0xc093, and set the limit field
to sizeof(new_gd->arch.gd_addr) - 1.Signed-off-by: Masahiro Yamada
Reviewed-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng
[bmeng: fixed the comments about FS segement]
Signed-off-by: Bin Meng -
I do not know why the boot code immediately after the system reset
should write-back the cache content. I think the cache invalidation
should be enough.I tested this commit with qemu-x86_defconfig, and it worked for me.
Signed-off-by: Masahiro Yamada
Reviewed-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng -
Slim Bootloader provides serial port info in its HOB to support
both IO or MMIO serial ports, but it's controlled by SYS_NS16550_MEM32
or SYS_NS16550_PORT_MAPPED in U-Boot.
To support both serial port configurations dynamically at runtime,
Slim Bootloader serial driver leverages NS16550_DYNAMIC.Signed-off-by: Aiden Park
Reviewed-by: Bin Meng
[bmeng: remove the obsolete comments for data->type]
Signed-off-by: Bin Meng -
Use this UART to improve the compatibility of U-Boot when used as a
coreboot payload.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Since mid 2016, coreboot has additional fields in the serial struct that
it passes down to U-Boot. Add these so we are in sync.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
26 Jan, 2020
1 commit
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Subsystems such as USB expect dma_map_single() and dma_unmap_single() to
do dcache flush/invalidate operations as required. For example, see
see drivers/usb/gadget/udc/udc-core.c::usb_gadget_map_request().
Currently drivers do this locally, (see drivers/usb/dwc3/ep0.c,
drivers/mtd/nand/raw/denali.c etc..)
Update arch specific dma_map_single() and dma_unmap_single() APIs to do
cache flush/invalidate operations, so that drivers need not implement
them locally.Signed-off-by: Vignesh Raghavendra
Reviewed-by: Masahiro Yamada
Reviewed-by: Rick Chen
18 Jan, 2020
3 commits
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At present panic() is in the vsprintf.h header file. That does not seem
like an obvious choice for hang(), even though it relates to panic(). So
let's put hang() in its own header.Signed-off-by: Simon Glass
[trini: Migrate a few more files]
Signed-off-by: Tom Rini -
These functions relate to memory init so move them into the init
header.Signed-off-by: Simon Glass
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This is an init-related function so belongs in that file. Move it.
Signed-off-by: Simon Glass
08 Jan, 2020
1 commit
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The PCI bus is not actually probed by the time the ofdata_to_platdata()
method is called since that happens in the uclass's post_probe() method.
Update the PMC and P2SB drivers to access the bus in its probe() method.Signed-off-by: Simon Glass
15 Dec, 2019
5 commits
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Add support for coral which is a range of Apollo Lake-based Chromebook
released in 2017. This also includes reef released in 2016, since it is
based on the same SoC.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
The memory and silicon init parts of the FSP need support code to work.
Add this for Apollo Lake.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
These are mostly specific to a particular SoC. Add the definitions for
Apollo Lake.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Add basic plumbing to allow Apollo Lake support to be used.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Adds a driver for the Apollo Lake Primary-to-sideband bus. This supports
various child devices. It supposed both device tree and of-platdata.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng