10 Feb, 2015
9 commits
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Conflicts:
include/splash.hSigned-off-by: Tom Rini
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Reduce the lcd_display_bitmap #ifdef complexity by extracting Atmel-specific
code for setting cmap for bitmap images into a new function lcd_set_cmap().
A default version is implemented with the remainder of the code.Signed-off-by: Nikita Kiryanov
Reviewed-by: Simon Glass
Tested-by: Bo Shen
Tested-by: Josh Wu
Cc: Bo Shen
Cc: Simon Glass
Cc: Anatolij Gustschin -
Reduce the bitmap_plot #ifdef complexity by extracting MPC823-specific code for
setting cmap into its own implementation of lcd_logo_set_cmap(), implemented in
mpc8xx_lcd.c. In the MPC823 implementation, ARRAY_SIZE(bmp_logo_palette) is
switched for BMP_LOGO_COLORS to avoid having to include bmp_logo_data.h, which
would cause a compilation error because the logo data and palette arrays would
be defined twice.This is a step towards cleaning bitmap_plot() of platform-specific code.
Signed-off-by: Nikita Kiryanov
Reviewed-by: Simon Glass
Tested-by: Bo Shen
Tested-by: Josh Wu
Cc: Simon Glass
Cc: Anatolij Gustschin -
Reduce the bitmap_plot #ifdef complexity by extracting Atmel-specific code for
setting cmap into a new function lcd_logo_set_cmap(), which is implemented in
atmel_lcdfb driver and defined as part of common/lcd.c api with a weak dummy
version. In the Atmel implementation, ARRAY_SIZE(bmp_logo_palette) is
switched for BMP_LOGO_COLORS to avoid having to include bmp_logo_data.h, which
would cause a compilation error because the logo data and palette arrays would
be defined twice.This is a step towards cleaning bitmap_plot() of platform-specific code.
Signed-off-by: Nikita Kiryanov
Reviewed-by: Simon Glass
Tested-by: Bo Shen
Tested-by: Josh Wu
Cc: Bo Shen
Cc: Simon Glass
Cc: Anatolij Gustschin -
Reduce the amount of platform-specific code in common/lcd.c by moving MPC823
implementation of fb_put_byte() to mpc8xx_lcd.c. Since we must also have a
default implementation for everybody else, make the remainder of the code
into a weak function.Signed-off-by: Nikita Kiryanov
Reviewed-by: Simon Glass
Tested-by: Bo Shen
Tested-by: Josh Wu
Cc: Simon Glass
Cc: Anatolij Gustschin -
Reduce the amount of platform-specific code in common/lcd.c by moving Atmel
implementation of fb_put_word() to atmel_lcdfb.c. Since we must also have a
default implementation for everybody else, make the remainder of the code
into a weak function.Signed-off-by: Nikita Kiryanov
Reviewed-by: Simon Glass
Acked-by: Bo Shen
Tested-by: Bo Shen
Tested-by: Josh Wu
Cc: Bo Shen
Cc: Simon Glass
Cc: Anatolij Gustschin -
configuration_get_cmap() is multiple platform-specific functions stuffed into
one function. Split it into multiple versions, and move each version to the
appropriate driver to reduce the #ifdef complexity.Signed-off-by: Nikita Kiryanov
Reviewed-by: Simon Glass
Tested-by: Bo Shen
Tested-by: Josh Wu
Cc: Bo Shen
Cc: Simon Glass
Cc: Anatolij Gustschin
08 Feb, 2015
3 commits
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make the HW WDT timeout configurable through the define
CONFIG_AT91_HW_WDT_TIMEOUT.Signed-off-by: Heiko Schocher
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As the PMECC hardware has different version. In SAMA5D4 chip, the PMECC ip
can generate 0xff pmecc ECC value for all 0xff sector.According to this, add PMECC version check, if it's SAMA5D4 then we always
let PMECC hardware to correct it.Signed-off-by: Josh Wu
Acked-by: Bo Shen
Acked-by: Andreas Bießmann -
As the at91cap9adk board is removed by commit: b5508344
(ARM: remove broken "at91cap9adk" board), so the at91cap9
code is not used anymore, and also the document for
at91cap9 can not be found on www.atmel.com, so remove the
at91cap9 related code.Signed-off-by: Bo Shen
Acked-by: Andreas Bießmann
07 Feb, 2015
4 commits
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The Quark SoC contains a legacy SPI controller in the legacy bridge
which is ICH7 compatible. Like Tunnel Creek and BayTrail, the BIOS
control register offset in the ICH SPI driver is wrong for the Quark
SoC too, unprotect_spi_flash() is added to enable the flash write.Signed-off-by: Bin Meng
Acked-by: Simon Glass -
The base address is found in a different way and the protection bit is also
in a different place. Otherwise it is very similar.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Since these board functions seem to be the same for all boards which use
FSP, move them into a common file. We can adjust this later if future FSPs
need more flexibility.This creates a generic PCI MMC device.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
Tested-by: Bin Meng -
This patch adds the DDR3 setup and training code taken from the Marvell
U-Boot repository. This code used to be included as a binary (bin_hdr)
into the AXP boot image. Not linked with the main U-Boot. With this code
addition and the following serdes/PHY setup code, the Armada-XP support
in mainline U-Boot is finally self-contained. So the complete image
for booting can be built from mainline U-Boot. Without any additional
external inclusion. Hopefully other MVEBU SoC's will follow here.Support for some SoC's has been removed in this version. This is:
MV_MSYS:
The code referred to by the MV_MSYS define is currently unused. And its
not really planned to support this in mainline. So lets remove it to
make the code clearer and increase the readability.MV88F68XX (A38x):
The code referred to by the MV88F68XX define (A38x) is currently unused.
And its partial and not sufficient for this device in this stage.
So lets remove it to make the code clearer and increase the readability.MV88F66XX (ALP):
The code referred to by the MV88F66XX define is currently unused. And its
not really planned to support this in mainline. So lets remove it to
make the code clearer and increase the readability.MV88F78X60_Z1:
The code referred to by the MV88F78X60_Z1 define is currently unused. As the
Z1 revision of the AXP is not supported in mainline anymore.
So lets remove it to make the code clearer and increase the readability.Remove support for Z1 & A0 AXP revisions (steppings). The current stepping
is B0 and this is the only one that is actively supported in this code
version.Tested on AXP using a SPD DIMM setup on the Marvell DB-MV784MP-GP board and
on a custom fixed DDR configuration board (maxbcm).Note:
This code has undergone many hours of coding-style cleanup and refactoring.
It still is not checkpatch clean though, I'm afraid. As the factoring of the
code has so many levels of indentation that many lines are longer than 80
chars. This might be some task to tackly later on.Signed-off-by: Stefan Roese
Reviewed-by: Luka Perkov
06 Feb, 2015
6 commits
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Since we must run a PCI BIOS ROM, and this can take a calamitous amount of
time, measure it using bootstage.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
If the BIOS emulator is not available, allow use of native execution if
available, and vice versa. This can be controlled by the caller.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Add a driver which locates the available XHCI controllers on the PCI bus
and makes them available.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
Use the new utility function instead of local code.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
This board uses a new PCI ID.
Signed-off-by: Simon Glass
Reviewed-by: Bin Meng -
There is an existing function prototype in the header file but it is not
implemented. Implement something similar.Signed-off-by: Simon Glass
Reviewed-by: Bin Meng
05 Feb, 2015
1 commit
03 Feb, 2015
1 commit
02 Feb, 2015
4 commits
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This results in a much more readable callgraph, because now they
can't be confused with the function having exactly the same name
in the generic mmc code.Signed-off-by: Siarhei Siamashka
Acked-by: Hans de Goede
Signed-off-by: Hans de Goede -
On both my A13-OLinuxIno and my A13-OLinuxIno-Micro, the vga output gives an
unstable image when active low v or hsync is used.The problem seems to be specific to the OLinuxIno A13 (normal & micro)
boards. I've just looked up the schematics and they use an opendrain driver
for the vga sync lines, and with sync pulses it is the logical high->low
edge of the pulse which counts for the timing, which with an active low
sync is being driven by the pull-up, and that simply seems to not drive
it hard enough to get a stable image.So force v and hsync active high on these boards. independent of what the
modeline says. This fixes the unstable image.Signed-off-by: Hans de Goede
Acked-by: Ian Campbell -
It turns out that the device_mode_data is rsb specific, rather then slave
specific, so integrate the rsb_set_device_mode() call into rsb_init().Signed-off-by: Hans de Goede
Acked-by: Ian Campbell
01 Feb, 2015
1 commit
31 Jan, 2015
4 commits
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If for some reason DMA module fails to reset user oserves only this:
--->---
# dhcp
Trying dwmac.e0018000
FAIL
--->---This message makes not much sense.
With proposed change error message will be more helpful:
--->---
# dhcp
Trying dwmac.e0018000
DMA reset timeout
FAIL
--->---For example user may do power toggle to recover board functionality.
Signed-off-by: Alexey Brodkin
Cc: Chin Liang See
Cc: Dinh Nguyen
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
Cc: Pavel Machek
Cc: Joe Hershberger
Cc: Ian Campbell
Cc: Marek Vasut
Reviewed-by: Tom Rini
Acked-by: Pavel Machek
Acked-by: Joe Hershberger
Signed-off-by: Joe Hershberger -
This patch adds a phy driver for the Micrel KSZ8895 switch. As the SoC MAC
is directly connected to the switch MAC the link to the switch is always up.But the KSZ8895 switch can be hardwired in three configuration modes :
- not configurable with eventually an eeprom-stored configuration
- configurable by the mdio/mdc connection (SMI protocol)
- configurable by a SPI connection.In not configurable mode, the switch starts automatically, but in the
other modes, it must be started programmatically, by writing 1 in
configuration register 1.
We only support the not configurable and mdio/mdc (aka SMI) modes here.Signed-off-by: Philippe De Muyter
Cc: Christian Gmeiner
Signed-off-by: Joe Hershberger -
Signed-off-by: Yoshinori Sato
Signed-off-by: Joe Hershberger -
If the PHY is not recognized don't access phydev (NULL)
and return 0 to signal failure.Signed-off-by: Claudiu Manoil
Signed-off-by: Joe Hershberger
30 Jan, 2015
7 commits
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Fix this:
drivers/pci/pci_rom.c:95:15: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]
rom_header = (struct pci_rom_header *)rom_address;Signed-off-by: Minghuan Lian
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Fix this:
warning: cast from pointer to integer of different sizeSigned-off-by: Minghuan Lian
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Move this driver to use driver model and update the snow configuration to
match.Signed-off-by: Simon Glass
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These functions are useful in case the board calls them. Also fix a missing
parameter caused by applying the wrong patch (actually I failed to send v2
and applied v1 by mistake).Signed-off-by: Simon Glass
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Since U-Boot can support different offset lengths (0-4 bytes), add a device
tree property to specify this. This avoids hard-coding it in the driver.Signed-off-by: Simon Glass
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This commit adjusts the s3c24x0 driver to new i2c api
based on driver-model. The driver supports standard
and high-speed i2c as previous.Tested on Trats2, Odroid U3, Arndale, Odroid XU3
Signed-off-by: Przemyslaw Marczak
Tested-by: Simon Glass
Cc: Simon Glass
Cc: Heiko Schocher
Cc: Minkyu Kang
Acked-by: Simon Glass
