10 Nov, 2015

1 commit


29 Aug, 2015

2 commits


07 Jul, 2015

1 commit


15 Jun, 2015

1 commit

  • The recent changes for hw leveling on am33xx were not intended for
    DDR2 boards, only DDR3. Update emif_sdram_type to take a sdram_config
    value to check against. This lets us pass in the value we would use to
    configure, when we have not yet configured the board yet. In other cases
    update the call to be as functional as before and check an already
    programmed value in.

    Tested-by: Yan Liu
    Signed-off-by: Tom Rini
    Signed-off-by: Lokesh Vutla

    Tom Rini
     

19 Apr, 2015

1 commit


14 Apr, 2015

2 commits


14 Jan, 2015

6 commits


29 Oct, 2014

1 commit

  • This commit introduces a Kconfig symbol for each ARM CPU:
    CPU_ARM720T, CPU_ARM920T, CPU_ARM926EJS, CPU_ARM946ES, CPU_ARM1136,
    CPU_ARM1176, CPU_V7, CPU_PXA, CPU_SA1100.
    Also, it adds the CPU feature Kconfig symbol HAS_VBAR which is selected
    for CPU_ARM1176 and CPU_V7.

    For each target, the corresponding CPU is selected and the definition of
    SYS_CPU in the corresponding Kconfig file is removed.

    Also, it removes redundant "string" type in some Kconfig files.

    Signed-off-by: Georges Savoundararadj
    Acked-by: Albert ARIBAUD
    Cc: Masahiro Yamada

    Georges Savoundararadj
     

14 Sep, 2014

1 commit

  • Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME}
    are specified in arch/Kconfig.

    We can delete the ones in arch and board Kconfig files.

    This commit can be easily reproduced by the following command:

    find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e '
    /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ {
    N
    s/\n[[:space:]]*string//
    }
    '

    Signed-off-by: Masahiro Yamada

    Masahiro Yamada
     

25 Aug, 2014

1 commit

  • This patch adds support for NAND device connected to GPMC chip-select on
    following AM43xx EVM boards.

    am437x-gp-evm: On this board, NAND Flash signals are muxed with eMMC, thus at a
    time either eMMC or NAND can be enabled. Selection between eMMC and NAND is
    controlled by:
    (a) Statically using Jumper on connecter (J89) present on board.
    (a) If Jumper on J89 is NOT used, then selection can be dynamically controlled
    by driving SPI2_CS0[MUX_MODE=GPIO] pin via software:
    SPI2_CS0 == 0: NAND (default)
    SPI2_CS0 == 1: eMMC

    am43x-epos-evm: On this board, NAND Flash control lines are muxed with QSPI,
    Thus only one of the two can be used at a time. Selection is controlled by:
    (a) Dynamically driving following GPIO pin from software
    GPMC_A0(GPIO) == 0 NAND is selected (default)

    NAND device (MT29F4G08AB) on these boards has:
    - data-width=8bits
    - blocksize=256KB
    - pagesize=4KB
    - oobsize=224 bytes
    For above NAND device, ROM code expects the boot-loader to be flashed in BCH16
    ECC scheme for NAND boot, So by default BCH16 ECC is enabled for AM43xx EVMs.

    Signed-off-by: Pekon Gupta

    pekon gupta
     

30 Jul, 2014

2 commits

  • We have switched to Kconfig and the boards.cfg file is going to
    be removed. We have to retrieve the board status and maintainers
    information from it.

    The MAINTAINERS format as in Linux Kernel would be nice
    because we can crib the scripts/get_maintainer.pl script.

    After some discussion, we chose to put a MAINTAINERS file under each
    board directory, not the top-level one because we want to collect
    relevant information for a board into a single place.

    TODO:
    Modify get_maintainer.pl to scan multiple MAINTAINERS files.

    Signed-off-by: Masahiro Yamada
    Suggested-by: Tom Rini
    Acked-by: Simon Glass

    Masahiro Yamada
     
  • This commit adds:
    - arch/${ARCH}/Kconfig
    provide a menu to select target boards
    - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
    set CONFIG macros to the appropriate values for each board
    - configs/${TARGET_BOARD}_defconfig
    default setting of each board

    (This commit was automatically generated by a conversion script
    based on boards.cfg)

    In Linux Kernel, defconfig files are located under
    arch/${ARCH}/configs/ directory.
    It works in Linux Kernel since ARCH is always given from the
    command line for cross compile.

    But in U-Boot, ARCH is not given from the command line.
    Which means we cannot know ARCH until the board configuration is done.
    That is why all the "*_defconfig" files should be gathered into a
    single directory ./configs/.

    Signed-off-by: Masahiro Yamada
    Acked-by: Simon Glass

    Masahiro Yamada
     

28 Jul, 2014

1 commit


26 Jul, 2014

1 commit


08 Jul, 2014

2 commits


20 Jun, 2014

4 commits


07 Jun, 2014

3 commits


04 Mar, 2014

3 commits


27 Feb, 2014

1 commit


22 Feb, 2014

1 commit


21 Feb, 2014

1 commit


19 Feb, 2014

1 commit


25 Jan, 2014

1 commit

  • This patch enables dynamically powering down the
    IO receiver when not performing a read on DDR3 board.
    This optimizes both active and standby power consumption.
    This is derived from a patch that is done on AM335x[1]

    [1] http://arago-project.org/git/projects/?p=u-boot-am33x.git;a=commit;h=6a9ee4bc72ece53fabf01825605fba3d71d5feb2

    Signed-off-by: Lokesh Vutla

    Lokesh Vutla
     

19 Dec, 2013

2 commits

  • GP EVM has 1GB DDR3 attached(Part no: MT41K512M8RH).
    Adding details for the same.
    Below is the brief description of DDR3 init sequence(SW leveling):
    -> Enable VTT regulator
    -> Configure VTP
    -> Configure DDR IO settings
    -> Disable initialization and refreshes until EMIF registers are programmed.
    -> Program Timing registers
    -> Program leveling registers
    -> Program PHY control and Temp alert and ZQ config registers.
    -> Enable initialization and refreshes and configure SDRAM CONFIG register

    Signed-off-by: Lokesh Vutla

    Lokesh Vutla
     
  • AM4372 EPOS EVM has 1GB LPDDR2(Part no: MT42L256M32D2LG-25 WT:A)
    Adding LPDDR2 init sequence and register details for the same.
    Below is the brief description of LPDDR2 init sequence:
    -> Configure VTP
    -> Configure DDR IO settings
    -> Disable initialization and refreshes until EMIF registers are programmed.
    -> Program Timing registers
    -> Program PHY control and Temp alert and ZQ config registers.
    -> Enable initialization and refreshes and configure SDRAM CONFIG register
    -> Wait till initialization is complete and the configure MR registers.

    Signed-off-by: Lokesh Vutla

    Lokesh Vutla