19 Feb, 2019

6 commits

  • SPL should not use DM_SPI_FLASH, this is already cleaned in
    Makefile.uncmd_spl, but not in config_uncmd_spl.h

    Signed-off-by: Ye Li
    (cherry picked from commit cf8468482ec3cceb05700a326df044dc41f38793)

    Ye Li
     
  • For fspi build, we will enable both SPL NOR support and SPL SPI
    support. SPL will dynamically check the resource owner then
    select corresponding boot device.

    Signed-off-by: Ye Li
    (cherry picked from commit 675cc6031033fbe5e7d8cfe01ebe1dedfd6c1b96)

    Ye Li
     
  • Since FSPI is assigned to M4 partition, A core only can read it from its
    memory-map address. So we have to enable SPL NOR which won't access
    flexspi driver.

    Update SPL container parser for the RAW NOR support.

    Signed-off-by: Ye Li
    (cherry picked from commit 7ea7a16fd892558098fb8cbea134ac275d1220d3)

    Ye Li
     
  • When we probe device with virtual i2c driver, it will definitely
    fail to power up the PD. Becasue the resource is owned by M4. So
    set this driver to ignore the power up result

    Signed-off-by: Ye Li
    (cherry picked from commit 7f753d1b5950015b11be58aa937e5c14b9f26d7a)

    Ye Li
     
  • If a device has relevant power domain, we will check the power up
    result in probing the device. If the power up is failed, the device_probe
    will return failure immediately.

    The only exception is the new FLAG (DM_FLAG_IGNORE_POWER_ON) is set by driver
    to indicate ignore the power up result.

    Signed-off-by: Ye Li
    (cherry picked from commit 8524ca764d8fbd05da1593abfed62bb075c50cd4)

    Ye Li
     
  • When fspi is assigned to M4, we have to let the fspi probe failed when
    its power domain is failed to power up. Because not all devices have power
    domain (for example, external devices on the board). Current checking
    resource owner in power domain probe is not good, change to check it in
    power on.

    Signed-off-by: Ye Li
    (cherry picked from commit b62b82ad595a744f07306db4b88d644ae024872a)

    Ye Li
     

18 Feb, 2019

5 commits

  • Add a new private flag I2C_M_SRTM_STOP(0x0200) to indicate if STOP
    is needed for current message.
    When reading/writing registers for slave devices, generally we have two messages,
    the first message writes the register address, second message reads/writes the value.
    Only the last message needs STOP. But previously M4 sends STOP for each message,
    this causes some slave devices treat it as end of transfer. Then, second message won't
    have any effect. To solve the problem, we introduce this private STOP flag, so M4 can
    STOP according to the flag.

    Signed-off-by: Ye Li
    Reviewed-by: Peng Fan
    (cherry picked from commit e8f70409620da897917dfa29dbe65be82c9129fd)

    Ye Li
     
  • Current signed OS container loading address is 0x88000000. It conflicts
    with DDR memory reserved for M4. If we build image with ALT_CONFIG enabled.
    SCFW will assign that memory to M4. Then authentication to kernel image
    will have problem. So modify to new address 0x98000000 which is safe.

    Signed-off-by: Ye Li
    Reviewed-by: Peng Fan
    (cherry picked from commit 545b972a59c86e2b45b40e53a8e6c13f79e3e265)

    Ye Li
     
  • Check the OS container image address is belonged to valiad DRAM memory
    before accessing it to avoid u-boot crash on invalid address.

    Also refine the error print.

    Signed-off-by: Ye Li
    Reviewed-by: Peng Fan
    (cherry picked from commit f40dc07b3df9ad71ea501c77a19924361b133de7)

    Ye Li
     
  • The HDMI digital PLL, bus clock and core clock need to change to match the
    settings used by the Linux driver. This allows the SECO to start and
    initialize the HDMI/DP firmware.

    Signed-off-by: Oliver Brown
    (cherry picked from commit d2713d11afc35bc2ce546f9bd065cc7477ee65cc)

    Oliver Brown
     
  • Add firmware athentication to the hdp and hdprx load functions.
    If hdp_authenticate_fw is set to yes, the hdp tx firmware is athenticated.
    If hdprx_authenticate_fw is set to yes, the hdp rx firmware is athenticated.

    Signed-off-by: Oliver Brown
    (cherry picked from commit 6c0246888012c50127b40f1ab6fa6d581f725f7a)

    Oliver Brown
     

15 Feb, 2019

1 commit

  • Update to latest SCFW API with below commit. Add version API and
    remove some resource ids.

    commit 004247e14afc74a21d65569415c4b2e35bfaabc3
    Author: Ranjani Vaidyanathan
    Date: Thu Feb 14 14:55:12 2019 -0800

    SCF-341 Fix bug in setting large slice clock divider

    Incorrect mask was applied when clearing out the bits in the
    DSC large slice divider.

    Signed-off-by: Ranjani Vaidyanathan

    Signed-off-by: Ye Li
    (cherry picked from commit 745f2e597613e96f1ac630e842faafdc060ee029)

    Ye Li
     

14 Feb, 2019

3 commits

  • Since commit cf2acc5b7cde ("MLK-18942-2 imx8: ahab: Add ahab_status
    command") the U-Boot is able to display and parse the SECO events.

    Update AHAB guides to use U-Boot ahab_status command instead of
    SCFW CLI.

    Starting in SECO FW v0.2.0 engineering release an invalid image
    integrity is logged as an event in open mode. As ahab_status
    is able to return this event the note can be removed.

    Signed-off-by: Breno Lima
    Reviewed-by: Ye Li
    (cherry picked from commit 385ed19051a47f5858e8d326e5ee97f8a08a679d)

    Breno Lima
     
  • The set_priblob_bitfield command is enabled by selecting
    CONFIG_CMD_PRIBLOB.

    Fix typo in mx6_mx7_encrypted_boot.txt guide.

    Signed-off-by: Breno Lima
    (cherry picked from commit 99f9696ef5f7d1c0f93b7d910e884890fca6c973)

    Breno Lima
     
  • The current U-Boot implementation is not decoding the verify image message
    response.

    => ahab_status
    Lifecycle: 0x0020, NXP closed

    SECO Event[0] = 0x0088F100

    Starting in SECO FW v0.2.0 engineering release an invalid image integrity
    is logged as an event in open mode.

    Update U-Boot ahab_status command to decode this event.

    Signed-off-by: Breno Lima
    Reviewed-by: Ye Li
    (cherry picked from commit 96a192eb1d09fbed0e7e544fa7cc4f9d83d4acac)

    Breno Lima
     

13 Feb, 2019

2 commits


12 Feb, 2019

12 commits

  • Update the defconfig files for imx8qxp MEK to enable i2c and
    i2c mux virtual drivers.

    Signed-off-by: Ye Li
    Acked-by: Peng Fan
    (cherry picked from commit f2d75f7925108d4cc89c8cd4f1d9f735803c8ad1)

    Ye Li
     
  • Since we have asked SCFW to do this job to avoid issues in partition
    reboot, remove relevant codes.

    Signed-off-by: Ye Li
    (cherry picked from commit 8128566e843d76720cdc5c3e075fa303e401132f)

    Ye Li
     
  • If the resource is not owned by current partition, we can't power on/off
    it, so we'd better return probe failure.

    Signed-off-by: Ye Li
    (cherry picked from commit 327115c1d490d35afd94ae416ad91bebd595cfe2)

    Ye Li
     
  • If a pad is not owned by current partition we should not set its
    pinmux.

    Signed-off-by: Ye Li
    (cherry picked from commit 547636514f8ae8b456f2351bc84cb7fb7b5fa3f3)

    Ye Li
     
  • Add compatible strings and properties to i2c1 node for using virtual
    i2c and i2c mux drivers

    Signed-off-by: Ye Li
    (cherry picked from commit 9dbdbec24b2d0cd67d16cf93034b3ab60bb312bc)

    Ye Li
     
  • We use MU8 and MU9 to communicate with M4_0 and M4_1 in u-boot. Add
    relevant nodes for the MU driver.

    Signed-off-by: Ye Li
    (cherry picked from commit b06674a91991fe3bfe5a2f6000195cb8546c72a6)

    Ye Li
     
  • When a i2c device is binding with drivers, we check whether current
    partition ownes the resource. If not owned, the binding to local lpi2c
    driver will fail, otherwise binding to virtual i2c driver will fail.

    Signed-off-by: Ye Li
    (cherry picked from commit 81dd157fd0ba476c994e95a63515cb65164f1e87)

    Ye Li
     
  • Override the board_imx_vservice_find_mu for finding MU device for
    virtual devices. The matching logic is if the M4_0 partition ownes
    the resource of the device, we select MU8 for this Vservice channel.
    Otherwise, if the M4_1 partition ownes the resource, we select MU9.

    We reuse the kernel RPMSG Vring buffer for VService buffer, because it is
    shared between OS partition and M4 partition. The pagetable is needed for
    this region, since it is not in memregs of OS partition.

    board_imx_vservice_get_buffer is also overriden is this patch to divide
    VService buffer for MU8 and MU9.

    Signed-off-by: Ye Li
    (cherry picked from commit 4358b4cdfc4752822066d480dd1c10086c211be7)

    Ye Li
     
  • We provide override binding function, so the ARCH level can use it
    to determine if it is ok to bind with lpi2c driver.

    Signed-off-by: Ye Li
    (cherry picked from commit b19418270a3d532eacb1069606fa2ab100e04601)

    Ye Li
     
  • Add virtual i2c driver which replies on the VService to send SRTM i2c
    messages with M4.
    For each output on i2c mux, M4 side abstracts a i2c bus with special bus
    id. The virtual i2c mux follows basic mux design, but uses dedicated flag
    to pass the abstract bus id for the mux output to virtual i2c driver.

    Virtual i2c and virtual i2c mux will bind nodes with compatible string
    "fsl,imx-virt-i2c" and "fsl,imx-virt-i2c-mux".

    To support binding local i2c driver or virtual i2c driver at runtime. We
    provides a override function for the driver bind. ARCH level is responsible
    to implement it.

    Signed-off-by: Ye Li
    (cherry picked from commit 25095e9f0d9816c22da97945b66439dfa277aa2b)

    Ye Li
     
  • We use a glue layer to link the low level MU driver and virtual drivers.
    This glue layer is named to virtual service (iMX VService). Virtual service
    provides unified interfaces for setup connection with M4, get message buffer
    and send/receive message, etc.

    Multiple virtual drivers (i2c, gpio, etc)
    |
    iMX Vservice
    |
    imx_mu_m4 driver

    For each virtual device, by default, the Vservice uses the device node property
    "fsl,vservice-mu" to specify the MU node handler. A override function is also provided,
    so te ARCH level can define its rule. We will use the override function for dynamically
    select MU on 8QM/QXP.

    Signed-off-by: Ye Li
    (cherry picked from commit 4d872794cae55ffb654a55646bbf231e8d864e13)

    Ye Li
     
  • Add a common iMX MU driver in misc uclass to communicate with M4.
    The MU message format is defined to use 4 words as below, the driver
    will use all 4 TR/RR in MU to pass one message

    |WORD 0 | WORD 1 | WORD 2 | WORD 3 |
    |SEQ | TYPE | PAYLOAD ADDRESS | PAYLOAD LENGTH |

    - SEQ:
    A sequence id starts from 0 and increases for each request message

    - TYPE:
    0x1: Request. Message sent from AP will set to this value.
    0x2: Response. Message responded from M4 set to this value.
    0x3: MU A side is ready.
    0x4: MU B side is ready.

    - PAYLOAD ADDRESS:
    A pointer to the memory address where the uplayer message is stored

    - PAYLOAD LENGTH:
    The uplayer message length

    Signed-off-by: Ye Li
    (cherry picked from commit aba0e51cc397e1d98be950f9c15619de06ebf782)

    Ye Li
     

11 Feb, 2019

3 commits

  • The usb mass storage (f_mass_storage.c) uses fixed usb index 0,
    this causes problem while CDNS3 USB controller index is 1.
    Modify the API of fsg to pass the controller index.

    Signed-off-by: Ye Li
    Reviewed-by: Jun Li

    Ye Li
     
  • According to latest datasheet IMX8MMCEC_Rev_0, the typical voltage
    of VDD_DRAM for 1.5GHz DDR clock is 0.95v. Because BD71847MWV PMIC
    does not support 0.95v output. We change the voltage to 0.975v as
    the note in datasheet mentioned it is acceptable and supported.

    Signed-off-by: Ye Li
    Reviewed-by: Bai Ping

    Ye Li
     
  • Sync the SCFW API to latest commit below:

    commit 0721a2af721fca45e9d7e9b673b669ffab9aca7f
    Author: Glen Wienecke
    Date: Sun Feb 10 19:16:56 2019 -0600

    SCF-296: Partition reboot should not reset FSPI/OCRAM if in use
    - Update ss_rsrc_reset to return BUSY error if FSPI/OCRAM in use
    - Update pm_update_ridx to skip power transition if FSPI/OCRAM in use
    - For user_mode update requests, reflect mode achieved after pm_update_ridx
    - Add PM SVC call to get active mode (user_mode not accurate during transitions)
    - Undo some MISRA updates that changed ss_rsrc_reset to void function

    Signed-off-by: Glen Wienecke

    Signed-off-by: Ye Li
    Acked-by: Peng Fan

    Ye Li
     

06 Feb, 2019

1 commit


31 Jan, 2019

2 commits


30 Jan, 2019

2 commits

  • Update SCFW API to below commit which has deprecated APIs with
    misc_seco prefix.

    commit 30b8f67097d65c6e22f218b106aeafdc636aece3
    Author: Chuck Cannon
    Date: Fri Jan 25 15:24:55 2019 -0600

    SCF-60: MISRA fixes.

    Signed-off-by: Chuck Cannon

    Signed-off-by: Ye Li

    Ye Li
     
  • Current container parser only load 0x400 as container header size.
    However, the signature block in container header may exceed 0x400 size,
    when using certificate or 4096bits RSA keys to sign image, so we
    have to load the entire header according to container length field.
    Otherwise the container authentication will fail

    Signed-off-by: Ye Li
    Reviewed-by: Peng Fan

    Ye Li
     

25 Jan, 2019

3 commits

  • SCFW has taken to reset the base board by deasserting BB_PER_RST_B(SCU_GPIO0_01) on
    imx8QM MEK board, and has removed the SC_R_BOARD_R1 functionality.
    So We don't need to explicitly use SC_R_BOARD_R1, delete the codes from u-boot.

    Signed-off-by: Ye Li

    Ye Li
     
  • Since different ARM2/Validation boards use different kernel FDT, configure
    them to CONFIG_DEFAULT_FDT_FILE in defconfig

    Signed-off-by: Ye Li
    Reviewed-by: Peng Fan

    Ye Li
     
  • There are two new validation boards: LPDDR4 board (30123) and DDR3L board (30010)
    for imx8x family 17x17 chips. These two boards have same design except the DDR.
    Since SCFW is resposible for DDR initialization, U-boot could use one build to
    cover two boards.
    The 8DX 17x17 DDR3L ARM2 has been added into u-boot before, so we rename the config
    CONFIG_TARGET_IMX8DX_DDR3_ARM2 to CONFIG_TARGET_IMX8X_17X17_VAL to cover DDR3L and
    LPDDR4.

    Considering 8DX and 8QXP 17x17 may solder to the boards, we create two defconfig:
    one for DX and another for 8qxp to share with the CONFIG_TARGET_IMX8X_17X17_VAL
    but with different FDTs.

    Signed-off-by: Ye Li

    Ye Li