06 Jun, 2016
1 commit
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If the usb controller is not running, no need to shutdown it,
otherwise `usb stop` complains about:
"EHCI failed to shut down host controller".To i.MX7D SDB, there are two usb ports, one Host, one OTG.
If we only plug one udisk to the Host port and then `usb start`,
the OTG controller for OTG port does not run actually. Then,
if `usb stop`, the OTG controller for OTG port will also be
shutdown, but it is not running.This patch adds a check that only shutdown the running controller.
Signed-off-by: Peng Fan
03 Jun, 2016
1 commit
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Bank 7 and Bank 8 only supports 4 words each. 'bank << 3 | word'
is not correct when program bank 8, since ocotp controller actully
use word index.For example: fuse prog 8 3 1; The word index is (8 << 3 | 3) --> 67.
But actully it should be (7 << 3 | 7) ---> 63.
So fix it.Signed-off-by: Peng Fan
31 May, 2016
1 commit
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Should have "&" to access the register address, otherwise uboot will hang.
Signed-off-by: Ye Li
09 May, 2016
1 commit
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The MIB RAM and FIFO receive start register does not exist on
i.MX6ULL. Accessing these register will cause enet not work well or
cause system report fault.Reported-by: Bai Ping
Signed-off-by: Peng Fan
07 May, 2016
1 commit
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This patch is a porting of
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_4.1.15_1.0.0_ga&id=e4dacc44d22e9474ec456cb330df525cd805ea38
"
i.MX6QP and i.MX7D BCH module integrated a new feature to detect the
bitflip number for erased NAND page. So for these two platform, set the
erase threshold to gf/2 and if bitflip detected, GPMI driver will
correct the data to all 0xFF.Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q
with the one for i.MX6QP.
"In this patch, i.MX6UL is added and threshold changed to use ecc_strength.
Signed-off-by: Peng Fan
06 May, 2016
1 commit
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This patch is porting from linux:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/?h=imx_4.1.15_1.0.0_ga&id=3d42fcece496224fde59f9343763fb2dfc5b0768"
We may meet the bitflips in reading an erased page(contains all 0xFF),
this may causes the UBIFS corrupt, please see the log from Elie:-----------------------------------------------------------------
[ 3.831323] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
[ 3.845026] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
[ 3.858710] UBI warning: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read only 16384 bytes, retry
[ 3.872408] UBI error: ubi_io_read: error -74 (ECC error) while reading 16384 bytes from PEB 443:245760, read 16384 bytes
...
[ 4.011529] UBIFS error (pid 36): ubifs_recover_leb: corrupt empty space LEB 27:237568, corruption starts at 9815
[ 4.021897] UBIFS error (pid 36): ubifs_scanned_corruption: corruption at LEB 27:247383
[ 4.030000] UBIFS error (pid 36): ubifs_scanned_corruption: first 6569 bytes from LEB 27:247383
-----------------------------------------------------------------This patch does a check for the uncorrectable failure in the following steps:
[0] set the threshold.
The threshold is set based on the truth:
"A single 0 bit will lead to gf_len(13 or 14) bits 0 after the BCH
do the ECC."For the sake of safe, we will set the threshold with half the gf_len, and
do not make it bigger the ECC strength.[1] count the bitflips of the current ECC chunk, assume it is N.
[2] if the (N
03 May, 2016
1 commit
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2016 u-boot added dummy CPU types for the i.MX6QP and i.MX6DP. When
doing runtime cpu type checking, we can't use CPU type of i.MX6Q and
i.MX6D for them more, which is ok in 2015 u-boot.This patch adds the MXC_CPU_MX6QP and MXC_CPU_MX6DP at some places missed to
do the checking.Signed-off-by: Ye Li
13 Apr, 2016
2 commits
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provide one config "CONFIG_NAND_MXS_BCH_LEGACY_GEO" to keep using legacy
bch geometry.NOTICE: the feature must be enabled/disabled in both u-boot and kernel.
Signed-off-by: Han Xu
(cherry picked from commit 0abc9c182c24f88522bd74fa1b53cd2fa3477184) -
The MX6ULL has two 128 bits fuse banks, bank 7 and bank 8, while other
banks use 256 bits. So we have to adjust the word and bank index when accessing
the bank 8.Signed-off-by: Ye Li
Signed-off-by: Peng Fan
(cherry picked from commit bb71569f51762cdee876fc4a6154624285d548f5)
25 Mar, 2016
30 commits
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Add the fuse checking in drivers, when the module is disabled in fuse,
the driver will not work.Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C,
USB-EHCI, GIS, LCDIF.Signed-off-by: Ye Li
-
Enable pcie support in uboot on imx6sx sd boards
- enable_pcie_clock should be call before ssp_en is set,
since that ssp_en control the phy_ref clk gate, turn on
it after the source of the pcie clks are stable.
- add debug info
- add rx_eq of gpr12 on imx6sx
- there are random link down issue on imx6sx. It's
pcie ep reset issue.
solution:reset ep, then retry link can fix it.(cherry picked from commit ec78595a24b5ff1020baa97b6d6e79a3a3326307)
Signed-off-by: Richard Zhu
Signed-off-by: Ye Li -
Integrate the FSL android fastboot features into community's fastboot.
1. Use USB gadget g_dnl driver
2. Integrate the FSL SD/SATA/NAND flash operations, since the GPT and
EFI partitions are not support by i.MX.
3. Add FDT support to community's android image.
4. Add a new boot command "boota" for android image boot. The boota
implements to load ramdisk and fdt to their loading addresses
specified in boot.img header, while bootm won't do it for android image.
5. Support the authentication of boot.img at the "load_addr" for
both SD and NAND.
6. We use new configuration CONFIG_FSL_FASTBOOT for Freescale's fastboot
with relevant header file "fsl_fastboot.h". While disabling the
configuration, the community fastboot is used.
7. Overwrite the cmdline in boot.img by using bootargs saved in local environment.
8. Add recovery and reboot-bootloader support.Signed-off-by: Ye Li
-
The i.MX6SL EVK needs this driver in android fastboot support. Add
this driver to u-boot.To use the driver, user must define:
CONFIG_MXC_KPD Enable the driver
CONFIG_MXC_KEYMAPPING Key mapping matrix
CONFIG_MXC_KPD_COLMAX The column size of key mapping matrix
CONFIG_MXC_KPD_ROWMAX The row size of the key mapping matrixSigned-off-by: Ye Li
-
There are two problems in EHCI driver for mx7, and cause the OTG ID detection
failed to work.1. The offset for phy_status register in usbnc_regs is not correct.
2. We should clear the USBNC_PHYCFG2_ACAENB bit to enable the OTG ID detection,
not set it. When the bit is set, the ACA Resistance Detection is enabled,
which disables the OTG ID detection, because the internal pull up is off.Signed-off-by: Ye Li
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Change CONFIG_MXC_RDC to CONFIG_IMX_RDC.
Do misc update in board header file to support RDC for M4 usage.
Fix rdc interface imx_rdc_check_permission change in mxc_gpio.Signed-off-by: Peng Fan
Signed-off-by: Ye Li -
On i.MX6SX, 6UL and 7D, there are two enet controllers each has a
MDIO port. Some boards share the MDIO port for the two enets. So
introduce a configuration CONFIG_FEC_MXC_MDIO_BASE to indicate
the MDIO port for sharing.Without defining this configuration, the enet will uses own MDIO port.
Signed-off-by: Ye Li
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Add gis module, current gis is support vadc input.
Add power down function to lcdif driver.Signed-off-by: Sandor Yu
Signed-off-by: Ye.Li
(cherry picked from commit a007b00dd8ef9f773dfdebef0b1deb0990281793)
(cherry picked from commit a31dcdafb0963381e7213c59f79a340ef27ec2e2) -
Add pxp module.
Support csc between YUV444 and RGB888 and scaling.Signed-off-by: Sandor Yu
Signed-off-by: Ye.Li
(cherry picked from commit 4c6e1f9ed1b2f5c98a34502b44b6414593fdd290)
Signed-off-by: Peng Fan
(cherry picked from commit 92295fafcdbaa3a3fe0a63ede15f896dfc9ce0b0) -
Add csi module.
Signed-off-by: Sandor Yu
Signed-off-by: Ye.Li
(cherry picked from commit 854ae26758ec8132ef749b98645dd2f43b84e5e2)
Signed-off-by: Peng Fan
(cherry picked from commit 5f133bd9420109951fd03bd5168801327e929c3b) -
Add vadc module.
Both PAL and NTSC mode can work.Signed-off-by: Sandor Yu
Signed-off-by: Ye.Li
(cherry picked from commit 03c31ae30c1e81c99f6824221e4801433445e04a)
Signed-off-by: Peng Fan
(cherry picked from commit b5d776ffc1519c16091736445b3217ffb7fcd7db) -
The string display on second line repeats the last word of
first line and does not show full.
This is the bug introduced by the fixing to MLK-10542.Signed-off-by: Ye.Li
(cherry picked from commit ac430cee8c42f0acad9e126631d772b99f1166ea)
(cherry picked from commit ff62c5b275a9b5e47d570d3eb10622799bf12070)
(cherry picked from commit bd265a064c8f797e542955352d170e7f20f7b0d1) -
The caculation of left space for version string is not correct, should
use VIDEO_COLS not VIDEO_LINE_LEN / 2, otherwise we will get larger space
than actual have and cause string to overlay logo picture.Also current version string display only supports two lines words at max.
This also causes overlay when the LCD pixel colume size is not enough.Signed-off-by: Ye.Li
(cherry picked from commit ed53487d36a886fb4557088804a4b5232b168889)
(cherry picked from commit 253936bb920c5bb8e7d26e0425d155fb2576ab77) -
Add a new interface "mxs_lcd_panel_setup" to setup fb parameters and
specifies the LCDIF controller for multiple controllers of iMX6SX.
Pass fb parameters via "videomode" env remains work if the new interface
is not called before video initialization.Modify LCDIF clock interface "mxs_set_lcdclk" to support multiple
LCDIF controllers on iMX6SX.Signed-off-by: Ye.Li
Signed-off-by: Peng Fan
(cherry picked from commit d7f49b9378547c3a57b96bcdb907fc44616beb3d) -
Support EPDC.
E-Ink feature is supported by i.MX6DL/SL and i.MX7D.
For now this driver only supports i.MX6DL/SL, because the
i.MX7D EPDC driver needs pxp support which is not included
in U-Boot.Support user defined logo file, if there is no logo file, it will
draw a black border around a white screen.If need to enable EPDC, a waveform file is required to let all
work.Since we need LCD_MONOCHROME mode for EPDC, we introduce LCD_MONOCHROME
support.Please refer to Linux Reference Manual for how to flash WAVEFORM file.
Signed-off-by: Peng Fan
Signed-off-by: Robby Cai
Signed-off-by: Nitin Garg
Signed-off-by: Ye.Li -
By Coverity check, the clk_set_rate function dereferences the clk pointer
without checking whether it is NULL. This may cause problem when clk is NULL.
Fix the problem by adding NULL check.Signed-off-by: Ye.Li
(cherry picked from commit ded2f2958d568411274eeecd265fcc1181638335) -
This patch adds enable/disable hooks support for ldb_di[0/1] clocks
and enables/disables them when necessary.Signed-off-by: Liu Ying
(cherry picked from commit 615d4c51679a6c2ee0ed4c5e3922eec76646eef1) -
The LDB is found in MX6 variants and MX53, so this patch makes the ldb_di clock
relevant code be built only for them.Signed-off-by: Liu Ying
(cherry picked from commit 3e40c7466ae7d1d6ca74011bfe69ae059d412a3b) -
-Change HDMI video mode to VGA.
-Add pixel clock fraction part setting in IPU driver,
fix video mode timing issue.
-Add overflow state clear workaround,
fix kernel hang in HDMI driver issue.
-Correct IPU clock to 264MHz.Signed-off-by: Sandor Yu
Signed-off-by: Nitin Garg
Signed-off-by: Peng Fan
Signed-off-by: Ye Li
(cherry picked from commit 5028519b434d5dfbe53c48ac4b115ff8b69bbac7) -
The list_first_entry always assumes the list is not empty, it won't return NULL pointer when
the list is empty. So the "if (pdesc == NULL)" becomes a dead code. Fix the issue by calling
the list_empty before the list_first_entry.(Coverity CID 29934)
Signed-off-by: Ye.Li
-
The cod change updated the NAND driver BCH ECC layout algorithm to
support large oob size NAND chips(oob > 1024 bytes).Current implementation requires each chunk size larger than oob size so
the bad block marker (BBM) can be guaranteed located in data chunk. The
ECC layout always using the unbalanced layout(Ecc for both meta and
Data0 chunk), but for the NAND chips with oob larger than 1k, the driver
cannot support because BCH doesn’t support GF 15 for 2K chunk.The change keeps the data chunk no larger than 1k and adjust the ECC
strength or ECC layout to locate the BBM in data chunk. General idea for
large oob NAND chips is1.Try all ECC strength from the minimum value required by NAND spec to
the maximum one that works, any ECC makes the BBM locate in data chunk
can be chosen.2.If none of them works, using separate ECC for meta, which will add one
extra ecc with the same ECC strength as other data chunks. This extra
ECC can guarantee BBM located in data chunk, of course, we need to check
if oob can afford it.Signed-off-by: Han Xu
-
For GPIO group which shared by multiple masters, it may set in RDC
to shared and semaphore required. Before access the GPIO register,
the GPIO driver must get the RDC semaphore, and release the semaphore
after the GPIO register access.When CONFIG_MXC_RDC is set, the features related to RDC semaphores
is enabled in mxc_gpio driver.Signed-off-by: Ye.Li
(cherry picked from commit 84d63e2e2ce12f714e88baad8b2325684614a7c1)
Signed-off-by: Peng FanConflicts:
drivers/gpio/mxc_gpio.c(cherry picked from commit c9943b9c8a78bb2c9886bfe582e82978387d8dee)
Signed-off-by: Peng Fan
(cherry picked from commit faf94726cac8316c4342e19936f1e03ef283ace3) -
Switch to use 2015.04 qspi driver.
Change header file to adapt to the driver.
To i.mx6sx, move config to header file.Tested read/write/erase on 6ulevk/sxai/sxsdb.
Signed-off-by: Peng Fan
-
Set wdog WCR register SRS bit to turn off internal reset signal WDOG_RESET_B_DEB
for mx7d. So that the warm reset is disabled.Signed-off-by: Ye.Li
-
The USDHC move the 4 clock bits CARD_CLK_SOFT_EN, IPG_PERCLK_SOFT_EN,
HCLK_SOFT_EN, and IPG_CLK_SOFT_EN from sysctl register to vendorspec
register. The community driver uses RSTA to replace the clock gate off
operation. But this is not a good solution. This is because:
1. when using RSTA, we should wait this bit to clear by itself. This is not
implemeneted in the codes.
2. After RSTA is set, it is recommended that the Host Driver reset the
external card and reinitialize it.So in this patch, we change to use the vendorspec registers for these bits
operation.Signed-off-by: Ye Li
-
Introudce wp_enable. If want to check WPSPL, then in board code,
need to set wp_enable to 1.Take i.MX6UL for example, to some boards, they do not use WP singal,
so they does not configure USDHC1_WP_SELECT_INPUT, and its default
value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and
SION bit set. So USDHC controller can always get wp signal and WPSPL
shows write protect and blocks driver continuing. This is not what
we want to see, so add wp_enable, and if set to 0, just omit the
WPSPL checking and this does not effect normal working of usdhc
controller.Suggested-by: Ye.Li
Signed-off-by: Peng Fan
(cherry picked from commit 327dad065f6f9a2b29bd646efc7a08a4c01a4ad3) -
Clear DLL_CTRL delay line settings at USDHC initialization to eliminate the
pre-settings from boot rom. U-boot should re-init the USDHC not reply on the
value set by boot from.On MX6DL, the ROM has set the default delay line(DLLCTRL) to 0x1000021,
when eMMC works on DDR mode in kernel, it will possibly cause data CRC errors.
Even u-boot always use eMMC in SDR mode, for safety sake, it is better to clear it too.Signed-off-by: Ye.Li
(cherry picked from commit f355f117a6d735b0c3cba79f1cb24829cf8cae25) -
When booting in eMMC fast boot, the uboot v2013.04 always hangs.
The root cause is that MMC host does not exit from boot mode after
bootrom loading image. So the first command 'CMD0' sent
in uboot will pull down the CMD line to low and cause errors.This patch cleans the MMC boot register in "mmc_init" to put the
MMC host back to normal mode.Signed-off-by: Ye Li
Signed-off-by: Nitin Garg
Signed-off-by: Peng Fan
(cherry picked from commit cf77f982b9969eda4cb5af2a78d3d40e17290756) -
From temp sensor guys:
"
I confirmed the math with him(had do the accuracy study) today.
The new, final equation is:Tmeas = (Nmeas - n1) / slope + t1 + offset
n1= fused room count
t1= 25
offset=3.580661
slope= 0.4148468 – 0.0015423*n1
"87723f903454aaf17336e0fe9098ea7911c19f3c update the thermal with not
accurate slope parameters. This patch fix it.Signed-off-by: Peng Fan
(cherry picked from commit 0d4904f5929cecd66f0b60cf8ebdcb0e6a2f733e) -
From IC guys:
"
After a thorough accuracy study of the Temp sense circuit,
we found that with our current equation, an average part can
read 7 degrees lower than a known forced temperature.
We also found out that the standard variance was around 2C;
which is the tightest distribution that we could create.
We need to change the temp sense equation to center the average
part around the target temperature.Old Equation:
Temp = Troom,cal – slope*(Count measured – Count room fuse)
Where
Troom,cal = 25C and
Slope = 0.4297157 – (0.0015974 * Count room fuse)New Equation:
Temp = Troom,cal – slope*(Count measured – Count room fuse) +offset
Where
Troom,cal = 25C and
Slope = 0.4445388 – (0.0016549 * Count room fuse)
Offset = 3.580661
"According the new equation, update the thermal driver.
c1 and c2 changed to u64 type and update comments.Signed-off-by: Peng Fan
(cherry picked from commit 87723f903454aaf17336e0fe9098ea7911c19f3c)
12 Mar, 2016
1 commit
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The stm_is_locked_sr() function is picked from Linux kernel. For reason
unknown, the 64bit data types used by the function and present in Linux
were replaced with 32bit unsigned ones, which causes trouble.The testcase performed was done using ST M25P80 chip.
The command used was:
=> sf protect unlock 0 0x10000The call chain starts in stm_unlock(), which calls stm_is_locked_sr()
with negative ofs argument. This works fine in Linux, where the "ofs"
is loff_t, which is signed long long, while this fails in U-Boot, where
"ofs" is u32 (unsigned int). Because of this signedness problem, the
expression past the return statement to be incorrectly evaluated to 1,
which in turn propagates back to stm_unlock() and results in -EINVAL.The correction is very simple, just use the correctly sized data types
with correct signedness in the function to make it work as intended.Signed-off-by: Marek Vasut
Cc: Simon Glass
Reviewed-by: Jagan Teki
