18 Dec, 2011
1 commit
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From: Sonny Rao
These functions are useful in U-Boot because they allow a graceful failure
rather than an unpredictable stack overflow when printf() buffers are
exceeded.Mostly copied from the Linux kernel. I copied vscnprintf and
scnprintf so we can change printf and vprintf to use the safe
implementation but still return the correct values.(Simon Glass modified this commit a little)
Signed-off-by: Sonny Rao
17 Dec, 2011
1 commit
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Add documentation for CONFIG_USB_ULPI and CONFIG_USB_ULPI_VIEWPORT
configuration options.Signed-off-by: Igor Grinberg
09 Dec, 2011
2 commits
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This patch adds support for console output before the console is inited.
The main purpose of this is to deal with a very early panic() which would
otherwise cause a silent hang.A new board_pre_console_putc() function is added to the board API. If
provided by the board it will be called in the event of console output
before the console is ready. This function should turn on all UARTs and
spray the character out if it possibly can.The feature is controlled by a new CONFIG_PRE_CONSOLE_PUTC option.
Signed-off-by: Simon Glass
Acked-by: Graeme Russ -
The BAB7xx boards are almost deceased. They cause build warnings, an
it's not worth the effort to fix these. Remove the dead body.Signed-off-by: Wolfgang Denk
Cc: Frank Gottschling
07 Dec, 2011
1 commit
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TPM (Trusted Platform Module) is an integrated circuit and
software platform that provides computer manufacturers with the
core components of a subsystem used to assure authenticity,
integrity and confidentiality.This driver supports version 1.2 of the TCG (Trusted Computing
Group) specifications.The TCG specification defines several so called localities in a
TPM chip, to be controlled by different software layers. When
used on a typical x86 platform during the firmware phase, only
locality 0 can be accessed by the CPU, so this driver even while
supporting the locality concept presumes that only locality zero
is used.This implementation is loosely based on the article "Writing a
TPM Device Driver" published on http://ptgmedia.pearsoncmg.comCompiling this driver with DEBUG defined will generate trace of
all accesses to TMP registers.This driver has been tested and is being used in three different
functional ChromeOS machines (Pinetrail and Sandy Bridge Intel
chipsets) all using the same Infineon SLB 9635 TT 1.2 device.A u-boot cli command allowing access to the TPM was also
implemented and is being submitted as a second patch.Change-Id: I22a33c3e5b2e20eec9557a7621bd463b30389d73
Signed-off-by: Vadim Bendebury
CC: Wolfgang Denk
29 Nov, 2011
1 commit
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Several macros are used to identify and locate the microcode binary image
that U-boot needs to upload to the QE or Fman. Both the QE and the Fman
use the QE Firmware binary format to package their respective microcode data,
which is why the same macros are used for both. A given SOC will only have
a QE or an Fman, so this is safe.Unfortunately, the current macro definition and usage has inconsistencies.
For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman
firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address
of NAND. There's no way to know by looking at a variable how it's supposed
to be used.In the future, the code which uploads QE firmware and Fman firmware will
be merged.Signed-off-by: Timur Tabi
Signed-off-by: Kumar Gala
16 Nov, 2011
1 commit
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since commits:
davinci: emac: add support for more than 1 PHYs
062fe7d332c28ede25626f448681e43d76bb312edavinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM
fb1d6332b5430b90a8fa8ebab709f33a60e9f816I get following warning on the enbw_cmc board:
Err: serial
Net: 5 ETH PHY detected
miiphy_register: non unique device name 'KSZ8873 @ 0x01'
DaVinci-EMAC
Hit any key to stop autoboot: 0Also I see some debug printfs:
=> run load
+ emac_close
+ emac_ch_teardown
- emac_ch_teardown
+ emac_ch_teardown
- emac_ch_teardown
- emac_close
+ emac_open
- emac_open
Using DaVinci-EMAC devicereason is 062fe7d332c28ede25626f448681e43d76bb312e new define MAX_PHY.
This is set to 3! I get on this board 5 active phys, so
this leads in wrong memory writes ...so I changed:
- define CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT to set
the MAX_PHY value, add a description in README
for the new CONFIG_SYS option.
- print an error message if more then MAX_PHYs are
detected.
- fill the active_phy_addr array in a for loop with
0xff
- changed printf() in debug_emac()Signed-off-by: Heiko Schocher
Cc: Sandeep Paulraj
Cc: Albert ARIBAUD
Cc: Wolfgang Denk
Cc: Manjunath Hadli
Cc: Prabhakar Lad
Cc: Mike Frysinger
Cc: Tom Rini
Signed-off-by: Sandeep Paulraj
05 Nov, 2011
1 commit
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CONFIG_MXC_SPI currently works on MX31/35/51 boards, so update the README file.
Signed-off-by: Fabio Estevam
04 Nov, 2011
2 commits
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similiar to commit dc7cd8e59ba077f3b4c1a4557c9cd86a31b9ab1f, only
adapted for the new spl framework.Signed-off-by: Heiko Schocher
Acked-by: Tom Rini
Acked-by: Scott Wood
Cc: Albert ARIBAUD
Cc: Sandeep Paulraj
Signed-off-by: Sandeep Paulraj -
Rename mc13783-rtc so that it can be used for both MC13783 and MC13892 PMICs.
efikamx board, for example, does use a MC13892 PMIC, but the RTC selection is currently made as:
#define CONFIG_RTC_MC13783
,which is not very obvious.
Let the MC13783 and MC13892 RTC be selected by:
#define CONFIG_RTC_MC13XXX
Signed-off-by: Fabio Estevam
Acked-by: Stefano Babic
28 Oct, 2011
4 commits
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As a part of the manufacturing process for some of our custom hardware,
we are programming the EEPROMs attached to our Intel 82571EB controllers
from software using U-Boot and Linux.This code provides several conditionally-compiled features to assist in
our manufacturing process:CONFIG_CMD_E1000:
This is a basic "e1000" command which allows querying the controller
and (if other config options are set) performing EEPROM programming.
In particular, with CONFIG_E1000_SPI this allows you to display a
hex-dump of the EEPROM, copy to/from main memory, and verify/update
the software checksum.CONFIG_E1000_SPI_GENERIC:
Build a generic SPI driver providing the standard U-Boot SPI driver
interface. This allows commands such as "sspi" to access the bus
attached to the E1000 controller. Additionally, some E1000 chipsets
can support user data in a reserved space in the E1000 EEPROM which
could be used for U-Boot environment storage.CONFIG_E1000_SPI:
The core SPI access code used by the above interfaces.For example, the following commands allow you to program the EEPROM from
a USB device (assumes CONFIG_E1000_SPI and CONFIG_CMD_E1000 are enabled):
usb start
fatload usb 0 $loadaddr 82571EB_No_Mgmt_Discrete-LOM.bin
e1000 0 spi program $loadaddr 0 1024
e1000 0 spi checksum updatePlease keep in mind that the Intel-provided .eep files are organized as
16-bit words. When converting them to binary form for programming you
must byteswap each 16-bit word so that it is in little-endian form.This means that when reading and writing words to the SPI EEPROM, the
bit ordering for each word looks like this on the wire:Time >>>
------------------------------------------------------------------
... [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8], ...
------------------------------------------------------------------
(MSB is 15, LSB is 0).Signed-off-by: Kyle Moffett
Cc: Ben Warren -
This renames BOARD_LATE_INIT to CONFIG_BOARD_LATE_INIT.
Along the way it removes some leftover#define BOARD_LATE_INIT 1
and adds some basic documentation for board specific
callbacks in README.Signed-off-by: Helmut Raiger
Acked-by: Stefano Babic -
Add documentation for CONFIG_GATEWAYIP and CONFIG_NETMASK;
also add information which environment variables are set.Signed-off-by: Wolfgang Denk
Acked-by: Simon Glass -
Signed-off-by: Wolfgang Denk
27 Oct, 2011
6 commits
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In some cases, saving data in RAM as a file with FAT format is required.
This patch allows the file to be written in FAT formatted partition.The usage is similar with reading a file.
First, fat_register_device function is called before file_fat_write function
in order to set target partition.
Then, file_fat_write function is invoked with desired file name,
start ram address for writing data, and file size.Signed-off-by: Donggeun Kim
Signed-off-by: Kyungmin Park -
This adds support for a new environment variable called 'fdtcontroladdr'. If
defined, the hex address is used as the address of the control fdt for U-Boot.Note: I have not changed CONFIG_PRAM section as I already have an
outstanding patch on that.Signed-off-by: Simon Glass
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This adds support for an FDT to be build as a separate binary file called
u-boot.dtb. This can be concatenated with the U-Boot binary to provide a
device tree located at run-time by U-Boot. The Makefile is modified to
provide this file in u-boot-dtb.bin.Signed-off-by: Simon Glass
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This new option allows U-Boot to embed a binary device tree into its image
to allow run-time control of peripherals. This device tree is for U-Boot's
own use and is not necessarily the same one as is passed to the kernel.The device tree compiler output should be placed in the $(obj)
rooted tree. Since $(OBJCOPY) insists on adding the path to the
generated symbol names, to ensure consistency it should be
invoked from the directory where the .dtb file is located and
given the input file name without the path.This commit contains my entry for the ugliest Makefile / shell interaction
competition.Signed-off-by: Simon Glass
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This adds a device tree pointer to the global data. It can be set by
board code. A later commit will add support for making a device
tree binary blob available to U-Boot for run-time configuration.Signed-off-by: Simon Glass
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This adds logic to tftp.c to implement the tftp 'put' command, and
updates the README.Signed-off-by: Simon Glass
22 Oct, 2011
1 commit
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Documents and READMEs for NDS32 architecture.
It patch also provides usage of SoC AG101 and board ADP-AG101.Signed-off-by: Macpaul Lin
18 Oct, 2011
1 commit
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With these documented, we can start pushing towards standardizing their
use across boards.Signed-off-by: Jason Hobbs
Cc: Mike Frysinger
13 Oct, 2011
1 commit
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* 'master' of git://git.denx.de/u-boot-mips:
MIPS: Jz4740: Add qi_lb60 board support
MIPS: Jz4740: Add NAND driver
MIPS: Ingenic XBurst Jz4740 processor support
10 Oct, 2011
5 commits
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Jz4740 is a multimedia application processor targeting for mobile
devices like e-Dictionary, eBook, portable media player (PMP) and
GPS navigator. Jz4740 is powered by Ingenic 360 MHz XBurst CPU core
(JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture
provides high integration, high performance and low power consumption.JzRISC incorporated in Jz4740 is the advanced and power-efficient
32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K
D-Cache, and can operate at speeds up to 400 MHz.On-chip modules such as LCD controller, embedded audio codec, multi-
channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich
suite of peripherals for multimedia application. NAND controller
(SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are
also available.For more info about Ingenic XBurst Jz4740:
http://en.ingenic.cn/eng/
http://www.linux-mips.org/wiki/IngenicThis patch introduces XBurst CPU support in U-Boot. It's compatible
with MIPS32, but requires a bit different cache maintenance, timer
routines, and boot mechanism using USB boot tool, so XBurst support
can go into a separate new home, cpu/xburst/.Signed-off-by: Xiangfu Liu
Acked-by: Daniel
Signed-off-by: Shinya Kuribayashi -
Interactive DDR debugging provides a user interface to view and modify SPD,
DIMM parameters, board options and DDR controller registers before DDR is
initialized. With this feature, developers can fine-tune DDR for board
bringup and other debugging without frequently having to reprogram the flash.To enable this feature, define CONFIG_FSL_DDR_INTERACTIVE in board header
file and set an environment variable to activate it. Syntax:setenv ddr_interactive on
After reset, U-boot prompts before initializing DDR controllers
FSL DDR>The available commands are
print print SPD and intermediate computed data
reset reboot machine
recompute reload SPD and options to default and recompute regs
edit modify spd, parameter, or option
compute recompute registers from current next_step to end
next_step shows current next_step
help this message
go program the memory controller and continue with u-bootThe first command should be "compute", which reads data from DIMM SPDs and
board options, performs the calculation then stops before setting DDR
controller. A user can use "print" and "edit" commands to view and modify
anything. "Go" picks up from current step with any modification and
compltes the calculation then enables the DDR controller to continue u-boot.
"Recompute" does it over from fresh reading.Signed-off-by: York Sun
Signed-off-by: Kumar Gala -
The 'time' command runs and reports execution time of commands.
Sample usage:
--------------------
u-boot# time crc 0x1000 1000
CRC32 for 00001000 ... 00001fff ==> ae94dc4btime: 0.004 seconds, 4 ticks
--------------------Signed-off-by: Che-Liang Chiou
Acked-by: Mike Frysinger -
Reported-by: Michael Jones
Signed-off-by: Wolfgang Denk -
Some previous changes added code right in the middle of the
description of CONFIG_SHOW_BOOT_PROGRESS. Move this text down.
Fix formatting while we are at it.Signed-off-by: Wolfgang Denk
06 Oct, 2011
2 commits
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This is long over due. All but two net drivers have been converted, but
those have now been dropped.The only thing left to do is actually delete all references to NET_MULTI
and code that is compiled when that is not defined. So here we scrub the
core code.Signed-off-by: Mike Frysinger
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Allow redirection of console output prior to console initialisation to a
temporary buffer.To enable this functionality, the board (or arch) must define:
- CONFIG_PRE_CONSOLE_BUFFER - Enable pre-console buffer
- CONFIG_PRE_CON_BUF_ADDR - Base address of pre-console buffer
- CONFIG_PRE_CON_BUF_SZ - Size of pre-console buffer (in bytes)The pre-console buffer will buffer the last CONFIG_PRE_CON_BUF_SZ bytes
Any earlier characters are silently dropped.
30 Sep, 2011
1 commit
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Introduce the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW
macros, which contain the high and low portions of CONFIG_SYS_CCSRBAR_PHYS.
This is necessary for the assembly-language code that relocates CCSR, since
the assembler does not understand 64-bit constants.CONFIG_SYS_CCSRBAR_PHYS is automatically defined from the
CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW macros, so it
should not be defined in a board header file. Similarly,
CONFIG_SYS_CCSRBAR_DEFAULT is defined for each SOC in config_mpc85xx.h, so
it should also not be defined in the board header file.CONFIG_SYS_CCSR_DO_NOT_RELOCATE is a "short-cut" macro that guarantees that
CONFIG_SYS_CCSRBAR_PHYS is set to the same value as CONFIG_SYS_CCSRBAR_DEFAULT,
and so CCSR will not be relocated.Since CONFIG_SYS_CCSRBAR_DEFAULT is locked to a fixed value, multi-stage U-Boot
builds (e.g. NAND) are required to relocate CCSR only during the last stage
(i.e. the "real" U-Boot). All other stages should define
CONFIG_SYS_CCSR_DO_NOT_RELOCATE to ensure that CCSR is not relocated.README is updated with descriptions of all the CONFIG_SYS_CCSRBAR_xxx macros.
Signed-off-by: Timur Tabi
Signed-off-by: Kumar Gala
12 Sep, 2011
1 commit
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Signed-off-by: Wolfgang Denk
03 Aug, 2011
1 commit
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Signed-off-by: Andreas Bießmann
31 Jul, 2011
1 commit
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Amend section 'Directory Hierarchy' for current MIPS directory.
Describe config options for MIPS.Signed-off-by: Daniel Schwierzeck
Acked-by: Thomas Langer
Signed-off-by: Shinya Kuribayashi
30 Jul, 2011
1 commit
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Signed-off-by: Wolfgang Denk
28 Jul, 2011
1 commit
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Signed-off-by: Michael Jones
Acked-by: Detlev Zundel
26 Jul, 2011
3 commits
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For people who want to manually extract the embedded environment so that
it can be manually packed into the final u-boot image, add a config opt
to force building of the envcrc tool.Signed-off-by: Mike Frysinger
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replace all occurences of CONFIG_PRELOADER with CONFIG_SPL_BUILD
Signed-off-by: Aneesh V
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Signed-off-by: Aneesh V
Signed-off-by: Daniel Schwierzeck
20 Jul, 2011
1 commit
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* 'master' of git://git.denx.de/u-boot-mmc:
mmc: rescan fails on empty slot
AT91:mmc:fix multiple read/write error
mmc: Access mode validation for eMMC cards > 2 GiB
mmc: sh_mmcif: add support for Renesas MMCIF
mmc: fix the condition for MMC version 4
MMC: add marvell sdhci driver
MMC: add sdhci generic framework
MMC: add erase function to both mmc and sd
MMC: unify mmc read and write operation
mmc: Tegra2: Enable SD/MMC driver for Seaboard and Harmony
mmc: Tegra2: SD/MMC driver for Seaboard - eMMC on SDMMC4, SDIO on SDMMC3