15 Nov, 2016
1 commit
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Zynq 7000S (Single A9 core) devices is using different ID code.
This patch adds this new codes and assign them.Signed-off-by: Michal Simek
21 Jan, 2015
2 commits
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Added support for zc7035
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek -
Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not addedSigned-off-by: Michal Simek
13 May, 2014
2 commits
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Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.Signed-off-by: Michal Simek
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No functional changes.
Signed-off-by: Michal Simek
06 Feb, 2014
1 commit
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Just extend tables with this new device.
Signed-off-by: Michal Simek
12 Aug, 2013
1 commit
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- Add support for zc7100 device.
- FPGA programming on few of the SOC(zc7100) takes more
than 1sec, hence increased the program time by 4sec to
sync' all soc's.Signed-off-by: Jagannadha Sutradharudu Teki
Signed-off-by: Michal Simek
24 Jul, 2013
1 commit
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Signed-off-by: Wolfgang Denk
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini
06 May, 2013
2 commits
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Ensure that wrong bitstream won't be loaded
to current device.Signed-off-by: Michal Simek
Reviewed-by: Tom Rini -
Devcfg device requires to load bitstream in binary format.
But u-boot also has an option for loading bitstream in bit
format. Let's handle both cases by zynqpl driver.
Also add suport for loading partial bitstreams.The first driver version was done by:
Joe HershbergerSigned-off-by: Michal Simek
Reviewed-by: Tom Rini