07 Feb, 2008
1 commit
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Signed-off-by: Larry Johnson
16 Jan, 2008
1 commit
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The ECC POST reported intermittent failures running after power-up on
the Korat PPC440EPx board. Even when the test passed, the debugging
output occasionally reported additional unexpected ECC errors.This refactoring has three main objectives: (1) minimize the code
executed with ECC enabled during the tests, (2) add more checking of the
results so any unexpected ECC errors would cause the test to fail, and
(3) use synchronization (only) where required by the processor.Signed-off-by: Larry Johnson
14 Jan, 2008
1 commit
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post/cpu/ppc4xx/spr.c contained a few checks for registers only present
for PPC440 and derivates processor.Signed-off-by: Niklaus Giger
09 Jan, 2008
1 commit
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On LWMON5 we now use d-cache as init-ram and stack. The SPR POST test uses
self modifying code and this doesn't work with stack in d-cache, since
I can't move the code from d-cache to i-cache. We move the SPR test to
be executed a little later, after relocation. Then stack is located in
SDRAM and this self-modifying code is no problem anymore.Signed-off-by: Stefan Roese
28 Dec, 2007
7 commits
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Signed-off-by: Larry Johnson
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Signed-off-by: Stefan Roese
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As repoted by Larry Johnson, running "diag run cache" caused a crash
in U-Boot. This problem was introduced by a patch that removed the
TLB entry for the cache test after the test has completed. Since this
TLB was only setup once, a 2nd attempt to run this cache test
failed with a crash. Now this TLB entry is created every time the
routine is called.Signed-off-by: Stefan Roese
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Now that the 440EPx ECC test is not board specific anymore
remove this Makefile.Signed-off-by: Stefan Roese
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This patch allows the ECC POST to be used for different boards with the
PPC440 Denali SDRAM controller. Modifications include skipping the test
if ECC is not enabled (as for non-ECC DIMMs) and adding synchronization
to prevent timing errors.Signed-off-by: Larry Johnson
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Signed-off-by: Larry Johnson
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Signed-off-by: Matthias Fuchs
01 Nov, 2007
7 commits
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Now with caches enabled (i- and d-cache) on 44x, we need a chance to
disable the cache for the CPU POST tests, since these tests consist
of self modifying code. This is done via the new change_tlb() function.Signed-off-by: Stefan Roese
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This patch enables the 4xx EMAC POST driver to work too, when dcache is
enabled.Signed-off-by: Stefan Roese
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Signed-off-by: Stefan Roese
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Signed-off-by: Stefan Roese
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Signed-off-by: Stefan Roese
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The POST ethernet test needed to be changed to dynamically determine
the count of ethernet devices. This code is cloned from the 4xx
ethernet driver.Signed-off-by: Stefan Roese
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Signed-off-by: Stefan Roese
25 Aug, 2007
1 commit
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As experienced on lwmon5, on some boards the POST memory test can
corrupt the global data buffer (bd). This patch fixes this issue
by checking and limiting this area.Signed-off-by: Yuri Tikhonov
Signed-off-by: Stefan Roese
14 Aug, 2007
4 commits
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Signed-off-by: Stefan Roese
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When CFG_POST_ETHER_EXT_LOOPBACK is defined, the ethernet POST
is not done using an internal loopback connection, but by assuming
that an external loopback connector is plugged into the board.Signed-off-by: Stefan Roese
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Signed-off-by: Stefan Roese
10 Aug, 2007
1 commit
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The patch adds support for UART POST on ppc44x-based boards with no
external serial clocks installed.Signed-off-by: Yuri Tikhonov
Acked-by: Stefan Roese
31 Jul, 2007
1 commit
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- Clear ECC status regs after ECC POST test
- Set dcbz for ECC generation with caches enabled as default
- Code cleanupSigned-off-by: Stefan Roese
20 Jul, 2007
1 commit
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This patch adds ECC Post test for the Lwmon5 board based
on PPC440EPx to U-Boot.Signed-off-by: Pavel Kolesnikov
Acked-by: Yuri Tikhonov
Acked-by: Stefan Roese
13 Jul, 2007
1 commit
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Signed-off-by: Heiko Schocher
10 Jul, 2007
1 commit
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Signed-off-by: Wolfgang Denk
05 Jul, 2007
1 commit
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Signed-off-by: Sergei Poselenov
23 Jun, 2007
1 commit
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Added memory, CPU, UART, I2C and SPR POST tests for PPC440.
Signed-off-by: Igor Lisitsin
--
19 Mar, 2007
1 commit
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Signed-off-by: Wolfgang Denk
07 Mar, 2007
1 commit
09 Oct, 2006
1 commit
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Based on patch by Mike Frysinger, 20 Jun 2006
02 Sep, 2006
1 commit
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Modifications are based on the linux kernel approach and
support two use cases:1) Add O= to the make command line
'make O=/tmp/build all'2) Set environement variable BUILD_DIR to point to the desired location
'export BUILD_DIR=/tmp/build'
'make'The second approach can also be used with a MAKEALL script
'export BUILD_DIR=/tmp/build'
'./MAKEALL'Command line 'O=' setting overrides BUILD_DIR environent variable.
When none of the above methods is used the local build is performed and
the object files are placed in the source directory.
01 Apr, 2006
1 commit
13 Oct, 2005
1 commit
28 Jul, 2005
1 commit
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This fixes a problem of displaying bogus voltages when the voltages
are so low that the I2C devices start failing while the rest of the
system keeps running.
06 Jun, 2005
1 commit
09 Sep, 2004
1 commit
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Update etags build target
* Improve NetConsole support: add support for broadcast destination
address and buffered input.* Cleanup compiler warnings for GCC 3.3.x and later
* Fix problem in cmd_jffs2.c introduced by CFG_JFFS_SINGLE_PART patch
02 Aug, 2004
1 commit
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* Patch by Sascha Hauer, 28 Jun:
- add generic support for Motorola i.MX architecture
- add support for mx1ads, mx1fs2 and scb9328 boards* Patches by Marc Leeman, 23 Jul 2004:
- Add define for the PCI/Memory Buffer Configuration Register
- corrected comments in cpu/mpc824x/cpu_init.c* Add support for multiple serial interfaces
(for example to allow modem dial-in / dial-out)