22 Feb, 2014
5 commits
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This function has been around for powerpc. It is used for systems with
memory more than CONFIG_MAX_MEM_MAPPED. In case of non-contiguous memory,
this feature can limit U-boot to one block without going over the limit.Signed-off-by: York Sun
Acked-by: Albert ARIBAUD -
Freescale LayerScape SoCs support controller interleaving on 256 byte size.
This interleaving is mandoratory.Signed-off-by: York Sun
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DDR base address has been the same from the view of core and DDR
controllers. This has changed for Freescale ARM-based SoCs. Controllers
setup DDR memory in a contiguous space and cores view it at separated
locations.Signed-off-by: York Sun
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Initially it was believed the DDR controller on Freescale ARM would have
big endian. But some platform will have little endian.Signed-off-by: York Sun
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do_bootm_standanlone() calls ntohl(images->ep) which is wrong because
endianess conversion has already been done:do_bootm()
\-do_bootm_states()
+-bootm_find_os()
| \-images.ep = image_get_ep();
| \-uimage_to_cpu(hdr->ih_ep);
\-boot_selected_os()
\-do_bootm_standanlone()Without this conversion the code works correctly at least on AT91SAM9G45.
On big endian systems there should be no difference after applying this
patch because uimage_to_cpu(x) and ntohl(x) both expand to 'x'.Signed-off-by: Christian Eggers
21 Feb, 2014
12 commits
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Use default_serial_puts() instead of duplicating the implementation.
Signed-off-by: Axel Lin
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We have an unused FAT implementation in fs/fdos, remove.
Signed-off-by: Tom Rini
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In case of little-endian ARC700 instructions (which may include target
address) are encoded as middle-endian. That's why it's required to swap
bytes after read and ten right before write back.But in case of big-endian ARC700 instructions are encoded as a plain
big-endian. Thus no need for byte swapping.Signed-off-by: Alexey Brodkin
Cc: Francois Bedard
Cc: Tom Rini
cc: Noam Camus -
Proper spelling of the boad marketing name is with upper case.
So changing it from lower case to upper case here.Cc: Tom Rini
Signed-off-by: Alexey Brodkin
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With accepted change to DW GMAC driver -
92a190aaab3536d695c51e0739f925910eb49889 (net/designware - switch driver
to phylib usage) we need to update this board because
"designware_initialize" now accepts only 2 parameters instead of 4.Cc: Vineet Gupta
Cc: Tom RiniSigned-off-by: Alexey Brodkin
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This is required for proper functionality on big-endian targets.
Memory-mapped registres of ARC UART are not 32-bit words but 8-bit bytes
so on little-endian target either acessor (_l or _b) works fine.
On big-endian only _b accessors works as expected.Signed-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Noam Camus
Cc: Tom Rini -
Explanation is in in-lined comment.
Signed-off-by: Alexey Brodkin
Cc: Vineet Gupta
Cc: Noam Camus
Cc: Tom Rini -
With d6a320d we moved some clock externs out of blackfin_local.h and
into clock.h but now need to include in more drivers to
avoid warnings.Cc: Sonic Zhang
Signed-off-by: Tom Rini -
The commit:
"EXT4: Fix number base handling of "ext4write" command"
SHA1: f7740f7712b8638f08b83a7e5d00bc1d6bb086a9Cleaned up the ext4write command format.
This commit shall be regarded as a follow up, since the DFU subsystem is
using those commands for its normal operation.Signed-off-by: Lukasz Majewski
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Commit 5ab502cb gathered all device tree sources
to arch/$(ARCH)/dts/.
So tegra124-venice2.dts also must go to arch/arm/dts directory
to build venice2 board.(Commit 5ab502cb had been posted before venice2 board support
was merged. So an unvisible conflict happened.)Acked-by: Stephen Warren
Signed-off-by: Masahiro Yamada
Cc: Simon Glass
Cc: Tom Rini
20 Feb, 2014
23 commits
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Conflicts:
Makefile
drivers/net/npe/MakefileThese two conflicts arise from commit 0b2d3f20
("ARM: NET: Remove the IXP NPE ethernet driver") and are
resolved by deleting the drivers/net/npe/Makefile file
and removing the CONFIG_IXP4XX_NPE line from Makefile. -
This file was only required for compilation of designware_i2c driver.
Since explicit inclusion of "hardware.h" is now removed from the driver
we may safely remove this empty header as well.Signed-off-by: Alexey Brodkin
Cc: Tom Rini
Cc: Heiko Schocher
Cc: Stefan Roese
Cc: Vipin Kumar
Cc: Armando Visconti -
As soon as all boards have their CONFIG_SYS_I2C_BASE defined in
configuration files instead of "asm/arch/hardware.h" it's safe to remove
the inclusion in question and make driver platform-independent.Cc: Tom Rini
Cc: Heiko Schocher
Cc: Stefan Roese
Cc: Vipin Kumar
Cc: Armando ViscontiSigned-off-by: Alexey Brodkin
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Having CONFIG_SYS_I2C_BASE requires DW I2C driver to explicitly include
which other platforms may not have at all.It's always good to have a driver platform-independent.
Signed-off-by: Alexey Brodkin
Cc: Tom Rini
Cc: Heiko Schocher
Cc: Stefan Roese
Cc: Vipin Kumar
Cc: Armando Visconti -
Adds support for set-speed on the OMAP24xx I2C Adapter.
Changes to omap24_i2c_write(...) for polling ARDY Bit from IRQ-Status.
Otherwise on a subsequent call the transfer of last byte from the
predecessor is aborted and therefore lost. For exmaple when
i2c_write(...) is followed by a i2c_setspeed(...) (which has to
deactivate and activate master for changing psc,...).Minor cosmetical changes.
Signed-off-by: Hannes Petermaier
Cc: Heiko Schocher -
Make sure the I2C write queue is empty before leaving the mxs_i2c_write().
If we start and I2C write and only wait for ACK, the MXS I2C IP block may
enter next operation while still processing the write aftermath internally.
This will in turn disrupt one or more subsequent transfer(s).A testcase for this issue is as such. This testcase is also interesting because
the first I2C_WRITE which becomes disruptive happens in the 'i2c read' command.
The 'i2c read' command first uses I2C_WRITE to send I2C address of the chip and
then uses I2C_READ to read data from the chip. After this command completes, the
'i2c probe' will use sequence of I2C_WRITE commands to probe the I2C bus. The
problem is that the first I2C_WRITE disrupted the I2C IP block operation and
this sideeffect propagates all the way to this next I2C_WRITE used by the 'i2c
probe' call. The result is the 'i2c probe' receives an ACK on I2C address 0x00,
even if this ACK was owned by the previous I2C_WRITE operation. Note that the
'i2c read' command must read from a valid I2C chip address.Wrong:
> i2c probe
Valid chip addresses: 50 51
> i2c read 0x50 0x0.2 0x10 0x42000000
> i2c probe
Valid chip addresses: 00 50 51With this patch
> i2c probe
Valid chip addresses: 50 51
> i2c read 0x50 0x0.2 0x10 0x42000000
> i2c probe
Valid chip addresses: 50 51Signed-off-by: Marek Vasut
Cc: Heiko Schocher
Cc: Fabio Estevam -
Enhance the DesignWare I2C driver to support address length more
than 1 byte. This enhancement is required as some I2C slave
device such as EEPROM chip might have 16 bit address byte.Signed-off-by: Chin Liang See
Acked-by: Alexey Brodkin
Cc: Tom Rini
cc: Armando Visconti
Cc: Stefan Roese
Cc: Albert ARIBAUD
Cc: Heiko Schocher -
add support for bootcounter on an i2c device. And add a
README for all bootcounter options.Signed-off-by: Heiko Schocher
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The ADI twi peripheral is not binding to Blackfin processor only.
Access i2c registers by standard io functions.
Fix coding style.Signed-off-by: Scott Jiang
Signed-off-by: Sonic Zhang -
The ADI twi peripheral is not binding to Blackfin processor only.
Change to a generic name.Signed-off-by: Sonic Zhang
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Signed-off-by: Sonic Zhang
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Signed-off-by: Sonic Zhang
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Initialize the second i2c controller.
Signed-off-by: Michael Burr
Signed-off-by: Michal Simek -
Fixed bug with alen == 0 in 'i2c_write', 'i2c_read'
Further minor corrections:
- Write 'address' register before 'data' register.
- Write 'transfer_size' register before 'address' register.Signed-off-by: Michael Burr
Signed-off-by: Michal Simek -
Signed-off-by: Tom Rini
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In Kbuild, every makefile must have non-empty obj- or obj-y.
Otherwise, built-in.o will not be created and the link stage
will fail.Signed-off-by: Masahiro Yamada
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There is a strange comment in fit_image_load().
This function can be used for loading Kernel Image, FDT
as well as ramdisk.Signed-off-by: Masahiro Yamada
Cc: Simon Glass
Acked-by: Simon Glass -
If the whole code is surrounded by #ifdef(CONFIG_ ) .. #endif,
it should be moved to Makefile.Signed-off-by: Masahiro Yamada
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- When CONFIG_DISPLAY_CPUINFO is not enabled,
print_cpuinfo() should be defined as an empty function
in a header, include/common.h- Remove #ifdef CONFIG_DISPLAY_CPUINFO .. #endif
from caller, common/board_f.c and arch/arm/lib/board.c- Remove redundant prototypes in arch/arm/lib/board.c,
arch/arm/include/asm/arch-am33x/sys_proto.h and
board/nokia/rx51/rx51.h, keeping the one in include/common.h- Add #ifdef CONFIG_DISPLAY_CPUINFO to the func definition
where it is missingSigned-off-by: Masahiro Yamada
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Signed-off-by: Masahiro Yamada
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CONFIG_SYS_GBL_DATA_SIZE is not used any more.
The size of struct "global_data" is automatically calculated
by asm-offsets. (See lib/asm-offsets.c)GENERATED_GBL_DATA_SIZE should be used instead of
CONFIG_SYS_GBL_DATA_SIZE.Signed-off-by: Masahiro Yamada
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It is convenient to have all device trees on the same SoC compiled.
It allows for later easy repackaging without the need to re-run
the make file.- Build device trees with the same SoC under arch/$(ARCH)/dts
- Copy the one specified by CONFIG_DEFAULT_DEVICE_TREE or
DEVICE_TREE=... to dts/dt.dtbSigned-off-by: Masahiro Yamada
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Unlike Linux Kernel, U-Boot historically had *.dts files under
board/$(VENDOR)/dts/ and *.dtsi files under arch/$(ARCH)/dts/.I think arch/$(ARCH)/dts dicretory is a better location
to store both *.dts and *.dtsi files.For example, before this commit, board/xilinx/dts directory
had both Microblaze dts (microblaze-generic.dts) and
ARM dts (zynq-*.dts), which are totally unrelated.This commit moves *.dts to arch/$(ARCH)/dts/ directories,
allowing us to describe nicely mutiple DTBs generation in the next commit.Signed-off-by: Masahiro Yamada
