19 Jul, 2018
1 commit
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This patch basically adds two new commands for loadig secure
images.
1. zynq rsa adds support to load secure image which can be both
authenticated or encrypted or both authenticated and encrypted
image in xilinx bootimage(BOOT.bin) format.
2. zynq aes command adds support to decrypt and load encrypted
image back to DDR as per destination address. The image has
to be encrypted using xilinx bootgen tool and to get only the
encrypted image from tool use -split option while invoking
bootgen.Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek
11 May, 2018
1 commit
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This commit moves the FPGA descriptor definition
to mach-zynq, where it makes more sense.Based on patches from Ariel D'Alessandro
and Ezequiel GarciaSigned-off-by: Michal Simek
07 May, 2018
1 commit
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When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.Signed-off-by: Tom Rini
15 Nov, 2016
1 commit
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Zynq 7000S (Single A9 core) devices is using different ID code.
This patch adds this new codes and assign them.Signed-off-by: Michal Simek
21 Jan, 2015
2 commits
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Added support for zc7035
Signed-off-by: Siva Durga Prasad Paladugu
Signed-off-by: Michal Simek -
Set fpga operations to NULL for cases where
FPGA is setup in board file but driver is not addedSigned-off-by: Michal Simek
13 May, 2014
2 commits
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Connect FPGA version with appropriate operations
to remove huge switch-cases for every FPGA family.
Tested on Zynq. Spartan2/Spartan3/Virtex2 just compile test.Signed-off-by: Michal Simek
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No functional changes.
Signed-off-by: Michal Simek
06 Feb, 2014
1 commit
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Just extend tables with this new device.
Signed-off-by: Michal Simek
12 Aug, 2013
1 commit
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- Add support for zc7100 device.
- FPGA programming on few of the SOC(zc7100) takes more
than 1sec, hence increased the program time by 4sec to
sync' all soc's.Signed-off-by: Jagannadha Sutradharudu Teki
Signed-off-by: Michal Simek
24 Jul, 2013
1 commit
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Signed-off-by: Wolfgang Denk
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini
06 May, 2013
2 commits
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Ensure that wrong bitstream won't be loaded
to current device.Signed-off-by: Michal Simek
Reviewed-by: Tom Rini -
Devcfg device requires to load bitstream in binary format.
But u-boot also has an option for loading bitstream in bit
format. Let's handle both cases by zynqpl driver.
Also add suport for loading partial bitstreams.The first driver version was done by:
Joe HershbergerSigned-off-by: Michal Simek
Reviewed-by: Tom Rini